diff options
Diffstat (limited to 'arch/arm/boot/dts/bcm11351.dtsi')
-rw-r--r-- | arch/arm/boot/dts/bcm11351.dtsi | 192 |
1 files changed, 140 insertions, 52 deletions
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi index 792fde1b7f75..64d069bcc409 100644 --- a/arch/arm/boot/dts/bcm11351.dtsi +++ b/arch/arm/boot/dts/bcm11351.dtsi | |||
@@ -14,6 +14,8 @@ | |||
14 | #include <dt-bindings/interrupt-controller/arm-gic.h> | 14 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
15 | #include <dt-bindings/interrupt-controller/irq.h> | 15 | #include <dt-bindings/interrupt-controller/irq.h> |
16 | 16 | ||
17 | #include "dt-bindings/clock/bcm281xx.h" | ||
18 | |||
17 | #include "skeleton.dtsi" | 19 | #include "skeleton.dtsi" |
18 | 20 | ||
19 | / { | 21 | / { |
@@ -43,7 +45,7 @@ | |||
43 | compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; | 45 | compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; |
44 | status = "disabled"; | 46 | status = "disabled"; |
45 | reg = <0x3e000000 0x1000>; | 47 | reg = <0x3e000000 0x1000>; |
46 | clocks = <&uartb_clk>; | 48 | clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB>; |
47 | interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; | 49 | interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; |
48 | reg-shift = <2>; | 50 | reg-shift = <2>; |
49 | reg-io-width = <4>; | 51 | reg-io-width = <4>; |
@@ -53,7 +55,7 @@ | |||
53 | compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; | 55 | compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; |
54 | status = "disabled"; | 56 | status = "disabled"; |
55 | reg = <0x3e001000 0x1000>; | 57 | reg = <0x3e001000 0x1000>; |
56 | clocks = <&uartb2_clk>; | 58 | clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB2>; |
57 | interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; | 59 | interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; |
58 | reg-shift = <2>; | 60 | reg-shift = <2>; |
59 | reg-io-width = <4>; | 61 | reg-io-width = <4>; |
@@ -63,7 +65,7 @@ | |||
63 | compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; | 65 | compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; |
64 | status = "disabled"; | 66 | status = "disabled"; |
65 | reg = <0x3e002000 0x1000>; | 67 | reg = <0x3e002000 0x1000>; |
66 | clocks = <&uartb3_clk>; | 68 | clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>; |
67 | interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; | 69 | interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; |
68 | reg-shift = <2>; | 70 | reg-shift = <2>; |
69 | reg-io-width = <4>; | 71 | reg-io-width = <4>; |
@@ -73,7 +75,7 @@ | |||
73 | compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; | 75 | compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; |
74 | status = "disabled"; | 76 | status = "disabled"; |
75 | reg = <0x3e003000 0x1000>; | 77 | reg = <0x3e003000 0x1000>; |
76 | clocks = <&uartb4_clk>; | 78 | clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB4>; |
77 | interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; | 79 | interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; |
78 | reg-shift = <2>; | 80 | reg-shift = <2>; |
79 | reg-io-width = <4>; | 81 | reg-io-width = <4>; |
@@ -95,7 +97,7 @@ | |||
95 | compatible = "brcm,kona-timer"; | 97 | compatible = "brcm,kona-timer"; |
96 | reg = <0x35006000 0x1000>; | 98 | reg = <0x35006000 0x1000>; |
97 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; | 99 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; |
98 | clocks = <&hub_timer_clk>; | 100 | clocks = <&aon_ccu BCM281XX_AON_CCU_HUB_TIMER>; |
99 | }; | 101 | }; |
100 | 102 | ||
101 | gpio: gpio@35003000 { | 103 | gpio: gpio@35003000 { |
@@ -118,7 +120,7 @@ | |||
118 | compatible = "brcm,kona-sdhci"; | 120 | compatible = "brcm,kona-sdhci"; |
119 | reg = <0x3f180000 0x10000>; | 121 | reg = <0x3f180000 0x10000>; |
120 | interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; | 122 | interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; |
121 | clocks = <&sdio1_clk>; | 123 | clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO1>; |
122 | status = "disabled"; | 124 | status = "disabled"; |
123 | }; | 125 | }; |
124 | 126 | ||
@@ -126,7 +128,7 @@ | |||
126 | compatible = "brcm,kona-sdhci"; | 128 | compatible = "brcm,kona-sdhci"; |
127 | reg = <0x3f190000 0x10000>; | 129 | reg = <0x3f190000 0x10000>; |
128 | interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; | 130 | interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; |
129 | clocks = <&sdio2_clk>; | 131 | clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO2>; |
130 | status = "disabled"; | 132 | status = "disabled"; |
131 | }; | 133 | }; |
132 | 134 | ||
@@ -134,7 +136,7 @@ | |||
134 | compatible = "brcm,kona-sdhci"; | 136 | compatible = "brcm,kona-sdhci"; |
135 | reg = <0x3f1a0000 0x10000>; | 137 | reg = <0x3f1a0000 0x10000>; |
136 | interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; | 138 | interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; |
137 | clocks = <&sdio3_clk>; | 139 | clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO3>; |
138 | status = "disabled"; | 140 | status = "disabled"; |
139 | }; | 141 | }; |
140 | 142 | ||
@@ -142,7 +144,7 @@ | |||
142 | compatible = "brcm,kona-sdhci"; | 144 | compatible = "brcm,kona-sdhci"; |
143 | reg = <0x3f1b0000 0x10000>; | 145 | reg = <0x3f1b0000 0x10000>; |
144 | interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; | 146 | interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; |
145 | clocks = <&sdio4_clk>; | 147 | clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO4>; |
146 | status = "disabled"; | 148 | status = "disabled"; |
147 | }; | 149 | }; |
148 | 150 | ||
@@ -157,7 +159,7 @@ | |||
157 | interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; | 159 | interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; |
158 | #address-cells = <1>; | 160 | #address-cells = <1>; |
159 | #size-cells = <0>; | 161 | #size-cells = <0>; |
160 | clocks = <&bsc1_clk>; | 162 | clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC1>; |
161 | status = "disabled"; | 163 | status = "disabled"; |
162 | }; | 164 | }; |
163 | 165 | ||
@@ -167,7 +169,7 @@ | |||
167 | interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; | 169 | interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; |
168 | #address-cells = <1>; | 170 | #address-cells = <1>; |
169 | #size-cells = <0>; | 171 | #size-cells = <0>; |
170 | clocks = <&bsc2_clk>; | 172 | clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC2>; |
171 | status = "disabled"; | 173 | status = "disabled"; |
172 | }; | 174 | }; |
173 | 175 | ||
@@ -177,7 +179,7 @@ | |||
177 | interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; | 179 | interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; |
178 | #address-cells = <1>; | 180 | #address-cells = <1>; |
179 | #size-cells = <0>; | 181 | #size-cells = <0>; |
180 | clocks = <&bsc3_clk>; | 182 | clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC3>; |
181 | status = "disabled"; | 183 | status = "disabled"; |
182 | }; | 184 | }; |
183 | 185 | ||
@@ -187,105 +189,191 @@ | |||
187 | interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; | 189 | interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; |
188 | #address-cells = <1>; | 190 | #address-cells = <1>; |
189 | #size-cells = <0>; | 191 | #size-cells = <0>; |
190 | clocks = <&pmu_bsc_clk>; | 192 | clocks = <&aon_ccu BCM281XX_AON_CCU_PMU_BSC>; |
191 | status = "disabled"; | 193 | status = "disabled"; |
192 | }; | 194 | }; |
193 | 195 | ||
194 | clocks { | 196 | clocks { |
195 | bsc1_clk: bsc1 { | 197 | #address-cells = <1>; |
196 | compatible = "fixed-clock"; | 198 | #size-cells = <1>; |
197 | clock-frequency = <13000000>; | 199 | ranges; |
200 | |||
201 | root_ccu: root_ccu { | ||
202 | compatible = "brcm,bcm11351-root-ccu"; | ||
203 | reg = <0x35001000 0x0f00>; | ||
204 | #clock-cells = <1>; | ||
205 | clock-output-names = "frac_1m"; | ||
206 | }; | ||
207 | |||
208 | hub_ccu: hub_ccu { | ||
209 | compatible = "brcm,bcm11351-hub-ccu"; | ||
210 | reg = <0x34000000 0x0f00>; | ||
211 | #clock-cells = <1>; | ||
212 | clock-output-names = "tmon_1m"; | ||
213 | }; | ||
214 | |||
215 | aon_ccu: aon_ccu { | ||
216 | compatible = "brcm,bcm11351-aon-ccu"; | ||
217 | reg = <0x35002000 0x0f00>; | ||
218 | #clock-cells = <1>; | ||
219 | clock-output-names = "hub_timer", | ||
220 | "pmu_bsc", | ||
221 | "pmu_bsc_var"; | ||
222 | }; | ||
223 | |||
224 | master_ccu: master_ccu { | ||
225 | compatible = "brcm,bcm11351-master-ccu"; | ||
226 | reg = <0x3f001000 0x0f00>; | ||
227 | #clock-cells = <1>; | ||
228 | clock-output-names = "sdio1", | ||
229 | "sdio2", | ||
230 | "sdio3", | ||
231 | "sdio4", | ||
232 | "usb_ic", | ||
233 | "hsic2_48m", | ||
234 | "hsic2_12m"; | ||
235 | }; | ||
236 | |||
237 | slave_ccu: slave_ccu { | ||
238 | compatible = "brcm,bcm11351-slave-ccu"; | ||
239 | reg = <0x3e011000 0x0f00>; | ||
240 | #clock-cells = <1>; | ||
241 | clock-output-names = "uartb", | ||
242 | "uartb2", | ||
243 | "uartb3", | ||
244 | "uartb4", | ||
245 | "ssp0", | ||
246 | "ssp2", | ||
247 | "bsc1", | ||
248 | "bsc2", | ||
249 | "bsc3", | ||
250 | "pwm"; | ||
251 | }; | ||
252 | |||
253 | ref_1m_clk: ref_1m { | ||
198 | #clock-cells = <0>; | 254 | #clock-cells = <0>; |
255 | compatible = "fixed-clock"; | ||
256 | clock-frequency = <1000000>; | ||
199 | }; | 257 | }; |
200 | 258 | ||
201 | bsc2_clk: bsc2 { | 259 | ref_32k_clk: ref_32k { |
260 | #clock-cells = <0>; | ||
202 | compatible = "fixed-clock"; | 261 | compatible = "fixed-clock"; |
203 | clock-frequency = <13000000>; | 262 | clock-frequency = <32768>; |
263 | }; | ||
264 | |||
265 | bbl_32k_clk: bbl_32k { | ||
204 | #clock-cells = <0>; | 266 | #clock-cells = <0>; |
267 | compatible = "fixed-clock"; | ||
268 | clock-frequency = <32768>; | ||
205 | }; | 269 | }; |
206 | 270 | ||
207 | bsc3_clk: bsc3 { | 271 | ref_13m_clk: ref_13m { |
272 | #clock-cells = <0>; | ||
208 | compatible = "fixed-clock"; | 273 | compatible = "fixed-clock"; |
209 | clock-frequency = <13000000>; | 274 | clock-frequency = <13000000>; |
210 | #clock-cells = <0>; | ||
211 | }; | 275 | }; |
212 | 276 | ||
213 | pmu_bsc_clk: pmu_bsc { | 277 | var_13m_clk: var_13m { |
278 | #clock-cells = <0>; | ||
214 | compatible = "fixed-clock"; | 279 | compatible = "fixed-clock"; |
215 | clock-frequency = <13000000>; | 280 | clock-frequency = <13000000>; |
216 | #clock-cells = <0>; | ||
217 | }; | 281 | }; |
218 | 282 | ||
219 | hub_timer_clk: hub_timer { | 283 | dft_19_5m_clk: dft_19_5m { |
220 | compatible = "fixed-clock"; | ||
221 | clock-frequency = <32768>; | ||
222 | #clock-cells = <0>; | 284 | #clock-cells = <0>; |
285 | compatible = "fixed-clock"; | ||
286 | clock-frequency = <19500000>; | ||
223 | }; | 287 | }; |
224 | 288 | ||
225 | pwm_clk: pwm { | 289 | ref_crystal_clk: ref_crystal { |
290 | #clock-cells = <0>; | ||
226 | compatible = "fixed-clock"; | 291 | compatible = "fixed-clock"; |
227 | clock-frequency = <26000000>; | 292 | clock-frequency = <26000000>; |
228 | #clock-cells = <0>; | ||
229 | }; | 293 | }; |
230 | 294 | ||
231 | sdio1_clk: sdio1 { | 295 | ref_cx40_clk: ref_cx40 { |
232 | compatible = "fixed-clock"; | ||
233 | clock-frequency = <48000000>; | ||
234 | #clock-cells = <0>; | 296 | #clock-cells = <0>; |
297 | compatible = "fixed-clock"; | ||
298 | clock-frequency = <40000000>; | ||
235 | }; | 299 | }; |
236 | 300 | ||
237 | sdio2_clk: sdio2 { | 301 | ref_52m_clk: ref_52m { |
238 | compatible = "fixed-clock"; | ||
239 | clock-frequency = <48000000>; | ||
240 | #clock-cells = <0>; | 302 | #clock-cells = <0>; |
303 | compatible = "fixed-clock"; | ||
304 | clock-frequency = <52000000>; | ||
241 | }; | 305 | }; |
242 | 306 | ||
243 | sdio3_clk: sdio3 { | 307 | var_52m_clk: var_52m { |
244 | compatible = "fixed-clock"; | ||
245 | clock-frequency = <48000000>; | ||
246 | #clock-cells = <0>; | 308 | #clock-cells = <0>; |
309 | compatible = "fixed-clock"; | ||
310 | clock-frequency = <52000000>; | ||
247 | }; | 311 | }; |
248 | 312 | ||
249 | sdio4_clk: sdio4 { | 313 | usb_otg_ahb_clk: usb_otg_ahb { |
250 | compatible = "fixed-clock"; | 314 | compatible = "fixed-clock"; |
251 | clock-frequency = <48000000>; | 315 | clock-frequency = <52000000>; |
252 | #clock-cells = <0>; | 316 | #clock-cells = <0>; |
253 | }; | 317 | }; |
254 | 318 | ||
255 | tmon_1m_clk: tmon_1m { | 319 | ref_96m_clk: ref_96m { |
256 | compatible = "fixed-clock"; | ||
257 | clock-frequency = <1000000>; | ||
258 | #clock-cells = <0>; | 320 | #clock-cells = <0>; |
321 | compatible = "fixed-clock"; | ||
322 | clock-frequency = <96000000>; | ||
259 | }; | 323 | }; |
260 | 324 | ||
261 | uartb_clk: uartb { | 325 | var_96m_clk: var_96m { |
262 | compatible = "fixed-clock"; | ||
263 | clock-frequency = <13000000>; | ||
264 | #clock-cells = <0>; | 326 | #clock-cells = <0>; |
327 | compatible = "fixed-clock"; | ||
328 | clock-frequency = <96000000>; | ||
265 | }; | 329 | }; |
266 | 330 | ||
267 | uartb2_clk: uartb2 { | 331 | ref_104m_clk: ref_104m { |
332 | #clock-cells = <0>; | ||
268 | compatible = "fixed-clock"; | 333 | compatible = "fixed-clock"; |
269 | clock-frequency = <13000000>; | 334 | clock-frequency = <104000000>; |
335 | }; | ||
336 | |||
337 | var_104m_clk: var_104m { | ||
270 | #clock-cells = <0>; | 338 | #clock-cells = <0>; |
339 | compatible = "fixed-clock"; | ||
340 | clock-frequency = <104000000>; | ||
271 | }; | 341 | }; |
272 | 342 | ||
273 | uartb3_clk: uartb3 { | 343 | ref_156m_clk: ref_156m { |
344 | #clock-cells = <0>; | ||
274 | compatible = "fixed-clock"; | 345 | compatible = "fixed-clock"; |
275 | clock-frequency = <13000000>; | 346 | clock-frequency = <156000000>; |
347 | }; | ||
348 | |||
349 | var_156m_clk: var_156m { | ||
276 | #clock-cells = <0>; | 350 | #clock-cells = <0>; |
351 | compatible = "fixed-clock"; | ||
352 | clock-frequency = <156000000>; | ||
277 | }; | 353 | }; |
278 | 354 | ||
279 | uartb4_clk: uartb4 { | 355 | ref_208m_clk: ref_208m { |
356 | #clock-cells = <0>; | ||
280 | compatible = "fixed-clock"; | 357 | compatible = "fixed-clock"; |
281 | clock-frequency = <13000000>; | 358 | clock-frequency = <208000000>; |
359 | }; | ||
360 | |||
361 | var_208m_clk: var_208m { | ||
282 | #clock-cells = <0>; | 362 | #clock-cells = <0>; |
363 | compatible = "fixed-clock"; | ||
364 | clock-frequency = <208000000>; | ||
283 | }; | 365 | }; |
284 | 366 | ||
285 | usb_otg_ahb_clk: usb_otg_ahb { | 367 | ref_312m_clk: ref_312m { |
368 | #clock-cells = <0>; | ||
286 | compatible = "fixed-clock"; | 369 | compatible = "fixed-clock"; |
287 | clock-frequency = <52000000>; | 370 | clock-frequency = <312000000>; |
371 | }; | ||
372 | |||
373 | var_312m_clk: var_312m { | ||
288 | #clock-cells = <0>; | 374 | #clock-cells = <0>; |
375 | compatible = "fixed-clock"; | ||
376 | clock-frequency = <312000000>; | ||
289 | }; | 377 | }; |
290 | }; | 378 | }; |
291 | 379 | ||