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Diffstat (limited to 'arch/arm/boot/dts/at91sam9x5.dtsi')
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi92
1 files changed, 65 insertions, 27 deletions
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 40ac3a4eb1ab..8ecca6948d81 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -88,13 +88,6 @@
88 interrupts = <1 4 7>; 88 interrupts = <1 4 7>;
89 }; 89 };
90 90
91 ssc0: ssc@f0010000 {
92 compatible = "atmel,at91sam9g45-ssc";
93 reg = <0xf0010000 0x4000>;
94 interrupts = <28 4 5>;
95 status = "disabled";
96 };
97
98 tcb0: timer@f8008000 { 91 tcb0: timer@f8008000 {
99 compatible = "atmel,at91sam9x5-tcb"; 92 compatible = "atmel,at91sam9x5-tcb";
100 reg = <0xf8008000 0x100>; 93 reg = <0xf8008000 0x100>;
@@ -150,6 +143,11 @@
150 atmel,pins = 143 atmel,pins =
151 <0 3 0x1 0x0>; /* PA3 periph A */ 144 <0 3 0x1 0x0>; /* PA3 periph A */
152 }; 145 };
146
147 pinctrl_usart0_sck: usart0_sck-0 {
148 atmel,pins =
149 <0 4 0x1 0x0>; /* PA4 periph A */
150 };
153 }; 151 };
154 152
155 usart1 { 153 usart1 {
@@ -161,12 +159,17 @@
161 159
162 pinctrl_usart1_rts: usart1_rts-0 { 160 pinctrl_usart1_rts: usart1_rts-0 {
163 atmel,pins = 161 atmel,pins =
164 <3 27 0x3 0x0>; /* PC27 periph C */ 162 <2 27 0x3 0x0>; /* PC27 periph C */
165 }; 163 };
166 164
167 pinctrl_usart1_cts: usart1_cts-0 { 165 pinctrl_usart1_cts: usart1_cts-0 {
168 atmel,pins = 166 atmel,pins =
169 <3 28 0x3 0x0>; /* PC28 periph C */ 167 <2 28 0x3 0x0>; /* PC28 periph C */
168 };
169
170 pinctrl_usart1_sck: usart1_sck-0 {
171 atmel,pins =
172 <2 28 0x3 0x0>; /* PC29 periph C */
170 }; 173 };
171 }; 174 };
172 175
@@ -179,46 +182,56 @@
179 182
180 pinctrl_uart2_rts: uart2_rts-0 { 183 pinctrl_uart2_rts: uart2_rts-0 {
181 atmel,pins = 184 atmel,pins =
182 <0 0 0x2 0x0>; /* PB0 periph B */ 185 <1 0 0x2 0x0>; /* PB0 periph B */
183 }; 186 };
184 187
185 pinctrl_uart2_cts: uart2_cts-0 { 188 pinctrl_uart2_cts: uart2_cts-0 {
186 atmel,pins = 189 atmel,pins =
187 <0 1 0x2 0x0>; /* PB1 periph B */ 190 <1 1 0x2 0x0>; /* PB1 periph B */
191 };
192
193 pinctrl_usart2_sck: usart2_sck-0 {
194 atmel,pins =
195 <1 2 0x2 0x0>; /* PB2 periph B */
188 }; 196 };
189 }; 197 };
190 198
191 usart3 { 199 usart3 {
192 pinctrl_uart3: usart3-0 { 200 pinctrl_uart3: usart3-0 {
193 atmel,pins = 201 atmel,pins =
194 <3 23 0x2 0x1 /* PC22 periph B with pullup */ 202 <2 23 0x2 0x1 /* PC22 periph B with pullup */
195 3 23 0x2 0x0>; /* PC23 periph B */ 203 2 23 0x2 0x0>; /* PC23 periph B */
196 }; 204 };
197 205
198 pinctrl_usart3_rts: usart3_rts-0 { 206 pinctrl_usart3_rts: usart3_rts-0 {
199 atmel,pins = 207 atmel,pins =
200 <3 24 0x2 0x0>; /* PC24 periph B */ 208 <2 24 0x2 0x0>; /* PC24 periph B */
201 }; 209 };
202 210
203 pinctrl_usart3_cts: usart3_cts-0 { 211 pinctrl_usart3_cts: usart3_cts-0 {
204 atmel,pins = 212 atmel,pins =
205 <3 25 0x2 0x0>; /* PC25 periph B */ 213 <2 25 0x2 0x0>; /* PC25 periph B */
214 };
215
216 pinctrl_usart3_sck: usart3_sck-0 {
217 atmel,pins =
218 <2 26 0x2 0x0>; /* PC26 periph B */
206 }; 219 };
207 }; 220 };
208 221
209 uart0 { 222 uart0 {
210 pinctrl_uart0: uart0-0 { 223 pinctrl_uart0: uart0-0 {
211 atmel,pins = 224 atmel,pins =
212 <3 8 0x3 0x0 /* PC8 periph C */ 225 <2 8 0x3 0x0 /* PC8 periph C */
213 3 9 0x3 0x1>; /* PC9 periph C with pullup */ 226 2 9 0x3 0x1>; /* PC9 periph C with pullup */
214 }; 227 };
215 }; 228 };
216 229
217 uart1 { 230 uart1 {
218 pinctrl_uart1: uart1-0 { 231 pinctrl_uart1: uart1-0 {
219 atmel,pins = 232 atmel,pins =
220 <3 16 0x3 0x0 /* PC16 periph C */ 233 <2 16 0x3 0x0 /* PC16 periph C */
221 3 17 0x3 0x1>; /* PC17 periph C with pullup */ 234 2 17 0x3 0x1>; /* PC17 periph C with pullup */
222 }; 235 };
223 }; 236 };
224 237
@@ -247,14 +260,14 @@
247 260
248 pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 { 261 pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
249 atmel,pins = 262 atmel,pins =
250 <1 8 0x1 0x0 /* PA8 periph A */ 263 <1 8 0x1 0x0 /* PB8 periph A */
251 1 11 0x1 0x0 /* PA11 periph A */ 264 1 11 0x1 0x0 /* PB11 periph A */
252 1 12 0x1 0x0 /* PA12 periph A */ 265 1 12 0x1 0x0 /* PB12 periph A */
253 1 13 0x1 0x0 /* PA13 periph A */ 266 1 13 0x1 0x0 /* PB13 periph A */
254 1 14 0x1 0x0 /* PA14 periph A */ 267 1 14 0x1 0x0 /* PB14 periph A */
255 1 15 0x1 0x0 /* PA15 periph A */ 268 1 15 0x1 0x0 /* PB15 periph A */
256 1 16 0x1 0x0 /* PA16 periph A */ 269 1 16 0x1 0x0 /* PB16 periph A */
257 1 17 0x1 0x0>; /* PA17 periph A */ 270 1 17 0x1 0x0>; /* PB17 periph A */
258 }; 271 };
259 }; 272 };
260 273
@@ -290,6 +303,22 @@
290 }; 303 };
291 }; 304 };
292 305
306 ssc0 {
307 pinctrl_ssc0_tx: ssc0_tx-0 {
308 atmel,pins =
309 <0 24 0x2 0x0 /* PA24 periph B */
310 0 25 0x2 0x0 /* PA25 periph B */
311 0 26 0x2 0x0>; /* PA26 periph B */
312 };
313
314 pinctrl_ssc0_rx: ssc0_rx-0 {
315 atmel,pins =
316 <0 27 0x2 0x0 /* PA27 periph B */
317 0 28 0x2 0x0 /* PA28 periph B */
318 0 29 0x2 0x0>; /* PA29 periph B */
319 };
320 };
321
293 pioA: gpio@fffff400 { 322 pioA: gpio@fffff400 {
294 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 323 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
295 reg = <0xfffff400 0x200>; 324 reg = <0xfffff400 0x200>;
@@ -333,6 +362,15 @@
333 }; 362 };
334 }; 363 };
335 364
365 ssc0: ssc@f0010000 {
366 compatible = "atmel,at91sam9g45-ssc";
367 reg = <0xf0010000 0x4000>;
368 interrupts = <28 4 5>;
369 pinctrl-names = "default";
370 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
371 status = "disabled";
372 };
373
336 mmc0: mmc@f0008000 { 374 mmc0: mmc@f0008000 {
337 compatible = "atmel,hsmci"; 375 compatible = "atmel,hsmci";
338 reg = <0xf0008000 0x600>; 376 reg = <0xf0008000 0x600>;
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-13 07:32:02 -0500