diff options
Diffstat (limited to 'arch/arm/boot/dts/am35xx-clocks.dtsi')
-rw-r--r-- | arch/arm/boot/dts/am35xx-clocks.dtsi | 128 |
1 files changed, 128 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/am35xx-clocks.dtsi b/arch/arm/boot/dts/am35xx-clocks.dtsi new file mode 100644 index 000000000000..df489d310b50 --- /dev/null +++ b/arch/arm/boot/dts/am35xx-clocks.dtsi | |||
@@ -0,0 +1,128 @@ | |||
1 | /* | ||
2 | * Device Tree Source for OMAP3 clock data | ||
3 | * | ||
4 | * Copyright (C) 2013 Texas Instruments, Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | &scrm_clocks { | ||
11 | emac_ick: emac_ick { | ||
12 | #clock-cells = <0>; | ||
13 | compatible = "ti,am35xx-gate-clock"; | ||
14 | clocks = <&ipss_ick>; | ||
15 | reg = <0x059c>; | ||
16 | ti,bit-shift = <1>; | ||
17 | }; | ||
18 | |||
19 | emac_fck: emac_fck { | ||
20 | #clock-cells = <0>; | ||
21 | compatible = "ti,gate-clock"; | ||
22 | clocks = <&rmii_ck>; | ||
23 | reg = <0x059c>; | ||
24 | ti,bit-shift = <9>; | ||
25 | }; | ||
26 | |||
27 | vpfe_ick: vpfe_ick { | ||
28 | #clock-cells = <0>; | ||
29 | compatible = "ti,am35xx-gate-clock"; | ||
30 | clocks = <&ipss_ick>; | ||
31 | reg = <0x059c>; | ||
32 | ti,bit-shift = <2>; | ||
33 | }; | ||
34 | |||
35 | vpfe_fck: vpfe_fck { | ||
36 | #clock-cells = <0>; | ||
37 | compatible = "ti,gate-clock"; | ||
38 | clocks = <&pclk_ck>; | ||
39 | reg = <0x059c>; | ||
40 | ti,bit-shift = <10>; | ||
41 | }; | ||
42 | |||
43 | hsotgusb_ick_am35xx: hsotgusb_ick_am35xx { | ||
44 | #clock-cells = <0>; | ||
45 | compatible = "ti,am35xx-gate-clock"; | ||
46 | clocks = <&ipss_ick>; | ||
47 | reg = <0x059c>; | ||
48 | ti,bit-shift = <0>; | ||
49 | }; | ||
50 | |||
51 | hsotgusb_fck_am35xx: hsotgusb_fck_am35xx { | ||
52 | #clock-cells = <0>; | ||
53 | compatible = "ti,gate-clock"; | ||
54 | clocks = <&sys_ck>; | ||
55 | reg = <0x059c>; | ||
56 | ti,bit-shift = <8>; | ||
57 | }; | ||
58 | |||
59 | hecc_ck: hecc_ck { | ||
60 | #clock-cells = <0>; | ||
61 | compatible = "ti,am35xx-gate-clock"; | ||
62 | clocks = <&sys_ck>; | ||
63 | reg = <0x059c>; | ||
64 | ti,bit-shift = <3>; | ||
65 | }; | ||
66 | }; | ||
67 | &cm_clocks { | ||
68 | ipss_ick: ipss_ick { | ||
69 | #clock-cells = <0>; | ||
70 | compatible = "ti,am35xx-interface-clock"; | ||
71 | clocks = <&core_l3_ick>; | ||
72 | reg = <0x0a10>; | ||
73 | ti,bit-shift = <4>; | ||
74 | }; | ||
75 | |||
76 | rmii_ck: rmii_ck { | ||
77 | #clock-cells = <0>; | ||
78 | compatible = "fixed-clock"; | ||
79 | clock-frequency = <50000000>; | ||
80 | }; | ||
81 | |||
82 | pclk_ck: pclk_ck { | ||
83 | #clock-cells = <0>; | ||
84 | compatible = "fixed-clock"; | ||
85 | clock-frequency = <27000000>; | ||
86 | }; | ||
87 | |||
88 | uart4_ick_am35xx: uart4_ick_am35xx { | ||
89 | #clock-cells = <0>; | ||
90 | compatible = "ti,omap3-interface-clock"; | ||
91 | clocks = <&core_l4_ick>; | ||
92 | reg = <0x0a10>; | ||
93 | ti,bit-shift = <23>; | ||
94 | }; | ||
95 | |||
96 | uart4_fck_am35xx: uart4_fck_am35xx { | ||
97 | #clock-cells = <0>; | ||
98 | compatible = "ti,wait-gate-clock"; | ||
99 | clocks = <&core_48m_fck>; | ||
100 | reg = <0x0a00>; | ||
101 | ti,bit-shift = <23>; | ||
102 | }; | ||
103 | }; | ||
104 | |||
105 | &cm_clockdomains { | ||
106 | core_l3_clkdm: core_l3_clkdm { | ||
107 | compatible = "ti,clockdomain"; | ||
108 | clocks = <&sdrc_ick>, <&ipss_ick>, <&emac_ick>, <&vpfe_ick>, | ||
109 | <&hsotgusb_ick_am35xx>, <&hsotgusb_fck_am35xx>, | ||
110 | <&hecc_ck>; | ||
111 | }; | ||
112 | |||
113 | core_l4_clkdm: core_l4_clkdm { | ||
114 | compatible = "ti,clockdomain"; | ||
115 | clocks = <&cpefuse_fck>, <&ts_fck>, <&usbtll_fck>, | ||
116 | <&usbtll_ick>, <&mmchs3_ick>, <&mmchs3_fck>, | ||
117 | <&mmchs2_fck>, <&mmchs1_fck>, <&i2c3_fck>, <&i2c2_fck>, | ||
118 | <&i2c1_fck>, <&mcspi4_fck>, <&mcspi3_fck>, | ||
119 | <&mcspi2_fck>, <&mcspi1_fck>, <&uart2_fck>, | ||
120 | <&uart1_fck>, <&hdq_fck>, <&mmchs2_ick>, <&mmchs1_ick>, | ||
121 | <&hdq_ick>, <&mcspi4_ick>, <&mcspi3_ick>, | ||
122 | <&mcspi2_ick>, <&mcspi1_ick>, <&i2c3_ick>, <&i2c2_ick>, | ||
123 | <&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>, | ||
124 | <&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>, | ||
125 | <&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>, | ||
126 | <&uart4_ick_am35xx>, <&uart4_fck_am35xx>; | ||
127 | }; | ||
128 | }; | ||