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-rw-r--r--arch/arm/boot/dts/am33xx.dtsi71
1 files changed, 61 insertions, 10 deletions
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index bd0cff3f808c..bb31bff01998 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -69,95 +69,146 @@
69 #gpio-cells = <2>; 69 #gpio-cells = <2>;
70 interrupt-controller; 70 interrupt-controller;
71 #interrupt-cells = <1>; 71 #interrupt-cells = <1>;
72 reg = <0x44e07000 0x1000>;
73 interrupt-parent = <&intc>;
74 interrupts = <96>;
72 }; 75 };
73 76
74 gpio2: gpio@4804C000 { 77 gpio2: gpio@4804c000 {
75 compatible = "ti,omap4-gpio"; 78 compatible = "ti,omap4-gpio";
76 ti,hwmods = "gpio2"; 79 ti,hwmods = "gpio2";
77 gpio-controller; 80 gpio-controller;
78 #gpio-cells = <2>; 81 #gpio-cells = <2>;
79 interrupt-controller; 82 interrupt-controller;
80 #interrupt-cells = <1>; 83 #interrupt-cells = <1>;
84 reg = <0x4804c000 0x1000>;
85 interrupt-parent = <&intc>;
86 interrupts = <98>;
81 }; 87 };
82 88
83 gpio3: gpio@481AC000 { 89 gpio3: gpio@481ac000 {
84 compatible = "ti,omap4-gpio"; 90 compatible = "ti,omap4-gpio";
85 ti,hwmods = "gpio3"; 91 ti,hwmods = "gpio3";
86 gpio-controller; 92 gpio-controller;
87 #gpio-cells = <2>; 93 #gpio-cells = <2>;
88 interrupt-controller; 94 interrupt-controller;
89 #interrupt-cells = <1>; 95 #interrupt-cells = <1>;
96 reg = <0x481ac000 0x1000>;
97 interrupt-parent = <&intc>;
98 interrupts = <32>;
90 }; 99 };
91 100
92 gpio4: gpio@481AE000 { 101 gpio4: gpio@481ae000 {
93 compatible = "ti,omap4-gpio"; 102 compatible = "ti,omap4-gpio";
94 ti,hwmods = "gpio4"; 103 ti,hwmods = "gpio4";
95 gpio-controller; 104 gpio-controller;
96 #gpio-cells = <2>; 105 #gpio-cells = <2>;
97 interrupt-controller; 106 interrupt-controller;
98 #interrupt-cells = <1>; 107 #interrupt-cells = <1>;
108 reg = <0x481ae000 0x1000>;
109 interrupt-parent = <&intc>;
110 interrupts = <62>;
99 }; 111 };
100 112
101 uart1: serial@44E09000 { 113 uart1: serial@44e09000 {
102 compatible = "ti,omap3-uart"; 114 compatible = "ti,omap3-uart";
103 ti,hwmods = "uart1"; 115 ti,hwmods = "uart1";
104 clock-frequency = <48000000>; 116 clock-frequency = <48000000>;
117 reg = <0x44e09000 0x2000>;
118 interrupt-parent = <&intc>;
119 interrupts = <72>;
120 status = "disabled";
105 }; 121 };
106 122
107 uart2: serial@48022000 { 123 uart2: serial@48022000 {
108 compatible = "ti,omap3-uart"; 124 compatible = "ti,omap3-uart";
109 ti,hwmods = "uart2"; 125 ti,hwmods = "uart2";
110 clock-frequency = <48000000>; 126 clock-frequency = <48000000>;
127 reg = <0x48022000 0x2000>;
128 interrupt-parent = <&intc>;
129 interrupts = <73>;
130 status = "disabled";
111 }; 131 };
112 132
113 uart3: serial@48024000 { 133 uart3: serial@48024000 {
114 compatible = "ti,omap3-uart"; 134 compatible = "ti,omap3-uart";
115 ti,hwmods = "uart3"; 135 ti,hwmods = "uart3";
116 clock-frequency = <48000000>; 136 clock-frequency = <48000000>;
137 reg = <0x48024000 0x2000>;
138 interrupt-parent = <&intc>;
139 interrupts = <74>;
140 status = "disabled";
117 }; 141 };
118 142
119 uart4: serial@481A6000 { 143 uart4: serial@481a6000 {
120 compatible = "ti,omap3-uart"; 144 compatible = "ti,omap3-uart";
121 ti,hwmods = "uart4"; 145 ti,hwmods = "uart4";
122 clock-frequency = <48000000>; 146 clock-frequency = <48000000>;
147 reg = <0x481a6000 0x2000>;
148 interrupt-parent = <&intc>;
149 interrupts = <44>;
150 status = "disabled";
123 }; 151 };
124 152
125 uart5: serial@481A8000 { 153 uart5: serial@481a8000 {
126 compatible = "ti,omap3-uart"; 154 compatible = "ti,omap3-uart";
127 ti,hwmods = "uart5"; 155 ti,hwmods = "uart5";
128 clock-frequency = <48000000>; 156 clock-frequency = <48000000>;
157 reg = <0x481a8000 0x2000>;
158 interrupt-parent = <&intc>;
159 interrupts = <45>;
160 status = "disabled";
129 }; 161 };
130 162
131 uart6: serial@481AA000 { 163 uart6: serial@481aa000 {
132 compatible = "ti,omap3-uart"; 164 compatible = "ti,omap3-uart";
133 ti,hwmods = "uart6"; 165 ti,hwmods = "uart6";
134 clock-frequency = <48000000>; 166 clock-frequency = <48000000>;
167 reg = <0x481aa000 0x2000>;
168 interrupt-parent = <&intc>;
169 interrupts = <46>;
170 status = "disabled";
135 }; 171 };
136 172
137 i2c1: i2c@44E0B000 { 173 i2c1: i2c@44e0b000 {
138 compatible = "ti,omap4-i2c"; 174 compatible = "ti,omap4-i2c";
139 #address-cells = <1>; 175 #address-cells = <1>;
140 #size-cells = <0>; 176 #size-cells = <0>;
141 ti,hwmods = "i2c1"; 177 ti,hwmods = "i2c1";
178 reg = <0x44e0b000 0x1000>;
179 interrupt-parent = <&intc>;
180 interrupts = <70>;
181 status = "disabled";
142 }; 182 };
143 183
144 i2c2: i2c@4802A000 { 184 i2c2: i2c@4802a000 {
145 compatible = "ti,omap4-i2c"; 185 compatible = "ti,omap4-i2c";
146 #address-cells = <1>; 186 #address-cells = <1>;
147 #size-cells = <0>; 187 #size-cells = <0>;
148 ti,hwmods = "i2c2"; 188 ti,hwmods = "i2c2";
189 reg = <0x4802a000 0x1000>;
190 interrupt-parent = <&intc>;
191 interrupts = <71>;
192 status = "disabled";
149 }; 193 };
150 194
151 i2c3: i2c@4819C000 { 195 i2c3: i2c@4819c000 {
152 compatible = "ti,omap4-i2c"; 196 compatible = "ti,omap4-i2c";
153 #address-cells = <1>; 197 #address-cells = <1>;
154 #size-cells = <0>; 198 #size-cells = <0>;
155 ti,hwmods = "i2c3"; 199 ti,hwmods = "i2c3";
200 reg = <0x4819c000 0x1000>;
201 interrupt-parent = <&intc>;
202 interrupts = <30>;
203 status = "disabled";
156 }; 204 };
157 205
158 wdt2: wdt@44e35000 { 206 wdt2: wdt@44e35000 {
159 compatible = "ti,omap3-wdt"; 207 compatible = "ti,omap3-wdt";
160 ti,hwmods = "wd_timer2"; 208 ti,hwmods = "wd_timer2";
209 reg = <0x44e35000 0x1000>;
210 interrupt-parent = <&intc>;
211 interrupts = <91>;
161 }; 212 };
162 }; 213 };
163}; 214};