21 files changed, 114 insertions, 115 deletions
diff --git a/arch/arc/boot/.gitignore b/arch/arc/boot/.gitignore
index 5d65b54bf17a..5246969a20c5 100644
--- a/arch/arc/boot/.gitignore
+++ b/arch/arc/boot/.gitignore
@@ -1 +1,2 @@
 *.dtb*
+uImage
diff --git a/arch/arc/boot/dts/nsimosci.dts b/arch/arc/boot/dts/nsimosci.dts
index ea16d782af58..4f31b2eb5cdf 100644
--- a/arch/arc/boot/dts/nsimosci.dts
+++ b/arch/arc/boot/dts/nsimosci.dts
@@ -11,13 +11,16 @@
 / {
        compatible = "snps,nsimosci";
-        clock-frequency = <80000000>;   /* 80 MHZ */
+        clock-frequency = <20000000>;   /* 20 MHZ */
        #address-cells = <1>;
        #size-cells = <1>;
        interrupt-parent = <&intc>;
        chosen {
-                bootargs = "console=tty0 consoleblank=0";
+                /* this is for console on PGU */
+                /* bootargs = "console=tty0 consoleblank=0"; */
+                /* this is for console on serial */
+                bootargs = "earlycon=uart8250,mmio32,0xc0000000,115200n8 console=ttyS0,115200n8 consoleblank=0 debug";
        };
        aliases {
@@ -44,15 +47,14 @@
                };
                uart0: serial@c0000000 {
-                        compatible = "snps,dw-apb-uart";
+                        compatible = "ns8250";
                        reg = <0xc0000000 0x2000>;
                        interrupts = <11>;
-                        #clock-frequency = <80000000>;
                        clock-frequency = <3686400>;
                        baud = <115200>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
-                        status = "okay";
+                        no-loopback-test = <1>;
                };
                pgu0: pgu@c9000000 {
diff --git a/arch/arc/boot/dts/skeleton.dts b/arch/arc/boot/dts/skeleton.dts
deleted file mode 100644
index 25a84fb5b3dc..000000000000
--- a/arch/arc/boot/dts/skeleton.dts
+++ /dev/null
@@ -1,10 +0,0 @@
-/*
- * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-/dts-v1/;
-/include/ "skeleton.dtsi"
diff --git a/arch/arc/configs/nsimosci_defconfig b/arch/arc/configs/nsimosci_defconfig
index 451af30914f6..c01ba35a4eff 100644
--- a/arch/arc/configs/nsimosci_defconfig
+++ b/arch/arc/configs/nsimosci_defconfig
@@ -54,6 +54,7 @@ CONFIG_SERIO_ARC_PS2=y
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_DW=y
+CONFIG_SERIAL_OF_PLATFORM=y
 CONFIG_SERIAL_ARC=y
 CONFIG_SERIAL_ARC_CONSOLE=y
 # CONFIG_HW_RANDOM is not set
diff --git a/arch/arc/include/asm/linkage.h b/arch/arc/include/asm/linkage.h
index 66ee5527aefc..5faad17118b4 100644
--- a/arch/arc/include/asm/linkage.h
+++ b/arch/arc/include/asm/linkage.h
@@ -13,20 +13,6 @@
 #define ASM_NL           `      /* use '`' to mark new line in macro */
-/* Can't use the ENTRY macro in linux/linkage.h
- * gas considers ';' as comment vs. newline
- */
-.macro ARC_ENTRY name
-        .global \name
-        .align 4
-        \name:
-.endm
-.macro ARC_EXIT name
-#define ASM_PREV_SYM_ADDR(name)  .-##name
-        .size \ name, ASM_PREV_SYM_ADDR(\name)
-.endm
 /* annotation for data we want in DCCM - if enabled in .config */
 .macro ARCFP_DATA nm
 #ifdef CONFIG_ARC_HAS_DCCM
diff --git a/arch/arc/kernel/ctx_sw_asm.S b/arch/arc/kernel/ctx_sw_asm.S
index 65690e7fcc8c..2ff0347a2fd7 100644
--- a/arch/arc/kernel/ctx_sw_asm.S
+++ b/arch/arc/kernel/ctx_sw_asm.S
@@ -62,4 +62,4 @@ __switch_to:
        ld.ab   blink, [sp, 4]
        j       [blink]
-ARC_EXIT __switch_to
+END(__switch_to)
diff --git a/arch/arc/kernel/entry.S b/arch/arc/kernel/entry.S
index 47d09d07f093..819dd5f7eb05 100644
--- a/arch/arc/kernel/entry.S
+++ b/arch/arc/kernel/entry.S
@@ -141,7 +141,7 @@ VECTOR   EV_Extension            ; 0x130, Extn Intruction Excp  (0x26)
 VECTOR   reserved                ; Reserved Exceptions
 .endr
-#include <linux/linkage.h>   /* ARC_{EXTRY,EXIT} */
+#include <linux/linkage.h>   /* {EXTRY,EXIT} */
 #include <asm/entry.h>       /* SAVE_ALL_{INT1,INT2,SYS...} */
 #include <asm/errno.h>
 #include <asm/arcregs.h>
@@ -184,7 +184,7 @@ reserved:		; processor restart
 ; ---------------------------------------------
 ;  Level 2 ISR: Can interrupt a Level 1 ISR
 ; ---------------------------------------------
-ARC_ENTRY handle_interrupt_level2
+ENTRY(handle_interrupt_level2)
        ; TODO-vineetg for SMP this wont work
        ; free up r9 as scratchpad
@@ -225,14 +225,14 @@ ARC_ENTRY handle_interrupt_level2
        b   ret_from_exception
-ARC_EXIT handle_interrupt_level2
+END(handle_interrupt_level2)
 #endif
 ; ---------------------------------------------
 ;  Level 1 ISR
 ; ---------------------------------------------
-ARC_ENTRY handle_interrupt_level1
+ENTRY(handle_interrupt_level1)
        /* free up r9 as scratchpad */
 #ifdef CONFIG_SMP
@@ -265,7 +265,7 @@ ARC_ENTRY handle_interrupt_level1
        sr r8, [AUX_IRQ_LV12]       ; clear bit in Sticky Status Reg
        b   ret_from_exception
-ARC_EXIT handle_interrupt_level1
+END(handle_interrupt_level1)
 ;################### Non TLB Exception Handling #############################
@@ -273,7 +273,7 @@ ARC_EXIT handle_interrupt_level1
 ; Instruction Error Exception Handler
 ; ---------------------------------------------
-ARC_ENTRY instr_service
+ENTRY(instr_service)
        EXCEPTION_PROLOGUE
@@ -284,13 +284,13 @@ ARC_ENTRY instr_service
        bl  do_insterror_or_kprobe
        b   ret_from_exception
-ARC_EXIT instr_service
+END(instr_service)
 ; ---------------------------------------------
 ; Memory Error Exception Handler
 ; ---------------------------------------------
-ARC_ENTRY mem_service
+ENTRY(mem_service)
        EXCEPTION_PROLOGUE
@@ -301,13 +301,13 @@ ARC_ENTRY mem_service
        bl  do_memory_error
        b   ret_from_exception
-ARC_EXIT mem_service
+END(mem_service)
 ; ---------------------------------------------
 ; Machine Check Exception Handler
 ; ---------------------------------------------
-ARC_ENTRY EV_MachineCheck
+ENTRY(EV_MachineCheck)
        EXCEPTION_PROLOGUE
@@ -331,13 +331,13 @@ ARC_ENTRY EV_MachineCheck
        j  do_machine_check_fault
-ARC_EXIT EV_MachineCheck
+END(EV_MachineCheck)
 ; ---------------------------------------------
 ; Protection Violation Exception Handler
 ; ---------------------------------------------
-ARC_ENTRY EV_TLBProtV
+ENTRY(EV_TLBProtV)
        EXCEPTION_PROLOGUE
@@ -385,12 +385,12 @@ ARC_ENTRY EV_TLBProtV
        b   ret_from_exception
-ARC_EXIT EV_TLBProtV
+END(EV_TLBProtV)
 ; ---------------------------------------------
 ; Privilege Violation Exception Handler
 ; ---------------------------------------------
-ARC_ENTRY EV_PrivilegeV
+ENTRY(EV_PrivilegeV)
        EXCEPTION_PROLOGUE
@@ -401,12 +401,12 @@ ARC_ENTRY EV_PrivilegeV
        bl  do_privilege_fault
        b   ret_from_exception
-ARC_EXIT EV_PrivilegeV
+END(EV_PrivilegeV)
 ; ---------------------------------------------
 ; Extension Instruction Exception Handler
 ; ---------------------------------------------
-ARC_ENTRY EV_Extension
+ENTRY(EV_Extension)
        EXCEPTION_PROLOGUE
@@ -417,7 +417,7 @@ ARC_ENTRY EV_Extension
        bl  do_extension_fault
        b   ret_from_exception
-ARC_EXIT EV_Extension
+END(EV_Extension)
 ;######################### System Call Tracing #########################
@@ -504,7 +504,7 @@ trap_with_param:
 ;   (2) Break Points
 ;------------------------------------------------------------------
-ARC_ENTRY EV_Trap
+ENTRY(EV_Trap)
        EXCEPTION_PROLOGUE
@@ -534,9 +534,9 @@ ARC_ENTRY EV_Trap
        jl      [r9]        ; Entry into Sys Call Handler
        ; fall through to ret_from_system_call
-ARC_EXIT EV_Trap
+END(EV_Trap)
-ARC_ENTRY ret_from_system_call
+ENTRY(ret_from_system_call)
        st  r0, [sp, PT_r0]     ; sys call return value in pt_regs
@@ -546,7 +546,7 @@ ARC_ENTRY ret_from_system_call
 ;
 ; If ret to user mode do we need to handle signals, schedule() et al.
-ARC_ENTRY ret_from_exception
+ENTRY(ret_from_exception)
        ; Pre-{IRQ,Trap,Exception} K/U mode from pt_regs->status32
        ld  r8, [sp, PT_status32]   ; returning to User/Kernel Mode
@@ -726,9 +726,9 @@ not_level1_interrupt:
 debug_marker_syscall:
        rtie
-ARC_EXIT ret_from_exception
+END(ret_from_exception)
-ARC_ENTRY ret_from_fork
+ENTRY(ret_from_fork)
        ; when the forked child comes here from the __switch_to function
        ; r0 has the last task pointer.
        ; put last task in scheduler queue
@@ -745,11 +745,11 @@ ARC_ENTRY ret_from_fork
        ; special case of kernel_thread entry point returning back due to
        ; kernel_execve() - pretend return from syscall to ret to userland
        b    ret_from_exception
-ARC_EXIT ret_from_fork
+END(ret_from_fork)
 ;################### Special Sys Call Wrappers ##########################
-ARC_ENTRY sys_clone_wrapper
+ENTRY(sys_clone_wrapper)
        SAVE_CALLEE_SAVED_USER
        bl  @sys_clone
        DISCARD_CALLEE_SAVED_USER
@@ -759,7 +759,7 @@ ARC_ENTRY sys_clone_wrapper
        bnz  tracesys_exit
        b ret_from_system_call
-ARC_EXIT sys_clone_wrapper
+END(sys_clone_wrapper)
 #ifdef CONFIG_ARC_DW2_UNWIND
 ; Workaround for bug 94179 (STAR ):
diff --git a/arch/arc/kernel/head.S b/arch/arc/kernel/head.S
index 991997269d02..4ad04915dc6b 100644
--- a/arch/arc/kernel/head.S
+++ b/arch/arc/kernel/head.S
@@ -24,13 +24,13 @@
        .globl stext
 stext:
        ;-------------------------------------------------------------------
-        ; Don't clobber r0-r4 yet. It might have bootloader provided info
+        ; Don't clobber r0-r2 yet. It might have bootloader provided info
        ;-------------------------------------------------------------------
        sr      @_int_vec_base_lds, [AUX_INTR_VEC_BASE]
 #ifdef CONFIG_SMP
-        ; Only Boot (Master) proceeds. Others wait in platform dependent way
+        ; Ensure Boot (Master) proceeds. Others wait in platform dependent way
        ;       IDENTITY Reg [ 3  2  1  0 ]
        ;       (cpu-id)             ^^^        => Zero for UP ARC700
        ;                                       => #Core-ID if SMP (Master 0)
@@ -39,7 +39,8 @@ stext:
        ; need to make sure only boot cpu takes this path.
        GET_CPU_ID  r5
        cmp     r5, 0
-        jnz     arc_platform_smp_wait_to_boot
+        mov.ne  r0, r5
+        jne     arc_platform_smp_wait_to_boot
 #endif
        ; Clear BSS before updating any globals
        ; XXX: use ZOL here
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index e5f3a837fb35..71c42521c77f 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -155,22 +155,6 @@ static void arc_timer_event_setup(unsigned int limit)
        write_aux_reg(ARC_REG_TIMER0_CTRL, TIMER_CTRL_IE | TIMER_CTRL_NH);
 }
-/*
- * Acknowledge the interrupt (oneshot) and optionally re-arm it (periodic)
- * -Any write to CTRL Reg will ack the intr (NH bit: Count when not halted)
- * -Rearming is done by setting the IE bit
- *
- * Small optimisation: Normal code would have been
- *   if (irq_reenable)
- *     CTRL_REG = (IE | NH);
- *   else
- *     CTRL_REG = NH;
- * However since IE is BIT0 we can fold the branch
- */
-static void arc_timer_event_ack(unsigned int irq_reenable)
-{
-        write_aux_reg(ARC_REG_TIMER0_CTRL, irq_reenable | TIMER_CTRL_NH);
-}
 static int arc_clkevent_set_next_event(unsigned long delta,
                                       struct clock_event_device *dev)
@@ -207,10 +191,22 @@ static DEFINE_PER_CPU(struct clock_event_device, arc_clockevent_device) = {
 static irqreturn_t timer_irq_handler(int irq, void *dev_id)
 {
-        struct clock_event_device *clk = this_cpu_ptr(&arc_clockevent_device);
+        /*
+         * Note that generic IRQ core could have passed @evt for @dev_id if
+         * irq_set_chip_and_handler() asked for handle_percpu_devid_irq()
+         */
+        struct clock_event_device *evt = this_cpu_ptr(&arc_clockevent_device);
+        int irq_reenable = evt->mode == CLOCK_EVT_MODE_PERIODIC;
+        /*
+         * Any write to CTRL reg ACks the interrupt, we rewrite the
+         * Count when [N]ot [H]alted bit.
+         * And re-arm it if perioid by [I]nterrupt [E]nable bit
+         */
+        write_aux_reg(ARC_REG_TIMER0_CTRL, irq_reenable | TIMER_CTRL_NH);
+        evt->event_handler(evt);
-        arc_timer_event_ack(clk->mode == CLOCK_EVT_MODE_PERIODIC);
-        clk->event_handler(clk);
        return IRQ_HANDLED;
 }
@@ -222,9 +218,8 @@ static struct irqaction arc_timer_irq = {
 /*
 * Setup the local event timer for @cpu
- * N.B. weak so that some exotic ARC SoCs can completely override it
 */
-void __weak arc_local_timer_setup(unsigned int cpu)
+void arc_local_timer_setup(unsigned int cpu)
 {
        struct clock_event_device *clk = &per_cpu(arc_clockevent_device, cpu);
diff --git a/arch/arc/lib/memcmp.S b/arch/arc/lib/memcmp.S
index bc813d55b6c3..978bf8314dfb 100644
--- a/arch/arc/lib/memcmp.S
+++ b/arch/arc/lib/memcmp.S
@@ -6,7 +6,7 @@
 * published by the Free Software Foundation.
 */
-#include <asm/linkage.h>
+#include <linux/linkage.h>
 #ifdef __LITTLE_ENDIAN__
 #define WORD2 r2
@@ -16,7 +16,7 @@
 #define SHIFT r2
 #endif
-ARC_ENTRY memcmp
+ENTRY(memcmp)
        or      r12,r0,r1
        asl_s   r12,r12,30
        sub     r3,r2,1
@@ -121,4 +121,4 @@ ARC_ENTRY memcmp
 .Lnil:
        j_s.d   [blink]
        mov     r0,0
-ARC_EXIT memcmp
+END(memcmp)
diff --git a/arch/arc/lib/memcpy-700.S b/arch/arc/lib/memcpy-700.S
index b64cc10ac918..3222573e50de 100644
--- a/arch/arc/lib/memcpy-700.S
+++ b/arch/arc/lib/memcpy-700.S
@@ -6,9 +6,9 @@
 * published by the Free Software Foundation.
 */
-#include <asm/linkage.h>
+#include <linux/linkage.h>
-ARC_ENTRY memcpy
+ENTRY(memcpy)
        or      r3,r0,r1
        asl_s   r3,r3,30
        mov_s   r5,r0
@@ -63,4 +63,4 @@ ARC_ENTRY memcpy
 .Lendbloop:
        j_s.d   [blink]
        stb     r12,[r5,0]
-ARC_EXIT memcpy
+END(memcpy)
diff --git a/arch/arc/lib/memset.S b/arch/arc/lib/memset.S
index 9b2d88d2e141..d36bd43fc98d 100644
--- a/arch/arc/lib/memset.S
+++ b/arch/arc/lib/memset.S
@@ -6,11 +6,11 @@
 * published by the Free Software Foundation.
 */
-#include <asm/linkage.h>
+#include <linux/linkage.h>
 #define SMALL   7 /* Must be at least 6 to deal with alignment/loop issues.  */
-ARC_ENTRY memset
+ENTRY(memset)
        mov_s   r4,r0
        or      r12,r0,r2
        bmsk.f  r12,r12,1
@@ -46,14 +46,14 @@ ARC_ENTRY memset
        stb.ab  r1,[r4,1]
 .Ltiny_end:
        j_s     [blink]
-ARC_EXIT memset
+END(memset)
 ; memzero: @r0 = mem, @r1 = size_t
 ; memset:  @r0 = mem, @r1 = char, @r2 = size_t
-ARC_ENTRY memzero
+ENTRY(memzero)
    ; adjust bzero args to memset args
    mov r2, r1
    mov r1, 0
    b  memset    ;tail call so need to tinker with blink
-ARC_EXIT memzero
+END(memzero)
diff --git a/arch/arc/lib/strchr-700.S b/arch/arc/lib/strchr-700.S
index 9c548c7cf001..b725d5862107 100644
--- a/arch/arc/lib/strchr-700.S
+++ b/arch/arc/lib/strchr-700.S
@@ -11,9 +11,9 @@
   presence of the norm instruction makes it easier to operate on whole
   words branch-free.  */
-#include <asm/linkage.h>
+#include <linux/linkage.h>
-ARC_ENTRY strchr
+ENTRY(strchr)
        extb_s  r1,r1
        asl     r5,r1,8
        bmsk    r2,r0,1
@@ -130,4 +130,4 @@ ARC_ENTRY strchr
        j_s.d   [blink]
        mov.mi  r0,0
 #endif /* ENDIAN */
-ARC_EXIT strchr
+END(strchr)
diff --git a/arch/arc/lib/strcmp.S b/arch/arc/lib/strcmp.S
index 5dc802b45cf3..3544600fefe6 100644
--- a/arch/arc/lib/strcmp.S
+++ b/arch/arc/lib/strcmp.S
@@ -13,9 +13,9 @@
   source 1; however, that would increase the overhead for loop setup / finish,
   and strcmp might often terminate early.  */
-#include <asm/linkage.h>
+#include <linux/linkage.h>
-ARC_ENTRY strcmp
+ENTRY(strcmp)
        or      r2,r0,r1
        bmsk_s  r2,r2,1
        brne    r2,0,.Lcharloop
@@ -93,4 +93,4 @@ ARC_ENTRY strcmp
 .Lcmpend:
        j_s.d   [blink]
        sub     r0,r2,r3
-ARC_EXIT strcmp
+END(strcmp)
diff --git a/arch/arc/lib/strcpy-700.S b/arch/arc/lib/strcpy-700.S
index b7ca4ae81d88..8422f38e1218 100644
--- a/arch/arc/lib/strcpy-700.S
+++ b/arch/arc/lib/strcpy-700.S
@@ -16,9 +16,9 @@
   there, but the it is not likely to be taken often, and it
   would also be likey to cost an unaligned mispredict at the next call.  */
-#include <asm/linkage.h>
+#include <linux/linkage.h>
-ARC_ENTRY strcpy
+ENTRY(strcpy)
        or      r2,r0,r1
        bmsk_s  r2,r2,1
        brne.d  r2,0,charloop
@@ -67,4 +67,4 @@ charloop:
        brne.d  r3,0,charloop
        stb.ab  r3,[r10,1]
        j       [blink]
-ARC_EXIT strcpy
+END(strcpy)
diff --git a/arch/arc/lib/strlen.S b/arch/arc/lib/strlen.S
index 39759e099696..53cfd5685a5f 100644
--- a/arch/arc/lib/strlen.S
+++ b/arch/arc/lib/strlen.S
@@ -6,9 +6,9 @@
 * published by the Free Software Foundation.
 */
-#include <asm/linkage.h>
+#include <linux/linkage.h>
-ARC_ENTRY strlen
+ENTRY(strlen)
        or      r3,r0,7
        ld      r2,[r3,-7]
        ld.a    r6,[r3,-3]
@@ -80,4 +80,4 @@ ARC_ENTRY strlen
 .Learly_end:
        b.d     .Lend
        sub_s.ne r1,r1,r1
-ARC_EXIT strlen
+END(strlen)
diff --git a/arch/arc/mm/cache_arc700.c b/arch/arc/mm/cache_arc700.c
index 400c663b21c2..89edf7961a2f 100644
--- a/arch/arc/mm/cache_arc700.c
+++ b/arch/arc/mm/cache_arc700.c
@@ -100,10 +100,9 @@
 #define DC_CTRL_INV_MODE_FLUSH  0x40
 #define DC_CTRL_FLUSH_STATUS    0x100
-char *arc_cache_mumbojumbo(int cpu_id, char *buf, int len)
+char *arc_cache_mumbojumbo(int c, char *buf, int len)
 {
        int n = 0;
-        unsigned int c = smp_processor_id();
 #define PR_CACHE(p, enb, str)                                           \
 {                                                                       \
diff --git a/arch/arc/mm/init.c b/arch/arc/mm/init.c
index 55e0a85bea78..523412369f70 100644
--- a/arch/arc/mm/init.c
+++ b/arch/arc/mm/init.c
@@ -10,6 +10,9 @@
 #include <linux/mm.h>
 #include <linux/bootmem.h>
 #include <linux/memblock.h>
+#ifdef CONFIG_BLK_DEV_INITRD
+#include <linux/initrd.h>
+#endif
 #include <linux/swap.h>
 #include <linux/module.h>
 #include <asm/page.h>
@@ -42,6 +45,24 @@ void __init early_init_dt_add_memory_arch(u64 base, u64 size)
        pr_info("Memory size set via devicetree %ldM\n", TO_MB(arc_mem_sz));
 }
+#ifdef CONFIG_BLK_DEV_INITRD
+static int __init early_initrd(char *p)
+{
+        unsigned long start, size;
+        char *endp;
+        start = memparse(p, &endp);
+        if (*endp == ',') {
+                size = memparse(endp + 1, NULL);
+                initrd_start = (unsigned long)__va(start);
+                initrd_end = (unsigned long)__va(start + size);
+        }
+        return 0;
+}
+early_param("initrd", early_initrd);
+#endif
 /*
 * First memory setup routine called from setup_arch()
 * 1. setup swapper's mm @init_mm
@@ -80,6 +101,12 @@ void __init setup_arch_memory(void)
        memblock_reserve(CONFIG_LINUX_LINK_BASE,
                         __pa(_end) - CONFIG_LINUX_LINK_BASE);
+#ifdef CONFIG_BLK_DEV_INITRD
+        /*------------- reserve initrd image -----------------------*/
+        if (initrd_start)
+                memblock_reserve(__pa(initrd_start), initrd_end - initrd_start);
+#endif
        memblock_dump_all();
        /*-------------- node setup --------------------------------*/
diff --git a/arch/arc/mm/tlbex.S b/arch/arc/mm/tlbex.S
index 3fcfdb38d242..79bfc81358c9 100644
--- a/arch/arc/mm/tlbex.S
+++ b/arch/arc/mm/tlbex.S
@@ -260,7 +260,7 @@ ARCFP_CODE	;Fast Path Code, candidate for ICCM
 ; I-TLB Miss Exception Handler
 ;-----------------------------------------------------------------------------
-ARC_ENTRY EV_TLBMissI
+ENTRY(EV_TLBMissI)
        TLBMISS_FREEUP_REGS
@@ -293,13 +293,13 @@ ARC_ENTRY EV_TLBMissI
        TLBMISS_RESTORE_REGS
        rtie
-ARC_EXIT EV_TLBMissI
+END(EV_TLBMissI)
 ;-----------------------------------------------------------------------------
 ; D-TLB Miss Exception Handler
 ;-----------------------------------------------------------------------------
-ARC_ENTRY EV_TLBMissD
+ENTRY(EV_TLBMissD)
        TLBMISS_FREEUP_REGS
@@ -381,6 +381,4 @@ do_slow_path_pf:
        bl  do_page_fault
        b   ret_from_exception
-ARC_EXIT EV_TLBMissD
+END(EV_TLBMissD)
-ARC_ENTRY EV_TLBMissB   ; Bogus entry to measure sz of DTLBMiss hdlr
diff --git a/arch/arc/plat-arcfpga/Kconfig b/arch/arc/plat-arcfpga/Kconfig
index 295cefeb25d3..33058aa40e77 100644
--- a/arch/arc/plat-arcfpga/Kconfig
+++ b/arch/arc/plat-arcfpga/Kconfig
@@ -33,7 +33,6 @@ config ISS_SMP_EXTN
        bool "ARC SMP Extensions (ISS Models only)"
        default n
        depends on SMP
-        select ARC_HAS_COH_RTSC
        help
          SMP Extensions to ARC700, in a "simulation only" Model, supported in
          ARC ISS (Instruction Set Simulator).
diff --git a/arch/arc/plat-arcfpga/platform.c b/arch/arc/plat-arcfpga/platform.c
index d71f3c3bcf24..19b76b61f44b 100644
--- a/arch/arc/plat-arcfpga/platform.c
+++ b/arch/arc/plat-arcfpga/platform.c
@@ -201,7 +201,7 @@ static void __init plat_fpga_populate_dev(void)
 * callback set, by matching the DT compatible name.
 */
-static const char *aa4_compat[] __initdata = {
+static const char *aa4_compat[] __initconst = {
        "snps,arc-angel4",
        NULL,
 };
@@ -216,7 +216,7 @@ MACHINE_START(ANGEL4, "angel4")
 #endif
 MACHINE_END
-static const char *ml509_compat[] __initdata = {
+static const char *ml509_compat[] __initconst = {
        "snps,arc-ml509",
        NULL,
 };
@@ -231,7 +231,7 @@ MACHINE_START(ML509, "ml509")
 #endif
 MACHINE_END
-static const char *nsimosci_compat[] __initdata = {
+static const char *nsimosci_compat[] __initconst = {
        "snps,nsimosci",
        NULL,
 };