diff options
Diffstat (limited to 'arch/arc/plat-arcfpga/platform.c')
-rw-r--r-- | arch/arc/plat-arcfpga/platform.c | 55 |
1 files changed, 0 insertions, 55 deletions
diff --git a/arch/arc/plat-arcfpga/platform.c b/arch/arc/plat-arcfpga/platform.c index 213394a15cd2..f09e771b4bbd 100644 --- a/arch/arc/plat-arcfpga/platform.c +++ b/arch/arc/plat-arcfpga/platform.c | |||
@@ -22,59 +22,6 @@ | |||
22 | #include <plat/smp.h> | 22 | #include <plat/smp.h> |
23 | #include <plat/irq.h> | 23 | #include <plat/irq.h> |
24 | 24 | ||
25 | /*-----------------------BVCI Latency Unit -----------------------------*/ | ||
26 | |||
27 | #ifdef CONFIG_ARC_HAS_BVCI_LAT_UNIT | ||
28 | |||
29 | int lat_cycles = CONFIG_BVCI_LAT_CYCLES; | ||
30 | |||
31 | /* BVCI Bus Profiler: Latency Unit */ | ||
32 | static void __init setup_bvci_lat_unit(void) | ||
33 | { | ||
34 | #define MAX_BVCI_UNITS 12 | ||
35 | |||
36 | unsigned int i; | ||
37 | unsigned int *base = (unsigned int *)BVCI_LAT_UNIT_BASE; | ||
38 | const unsigned long units_req = CONFIG_BVCI_LAT_UNITS; | ||
39 | const unsigned int REG_UNIT = 21; | ||
40 | const unsigned int REG_VAL = 22; | ||
41 | |||
42 | /* | ||
43 | * There are multiple Latency Units corresponding to the many | ||
44 | * interfaces of the system bus arbiter (both CPU side as well as | ||
45 | * the peripheral side). | ||
46 | * | ||
47 | * Unit 0 - System Arb and Mem Controller - adds latency to all | ||
48 | * memory trasactions | ||
49 | * Unit 1 - I$ and System Bus | ||
50 | * Unit 2 - D$ and System Bus | ||
51 | * .. | ||
52 | * Unit 12 - IDE Disk controller and System Bus | ||
53 | * | ||
54 | * The programmers model requires writing to lat_unit reg first | ||
55 | * and then the latency value (cycles) to lat_value reg | ||
56 | */ | ||
57 | |||
58 | if (CONFIG_BVCI_LAT_UNITS == 0) { | ||
59 | writel(0, base + REG_UNIT); | ||
60 | writel(lat_cycles, base + REG_VAL); | ||
61 | pr_info("BVCI Latency for all Memory Transactions %d cycles\n", | ||
62 | lat_cycles); | ||
63 | } else { | ||
64 | for_each_set_bit(i, &units_req, MAX_BVCI_UNITS) { | ||
65 | writel(i + 1, base + REG_UNIT); /* loop is 0 based */ | ||
66 | writel(lat_cycles, base + REG_VAL); | ||
67 | pr_info("BVCI Latency for Unit[%d] = %d cycles\n", | ||
68 | (i + 1), lat_cycles); | ||
69 | } | ||
70 | } | ||
71 | } | ||
72 | #else | ||
73 | static void __init setup_bvci_lat_unit(void) | ||
74 | { | ||
75 | } | ||
76 | #endif | ||
77 | |||
78 | /*----------------------- Platform Devices -----------------------------*/ | 25 | /*----------------------- Platform Devices -----------------------------*/ |
79 | 26 | ||
80 | #if IS_ENABLED(CONFIG_SERIAL_ARC) | 27 | #if IS_ENABLED(CONFIG_SERIAL_ARC) |
@@ -165,8 +112,6 @@ static void __init plat_fpga_early_init(void) | |||
165 | { | 112 | { |
166 | pr_info("[plat-arcfpga]: registering early dev resources\n"); | 113 | pr_info("[plat-arcfpga]: registering early dev resources\n"); |
167 | 114 | ||
168 | setup_bvci_lat_unit(); | ||
169 | |||
170 | arc_fpga_serial_init(); | 115 | arc_fpga_serial_init(); |
171 | 116 | ||
172 | #ifdef CONFIG_ISS_SMP_EXTN | 117 | #ifdef CONFIG_ISS_SMP_EXTN |