7 files changed, 378 insertions, 0 deletions

diff --git a/arch/arc/kernel/Makefile b/arch/arc/kernel/Makefile
index f32f65f98850..46c15ff97e97 100644
--- a/arch/arc/kernel/Makefile
+++ b/arch/arc/kernel/Makefile
@@ -13,6 +13,7 @@ obj-y	+= signal.o traps.o sys.o troubleshoot.o stacktrace.o clk.o
 obj-y   += devtree.o
 
 obj-$(CONFIG_MODULES)                   += arcksyms.o module.o
+obj-$(CONFIG_SMP)                       += smp.o
 
 obj-$(CONFIG_ARC_FPU_SAVE_RESTORE)      += fpu.o
 CFLAGS_fpu.o   += -mdpfp
diff --git a/arch/arc/kernel/ctx_sw.c b/arch/arc/kernel/ctx_sw.c
index fbf739cbaf7d..60844dac6132 100644
--- a/arch/arc/kernel/ctx_sw.c
+++ b/arch/arc/kernel/ctx_sw.c
@@ -58,7 +58,18 @@ __switch_to(struct task_struct *prev_task, struct task_struct *next_task)
                  * For SMP extra work to get to &_current_task[cpu]
                  * (open coded SET_CURR_TASK_ON_CPU)
                  */
+#ifndef CONFIG_SMP
                 "st  %2, [@_current_task]       \n\t"
+#else
+                "lr   r24, [identity]           \n\t"
+                "lsr  r24, r24, 8               \n\t"
+                "bmsk r24, r24, 7               \n\t"
+                "add2 r24, @_current_task, r24  \n\t"
+                "st   %2,  [r24]                \n\t"
+#endif
+#ifdef CONFIG_ARC_CURR_IN_REG
+                "mov r25, %2   \n\t"
+#endif
 
                 /* get ksp of incoming task from tsk->thread.ksp */
                 "ld.as  sp, [%2, %1]   \n\t"
diff --git a/arch/arc/kernel/entry.S b/arch/arc/kernel/entry.S
index e33a0bf45589..3f6ce98fea11 100644
--- a/arch/arc/kernel/entry.S
+++ b/arch/arc/kernel/entry.S
@@ -232,7 +232,11 @@ ARC_EXIT handle_interrupt_level2
 ARC_ENTRY handle_interrupt_level1
 
         /* free up r9 as scratchpad */
+#ifdef CONFIG_SMP
+        sr  r9, [ARC_REG_SCRATCH_DATA0]
+#else
         st   r9, [@int1_saved_reg]
+#endif
 
         ;Which mode (user/kernel) was the system in when intr occured
         lr  r9, [status32_l1]
diff --git a/arch/arc/kernel/head.S b/arch/arc/kernel/head.S
index e63f6a43abb1..006dec3fc353 100644
--- a/arch/arc/kernel/head.S
+++ b/arch/arc/kernel/head.S
@@ -27,6 +27,15 @@ stext:
         ; Don't clobber r0-r4 yet. It might have bootloader provided info
         ;-------------------------------------------------------------------
 
+#ifdef CONFIG_SMP
+        ; Only Boot (Master) proceeds. Others wait in platform dependent way
+        ;       IDENTITY Reg [ 3  2  1  0 ]
+        ;       (cpu-id)             ^^^        => Zero for UP ARC700
+        ;                                       => #Core-ID if SMP (Master 0)
+        GET_CPU_ID  r5
+        cmp     r5, 0
+        jnz     arc_platform_smp_wait_to_boot
+#endif
         ; Clear BSS before updating any globals
         ; XXX: use ZOL here
         mov     r5, __bss_start
@@ -76,3 +85,27 @@ stext:
         GET_TSK_STACK_BASE r9, sp       ; r9 = tsk, sp = stack base(output)
 
         j       start_kernel    ; "C" entry point
+
+#ifdef CONFIG_SMP
+;----------------------------------------------------------------
+;     First lines of code run by secondary before jumping to 'C'
+;----------------------------------------------------------------
+        .section .init.text, "ax",@progbits
+        .type first_lines_of_secondary, @function
+        .globl first_lines_of_secondary
+
+first_lines_of_secondary:
+
+        ; setup per-cpu idle task as "current" on this CPU
+        ld      r0, [@secondary_idle_tsk]
+        SET_CURR_TASK_ON_CPU  r0, r1
+
+        ; setup stack (fp, sp)
+        mov     fp, 0
+
+        ; set it's stack base to tsk->thread_info bottom
+        GET_TSK_STACK_BASE r0, sp
+
+        j       start_kernel_secondary
+
+#endif
diff --git a/arch/arc/kernel/irq.c b/arch/arc/kernel/irq.c
index ca70894e2309..df7da2b5a5bd 100644
--- a/arch/arc/kernel/irq.c
+++ b/arch/arc/kernel/irq.c
@@ -124,6 +124,11 @@ void __init init_IRQ(void)
 {
         init_onchip_IRQ();
         plat_init_IRQ();
+
+#ifdef CONFIG_SMP
+        /* Master CPU can initialize it's side of IPI */
+        arc_platform_smp_init_cpu();
+#endif
 }
 
 /*
diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c
index 27aebd6d9513..4026b5a004d2 100644
--- a/arch/arc/kernel/setup.c
+++ b/arch/arc/kernel/setup.c
@@ -86,6 +86,10 @@ void __init setup_arch(char **cmdline_p)
 
         setup_processor();
 
+#ifdef CONFIG_SMP
+        smp_init_cpus();
+#endif
+
         setup_arch_memory();
 
         unflatten_device_tree();
diff --git a/arch/arc/kernel/smp.c b/arch/arc/kernel/smp.c
new file mode 100644
index 000000000000..1f762ad6969b
--- /dev/null
+++ b/arch/arc/kernel/smp.c
@@ -0,0 +1,320 @@
+/*
+ * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * RajeshwarR: Dec 11, 2007
+ *   -- Added support for Inter Processor Interrupts
+ *
+ * Vineetg: Nov 1st, 2007
+ *    -- Initial Write (Borrowed heavily from ARM)
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/spinlock.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/profile.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/mm.h>
+#include <linux/cpu.h>
+#include <linux/smp.h>
+#include <linux/irq.h>
+#include <linux/delay.h>
+#include <linux/atomic.h>
+#include <linux/percpu.h>
+#include <linux/cpumask.h>
+#include <linux/spinlock_types.h>
+#include <linux/reboot.h>
+#include <asm/processor.h>
+#include <asm/setup.h>
+
+arch_spinlock_t smp_atomic_ops_lock = __ARCH_SPIN_LOCK_UNLOCKED;
+arch_spinlock_t smp_bitops_lock = __ARCH_SPIN_LOCK_UNLOCKED;
+
+/* XXX: per cpu ? Only needed once in early seconday boot */
+struct task_struct *secondary_idle_tsk;
+
+/* Called from start_kernel */
+void __init smp_prepare_boot_cpu(void)
+{
+}
+
+/*
+ * Initialise the CPU possible map early - this describes the CPUs
+ * which may be present or become present in the system.
+ */
+void __init smp_init_cpus(void)
+{
+        unsigned int i;
+
+        for (i = 0; i < NR_CPUS; i++)
+                set_cpu_possible(i, true);
+}
+
+/* called from init ( ) =>  process 1 */
+void __init smp_prepare_cpus(unsigned int max_cpus)
+{
+        int i;
+
+        /*
+         * Initialise the present map, which describes the set of CPUs
+         * actually populated at the present time.
+         */
+        for (i = 0; i < max_cpus; i++)
+                set_cpu_present(i, true);
+}
+
+void __init smp_cpus_done(unsigned int max_cpus)
+{
+
+}
+
+/*
+ * After power-up, a non Master CPU needs to wait for Master to kick start it
+ *
+ * The default implementation halts
+ *
+ * This relies on platform specific support allowing Master to directly set
+ * this CPU's PC (to be @first_lines_of_secondary() and kick start it.
+ *
+ * In lack of such h/w assist, platforms can override this function
+ *   - make this function busy-spin on a token, eventually set by Master
+ *     (from arc_platform_smp_wakeup_cpu())
+ *   - Once token is available, jump to @first_lines_of_secondary
+ *     (using inline asm).
+ *
+ * Alert: can NOT use stack here as it has not been determined/setup for CPU.
+ *        If it turns out to be elaborate, it's better to code it in assembly
+ *
+ */
+void __attribute__((weak)) arc_platform_smp_wait_to_boot(int cpu)
+{
+        /*
+         * As a hack for debugging - since debugger will single-step over the
+         * FLAG insn - wrap the halt itself it in a self loop
+         */
+        __asm__ __volatile__(
+        "1:             \n"
+        "       flag 1  \n"
+        "       b 1b    \n");
+}
+
+/*
+ * The very first "C" code executed by secondary
+ * Called from asm stub in head.S
+ * "current"/R25 already setup by low level boot code
+ */
+void __cpuinit start_kernel_secondary(void)
+{
+        struct mm_struct *mm = &init_mm;
+        unsigned int cpu = smp_processor_id();
+
+        /* MMU, Caches, Vector Table, Interrupts etc */
+        setup_processor();
+
+        atomic_inc(&mm->mm_users);
+        atomic_inc(&mm->mm_count);
+        current->active_mm = mm;
+
+        notify_cpu_starting(cpu);
+        set_cpu_online(cpu, true);
+
+        pr_info("## CPU%u LIVE ##: Executing Code...\n", cpu);
+
+        arc_platform_smp_init_cpu();
+
+        arc_local_timer_setup(cpu);
+
+        local_irq_enable();
+        preempt_disable();
+        cpu_idle();
+}
+
+/*
+ * Called from kernel_init( ) -> smp_init( ) - for each CPU
+ *
+ * At this point, Secondary Processor  is "HALT"ed:
+ *  -It booted, but was halted in head.S
+ *  -It was configured to halt-on-reset
+ *  So need to wake it up.
+ *
+ * Essential requirements being where to run from (PC) and stack (SP)
+*/
+int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle)
+{
+        unsigned long wait_till;
+
+        secondary_idle_tsk = idle;
+
+        pr_info("Idle Task [%d] %p", cpu, idle);
+        pr_info("Trying to bring up CPU%u ...\n", cpu);
+
+        arc_platform_smp_wakeup_cpu(cpu,
+                                (unsigned long)first_lines_of_secondary);
+
+        /* wait for 1 sec after kicking the secondary */
+        wait_till = jiffies + HZ;
+        while (time_before(jiffies, wait_till)) {
+                if (cpu_online(cpu))
+                        break;
+        }
+
+        if (!cpu_online(cpu)) {
+                pr_info("Timeout: CPU%u FAILED to comeup !!!\n", cpu);
+                return -1;
+        }
+
+        secondary_idle_tsk = NULL;
+
+        return 0;
+}
+
+/*
+ * not supported here
+ */
+int __init setup_profiling_timer(unsigned int multiplier)
+{
+        return -EINVAL;
+}
+
+/*****************************************************************************/
+/*              Inter Processor Interrupt Handling                           */
+/*****************************************************************************/
+
+/*
+ * structures for inter-processor calls
+ * A Collection of single bit ipi messages
+ *
+ */
+
+/*
+ * TODO_rajesh investigate tlb message types.
+ * IPI Timer not needed because each ARC has an individual Interrupting Timer
+ */
+enum ipi_msg_type {
+        IPI_NOP = 0,
+        IPI_RESCHEDULE = 1,
+        IPI_CALL_FUNC,
+        IPI_CALL_FUNC_SINGLE,
+        IPI_CPU_STOP
+};
+
+struct ipi_data {
+        unsigned long bits;
+};
+
+static DEFINE_PER_CPU(struct ipi_data, ipi_data);
+
+static void ipi_send_msg(const struct cpumask *callmap, enum ipi_msg_type msg)
+{
+        unsigned long flags;
+        unsigned int cpu;
+
+        local_irq_save(flags);
+
+        for_each_cpu(cpu, callmap) {
+                struct ipi_data *ipi = &per_cpu(ipi_data, cpu);
+                set_bit(msg, &ipi->bits);
+        }
+
+        /* Call the platform specific cross-CPU call function  */
+        arc_platform_ipi_send(callmap);
+
+        local_irq_restore(flags);
+}
+
+void smp_send_reschedule(int cpu)
+{
+        ipi_send_msg(cpumask_of(cpu), IPI_RESCHEDULE);
+}
+
+void smp_send_stop(void)
+{
+        struct cpumask targets;
+        cpumask_copy(&targets, cpu_online_mask);
+        cpumask_clear_cpu(smp_processor_id(), &targets);
+        ipi_send_msg(&targets, IPI_CPU_STOP);
+}
+
+void arch_send_call_function_single_ipi(int cpu)
+{
+        ipi_send_msg(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
+}
+
+void arch_send_call_function_ipi_mask(const struct cpumask *mask)
+{
+        ipi_send_msg(mask, IPI_CALL_FUNC);
+}
+
+/*
+ * ipi_cpu_stop - handle IPI from smp_send_stop()
+ */
+static void ipi_cpu_stop(unsigned int cpu)
+{
+        machine_halt();
+}
+
+static inline void __do_IPI(unsigned long *ops, struct ipi_data *ipi, int cpu)
+{
+        unsigned long msg = 0;
+
+        do {
+                msg = find_next_bit(ops, BITS_PER_LONG, msg+1);
+
+                switch (msg) {
+                case IPI_RESCHEDULE:
+                        scheduler_ipi();
+                        break;
+
+                case IPI_CALL_FUNC:
+                        generic_smp_call_function_interrupt();
+                        break;
+
+                case IPI_CALL_FUNC_SINGLE:
+                        generic_smp_call_function_single_interrupt();
+                        break;
+
+                case IPI_CPU_STOP:
+                        ipi_cpu_stop(cpu);
+                        break;
+                }
+        } while (msg < BITS_PER_LONG);
+
+}
+
+/*
+ * arch-common ISR to handle for inter-processor interrupts
+ * Has hooks for platform specific IPI
+ */
+irqreturn_t do_IPI(int irq, void *dev_id)
+{
+        int cpu = smp_processor_id();
+        struct ipi_data *ipi = &per_cpu(ipi_data, cpu);
+        unsigned long ops;
+
+        arc_platform_ipi_clear(cpu, irq);
+
+        /*
+         * XXX: is this loop really needed
+         * And do we need to move ipi_clean inside
+         */
+        while ((ops = xchg(&ipi->bits, 0)) != 0)
+                __do_IPI(&ops, ipi, cpu);
+
+        return IRQ_HANDLED;
+}
+
+/*
+ * API called by platform code to hookup arch-common ISR to their IPI IRQ
+ */
+static DEFINE_PER_CPU(int, ipi_dev);
+int smp_ipi_irq_setup(int cpu, int irq)
+{
+        int *dev_id = &per_cpu(ipi_dev, smp_processor_id());
+        return request_percpu_irq(irq, do_IPI, "IPI Interrupt", dev_id);
+}