diff options
Diffstat (limited to 'arch/arc/include/asm')
| -rw-r--r-- | arch/arc/include/asm/cacheflush.h | 6 | ||||
| -rw-r--r-- | arch/arc/include/asm/page.h | 9 | ||||
| -rw-r--r-- | arch/arc/include/asm/pgtable.h | 26 | ||||
| -rw-r--r-- | arch/arc/include/asm/tlb.h | 2 |
4 files changed, 20 insertions, 23 deletions
diff --git a/arch/arc/include/asm/cacheflush.h b/arch/arc/include/asm/cacheflush.h index 9f841af41092..ef62682e8d95 100644 --- a/arch/arc/include/asm/cacheflush.h +++ b/arch/arc/include/asm/cacheflush.h | |||
| @@ -93,14 +93,16 @@ static inline int cache_is_vipt_aliasing(void) | |||
| 93 | #endif | 93 | #endif |
| 94 | } | 94 | } |
| 95 | 95 | ||
| 96 | #define CACHE_COLOR(addr) (((unsigned long)(addr) >> (PAGE_SHIFT)) & 3) | 96 | #define CACHE_COLOR(addr) (((unsigned long)(addr) >> (PAGE_SHIFT)) & 1) |
| 97 | 97 | ||
| 98 | /* | 98 | /* |
| 99 | * checks if two addresses (after page aligning) index into same cache set | 99 | * checks if two addresses (after page aligning) index into same cache set |
| 100 | */ | 100 | */ |
| 101 | #define addr_not_cache_congruent(addr1, addr2) \ | 101 | #define addr_not_cache_congruent(addr1, addr2) \ |
| 102 | ({ \ | ||
| 102 | cache_is_vipt_aliasing() ? \ | 103 | cache_is_vipt_aliasing() ? \ |
| 103 | (CACHE_COLOR(addr1) != CACHE_COLOR(addr2)) : 0 \ | 104 | (CACHE_COLOR(addr1) != CACHE_COLOR(addr2)) : 0; \ |
| 105 | }) | ||
| 104 | 106 | ||
| 105 | #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ | 107 | #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ |
| 106 | do { \ | 108 | do { \ |
diff --git a/arch/arc/include/asm/page.h b/arch/arc/include/asm/page.h index 374a35514116..ab84bf131fe1 100644 --- a/arch/arc/include/asm/page.h +++ b/arch/arc/include/asm/page.h | |||
| @@ -19,13 +19,6 @@ | |||
| 19 | #define clear_page(paddr) memset((paddr), 0, PAGE_SIZE) | 19 | #define clear_page(paddr) memset((paddr), 0, PAGE_SIZE) |
| 20 | #define copy_page(to, from) memcpy((to), (from), PAGE_SIZE) | 20 | #define copy_page(to, from) memcpy((to), (from), PAGE_SIZE) |
| 21 | 21 | ||
| 22 | #ifndef CONFIG_ARC_CACHE_VIPT_ALIASING | ||
| 23 | |||
| 24 | #define clear_user_page(addr, vaddr, pg) clear_page(addr) | ||
| 25 | #define copy_user_page(vto, vfrom, vaddr, pg) copy_page(vto, vfrom) | ||
| 26 | |||
| 27 | #else /* VIPT aliasing dcache */ | ||
| 28 | |||
| 29 | struct vm_area_struct; | 22 | struct vm_area_struct; |
| 30 | struct page; | 23 | struct page; |
| 31 | 24 | ||
| @@ -35,8 +28,6 @@ void copy_user_highpage(struct page *to, struct page *from, | |||
| 35 | unsigned long u_vaddr, struct vm_area_struct *vma); | 28 | unsigned long u_vaddr, struct vm_area_struct *vma); |
| 36 | void clear_user_page(void *to, unsigned long u_vaddr, struct page *page); | 29 | void clear_user_page(void *to, unsigned long u_vaddr, struct page *page); |
| 37 | 30 | ||
| 38 | #endif /* CONFIG_ARC_CACHE_VIPT_ALIASING */ | ||
| 39 | |||
| 40 | #undef STRICT_MM_TYPECHECKS | 31 | #undef STRICT_MM_TYPECHECKS |
| 41 | 32 | ||
| 42 | #ifdef STRICT_MM_TYPECHECKS | 33 | #ifdef STRICT_MM_TYPECHECKS |
diff --git a/arch/arc/include/asm/pgtable.h b/arch/arc/include/asm/pgtable.h index 1cc4720faccb..95b1522212a7 100644 --- a/arch/arc/include/asm/pgtable.h +++ b/arch/arc/include/asm/pgtable.h | |||
| @@ -57,9 +57,9 @@ | |||
| 57 | 57 | ||
| 58 | #define _PAGE_ACCESSED (1<<1) /* Page is accessed (S) */ | 58 | #define _PAGE_ACCESSED (1<<1) /* Page is accessed (S) */ |
| 59 | #define _PAGE_CACHEABLE (1<<2) /* Page is cached (H) */ | 59 | #define _PAGE_CACHEABLE (1<<2) /* Page is cached (H) */ |
| 60 | #define _PAGE_EXECUTE (1<<3) /* Page has user execute perm (H) */ | 60 | #define _PAGE_U_EXECUTE (1<<3) /* Page has user execute perm (H) */ |
| 61 | #define _PAGE_WRITE (1<<4) /* Page has user write perm (H) */ | 61 | #define _PAGE_U_WRITE (1<<4) /* Page has user write perm (H) */ |
| 62 | #define _PAGE_READ (1<<5) /* Page has user read perm (H) */ | 62 | #define _PAGE_U_READ (1<<5) /* Page has user read perm (H) */ |
| 63 | #define _PAGE_K_EXECUTE (1<<6) /* Page has kernel execute perm (H) */ | 63 | #define _PAGE_K_EXECUTE (1<<6) /* Page has kernel execute perm (H) */ |
| 64 | #define _PAGE_K_WRITE (1<<7) /* Page has kernel write perm (H) */ | 64 | #define _PAGE_K_WRITE (1<<7) /* Page has kernel write perm (H) */ |
| 65 | #define _PAGE_K_READ (1<<8) /* Page has kernel perm (H) */ | 65 | #define _PAGE_K_READ (1<<8) /* Page has kernel perm (H) */ |
| @@ -72,9 +72,9 @@ | |||
| 72 | 72 | ||
| 73 | /* PD1 */ | 73 | /* PD1 */ |
| 74 | #define _PAGE_CACHEABLE (1<<0) /* Page is cached (H) */ | 74 | #define _PAGE_CACHEABLE (1<<0) /* Page is cached (H) */ |
| 75 | #define _PAGE_EXECUTE (1<<1) /* Page has user execute perm (H) */ | 75 | #define _PAGE_U_EXECUTE (1<<1) /* Page has user execute perm (H) */ |
| 76 | #define _PAGE_WRITE (1<<2) /* Page has user write perm (H) */ | 76 | #define _PAGE_U_WRITE (1<<2) /* Page has user write perm (H) */ |
| 77 | #define _PAGE_READ (1<<3) /* Page has user read perm (H) */ | 77 | #define _PAGE_U_READ (1<<3) /* Page has user read perm (H) */ |
| 78 | #define _PAGE_K_EXECUTE (1<<4) /* Page has kernel execute perm (H) */ | 78 | #define _PAGE_K_EXECUTE (1<<4) /* Page has kernel execute perm (H) */ |
| 79 | #define _PAGE_K_WRITE (1<<5) /* Page has kernel write perm (H) */ | 79 | #define _PAGE_K_WRITE (1<<5) /* Page has kernel write perm (H) */ |
| 80 | #define _PAGE_K_READ (1<<6) /* Page has kernel perm (H) */ | 80 | #define _PAGE_K_READ (1<<6) /* Page has kernel perm (H) */ |
| @@ -93,7 +93,8 @@ | |||
| 93 | #endif | 93 | #endif |
| 94 | 94 | ||
| 95 | /* Kernel allowed all permissions for all pages */ | 95 | /* Kernel allowed all permissions for all pages */ |
| 96 | #define _K_PAGE_PERMS (_PAGE_K_EXECUTE | _PAGE_K_WRITE | _PAGE_K_READ) | 96 | #define _K_PAGE_PERMS (_PAGE_K_EXECUTE | _PAGE_K_WRITE | _PAGE_K_READ | \ |
| 97 | _PAGE_GLOBAL | _PAGE_PRESENT) | ||
| 97 | 98 | ||
| 98 | #ifdef CONFIG_ARC_CACHE_PAGES | 99 | #ifdef CONFIG_ARC_CACHE_PAGES |
| 99 | #define _PAGE_DEF_CACHEABLE _PAGE_CACHEABLE | 100 | #define _PAGE_DEF_CACHEABLE _PAGE_CACHEABLE |
| @@ -106,7 +107,11 @@ | |||
| 106 | * -by default cached, unless config otherwise | 107 | * -by default cached, unless config otherwise |
| 107 | * -present in memory | 108 | * -present in memory |
| 108 | */ | 109 | */ |
| 109 | #define ___DEF (_PAGE_PRESENT | _K_PAGE_PERMS | _PAGE_DEF_CACHEABLE) | 110 | #define ___DEF (_PAGE_PRESENT | _PAGE_DEF_CACHEABLE) |
| 111 | |||
| 112 | #define _PAGE_READ (_PAGE_U_READ | _PAGE_K_READ) | ||
| 113 | #define _PAGE_WRITE (_PAGE_U_WRITE | _PAGE_K_WRITE) | ||
| 114 | #define _PAGE_EXECUTE (_PAGE_U_EXECUTE | _PAGE_K_EXECUTE) | ||
| 110 | 115 | ||
| 111 | /* Set of bits not changed in pte_modify */ | 116 | /* Set of bits not changed in pte_modify */ |
| 112 | #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED) | 117 | #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED) |
| @@ -125,11 +130,10 @@ | |||
| 125 | * kernel vaddr space - visible in all addr spaces, but kernel mode only | 130 | * kernel vaddr space - visible in all addr spaces, but kernel mode only |
| 126 | * Thus Global, all-kernel-access, no-user-access, cached | 131 | * Thus Global, all-kernel-access, no-user-access, cached |
| 127 | */ | 132 | */ |
| 128 | #define PAGE_KERNEL __pgprot(___DEF | _PAGE_GLOBAL) | 133 | #define PAGE_KERNEL __pgprot(_K_PAGE_PERMS | _PAGE_DEF_CACHEABLE) |
| 129 | 134 | ||
| 130 | /* ioremap */ | 135 | /* ioremap */ |
| 131 | #define PAGE_KERNEL_NO_CACHE __pgprot(_PAGE_PRESENT | _K_PAGE_PERMS | \ | 136 | #define PAGE_KERNEL_NO_CACHE __pgprot(_K_PAGE_PERMS) |
| 132 | _PAGE_GLOBAL) | ||
| 133 | 137 | ||
| 134 | /************************************************************************** | 138 | /************************************************************************** |
| 135 | * Mapping of vm_flags (Generic VM) to PTE flags (arch specific) | 139 | * Mapping of vm_flags (Generic VM) to PTE flags (arch specific) |
diff --git a/arch/arc/include/asm/tlb.h b/arch/arc/include/asm/tlb.h index 85b6df839bd7..cb0c708ca665 100644 --- a/arch/arc/include/asm/tlb.h +++ b/arch/arc/include/asm/tlb.h | |||
| @@ -16,7 +16,7 @@ | |||
| 16 | /* Masks for actual TLB "PD"s */ | 16 | /* Masks for actual TLB "PD"s */ |
| 17 | #define PTE_BITS_IN_PD0 (_PAGE_GLOBAL | _PAGE_PRESENT) | 17 | #define PTE_BITS_IN_PD0 (_PAGE_GLOBAL | _PAGE_PRESENT) |
| 18 | #define PTE_BITS_IN_PD1 (PAGE_MASK | _PAGE_CACHEABLE | \ | 18 | #define PTE_BITS_IN_PD1 (PAGE_MASK | _PAGE_CACHEABLE | \ |
| 19 | _PAGE_EXECUTE | _PAGE_WRITE | _PAGE_READ | \ | 19 | _PAGE_U_EXECUTE | _PAGE_U_WRITE | _PAGE_U_READ | \ |
| 20 | _PAGE_K_EXECUTE | _PAGE_K_WRITE | _PAGE_K_READ) | 20 | _PAGE_K_EXECUTE | _PAGE_K_WRITE | _PAGE_K_READ) |
| 21 | 21 | ||
| 22 | #ifndef __ASSEMBLY__ | 22 | #ifndef __ASSEMBLY__ |
