aboutsummaryrefslogtreecommitdiffstats
path: root/arch/alpha/include
diff options
context:
space:
mode:
Diffstat (limited to 'arch/alpha/include')
-rw-r--r--arch/alpha/include/asm/bitops.h4
-rw-r--r--arch/alpha/include/asm/cacheflush.h2
-rw-r--r--arch/alpha/include/asm/core_mcpcia.h2
-rw-r--r--arch/alpha/include/asm/core_t2.h54
-rw-r--r--arch/alpha/include/asm/elf.h2
-rw-r--r--arch/alpha/include/asm/errno.h2
-rw-r--r--arch/alpha/include/asm/fcntl.h2
-rw-r--r--arch/alpha/include/asm/futex.h29
-rw-r--r--arch/alpha/include/asm/gpio.h55
-rw-r--r--arch/alpha/include/asm/io.h8
-rw-r--r--arch/alpha/include/asm/ioctls.h2
-rw-r--r--arch/alpha/include/asm/irqflags.h67
-rw-r--r--arch/alpha/include/asm/mman.h3
-rw-r--r--arch/alpha/include/asm/mmzone.h1
-rw-r--r--arch/alpha/include/asm/perf_event.h11
-rw-r--r--arch/alpha/include/asm/pgtable.h2
-rw-r--r--arch/alpha/include/asm/rwsem.h36
-rw-r--r--arch/alpha/include/asm/smp.h2
-rw-r--r--arch/alpha/include/asm/system.h28
-rw-r--r--arch/alpha/include/asm/types.h12
-rw-r--r--arch/alpha/include/asm/unistd.h7
21 files changed, 180 insertions, 151 deletions
diff --git a/arch/alpha/include/asm/bitops.h b/arch/alpha/include/asm/bitops.h
index adfab8a21dfe..85b815215776 100644
--- a/arch/alpha/include/asm/bitops.h
+++ b/arch/alpha/include/asm/bitops.h
@@ -454,13 +454,11 @@ sched_find_first_bit(const unsigned long b[2])
454 return __ffs(tmp) + ofs; 454 return __ffs(tmp) + ofs;
455} 455}
456 456
457#include <asm-generic/bitops/ext2-non-atomic.h> 457#include <asm-generic/bitops/le.h>
458 458
459#define ext2_set_bit_atomic(l,n,a) test_and_set_bit(n,a) 459#define ext2_set_bit_atomic(l,n,a) test_and_set_bit(n,a)
460#define ext2_clear_bit_atomic(l,n,a) test_and_clear_bit(n,a) 460#define ext2_clear_bit_atomic(l,n,a) test_and_clear_bit(n,a)
461 461
462#include <asm-generic/bitops/minix.h>
463
464#endif /* __KERNEL__ */ 462#endif /* __KERNEL__ */
465 463
466#endif /* _ALPHA_BITOPS_H */ 464#endif /* _ALPHA_BITOPS_H */
diff --git a/arch/alpha/include/asm/cacheflush.h b/arch/alpha/include/asm/cacheflush.h
index 012f1243b1c1..a9cb6aa447aa 100644
--- a/arch/alpha/include/asm/cacheflush.h
+++ b/arch/alpha/include/asm/cacheflush.h
@@ -63,7 +63,7 @@ extern void flush_icache_user_range(struct vm_area_struct *vma,
63 struct page *page, unsigned long addr, int len); 63 struct page *page, unsigned long addr, int len);
64#endif 64#endif
65 65
66/* This is used only in do_no_page and do_swap_page. */ 66/* This is used only in __do_fault and do_swap_page. */
67#define flush_icache_page(vma, page) \ 67#define flush_icache_page(vma, page) \
68 flush_icache_user_range((vma), (page), 0, 0) 68 flush_icache_user_range((vma), (page), 0, 0)
69 69
diff --git a/arch/alpha/include/asm/core_mcpcia.h b/arch/alpha/include/asm/core_mcpcia.h
index 21ac53383b37..9f67a056b461 100644
--- a/arch/alpha/include/asm/core_mcpcia.h
+++ b/arch/alpha/include/asm/core_mcpcia.h
@@ -247,7 +247,7 @@ struct el_MCPCIA_uncorrected_frame_mcheck {
247#define vip volatile int __force * 247#define vip volatile int __force *
248#define vuip volatile unsigned int __force * 248#define vuip volatile unsigned int __force *
249 249
250#ifdef MCPCIA_ONE_HAE_WINDOW 250#ifndef MCPCIA_ONE_HAE_WINDOW
251#define MCPCIA_FROB_MMIO \ 251#define MCPCIA_FROB_MMIO \
252 if (__mcpcia_is_mmio(hose)) { \ 252 if (__mcpcia_is_mmio(hose)) { \
253 set_hae(hose & 0xffffffff); \ 253 set_hae(hose & 0xffffffff); \
diff --git a/arch/alpha/include/asm/core_t2.h b/arch/alpha/include/asm/core_t2.h
index 471c07292e0b..91b46801b290 100644
--- a/arch/alpha/include/asm/core_t2.h
+++ b/arch/alpha/include/asm/core_t2.h
@@ -1,6 +1,9 @@
1#ifndef __ALPHA_T2__H__ 1#ifndef __ALPHA_T2__H__
2#define __ALPHA_T2__H__ 2#define __ALPHA_T2__H__
3 3
4/* Fit everything into one 128MB HAE window. */
5#define T2_ONE_HAE_WINDOW 1
6
4#include <linux/types.h> 7#include <linux/types.h>
5#include <linux/spinlock.h> 8#include <linux/spinlock.h>
6#include <asm/compiler.h> 9#include <asm/compiler.h>
@@ -19,7 +22,7 @@
19 * 22 *
20 */ 23 */
21 24
22#define T2_MEM_R1_MASK 0x07ffffff /* Mem sparse region 1 mask is 26 bits */ 25#define T2_MEM_R1_MASK 0x07ffffff /* Mem sparse region 1 mask is 27 bits */
23 26
24/* GAMMA-SABLE is a SABLE with EV5-based CPUs */ 27/* GAMMA-SABLE is a SABLE with EV5-based CPUs */
25/* All LYNX machines, EV4 or EV5, use the GAMMA bias also */ 28/* All LYNX machines, EV4 or EV5, use the GAMMA bias also */
@@ -85,7 +88,9 @@
85#define T2_DIR (IDENT_ADDR + GAMMA_BIAS + 0x38e0004a0UL) 88#define T2_DIR (IDENT_ADDR + GAMMA_BIAS + 0x38e0004a0UL)
86#define T2_ICE (IDENT_ADDR + GAMMA_BIAS + 0x38e0004c0UL) 89#define T2_ICE (IDENT_ADDR + GAMMA_BIAS + 0x38e0004c0UL)
87 90
91#ifndef T2_ONE_HAE_WINDOW
88#define T2_HAE_ADDRESS T2_HAE_1 92#define T2_HAE_ADDRESS T2_HAE_1
93#endif
89 94
90/* T2 CSRs are in the non-cachable primary IO space from 3.8000.0000 to 95/* T2 CSRs are in the non-cachable primary IO space from 3.8000.0000 to
91 3.8fff.ffff 96 3.8fff.ffff
@@ -429,13 +434,15 @@ extern inline void t2_outl(u32 b, unsigned long addr)
429 * 434 *
430 */ 435 */
431 436
437#ifdef T2_ONE_HAE_WINDOW
438#define t2_set_hae
439#else
432#define t2_set_hae { \ 440#define t2_set_hae { \
433 msb = addr >> 27; \ 441 unsigned long msb = addr >> 27; \
434 addr &= T2_MEM_R1_MASK; \ 442 addr &= T2_MEM_R1_MASK; \
435 set_hae(msb); \ 443 set_hae(msb); \
436} 444}
437 445#endif
438extern raw_spinlock_t t2_hae_lock;
439 446
440/* 447/*
441 * NOTE: take T2_DENSE_MEM off in each readX/writeX routine, since 448 * NOTE: take T2_DENSE_MEM off in each readX/writeX routine, since
@@ -446,28 +453,22 @@ extern raw_spinlock_t t2_hae_lock;
446__EXTERN_INLINE u8 t2_readb(const volatile void __iomem *xaddr) 453__EXTERN_INLINE u8 t2_readb(const volatile void __iomem *xaddr)
447{ 454{
448 unsigned long addr = (unsigned long) xaddr - T2_DENSE_MEM; 455 unsigned long addr = (unsigned long) xaddr - T2_DENSE_MEM;
449 unsigned long result, msb; 456 unsigned long result;
450 unsigned long flags;
451 raw_spin_lock_irqsave(&t2_hae_lock, flags);
452 457
453 t2_set_hae; 458 t2_set_hae;
454 459
455 result = *(vip) ((addr << 5) + T2_SPARSE_MEM + 0x00); 460 result = *(vip) ((addr << 5) + T2_SPARSE_MEM + 0x00);
456 raw_spin_unlock_irqrestore(&t2_hae_lock, flags);
457 return __kernel_extbl(result, addr & 3); 461 return __kernel_extbl(result, addr & 3);
458} 462}
459 463
460__EXTERN_INLINE u16 t2_readw(const volatile void __iomem *xaddr) 464__EXTERN_INLINE u16 t2_readw(const volatile void __iomem *xaddr)
461{ 465{
462 unsigned long addr = (unsigned long) xaddr - T2_DENSE_MEM; 466 unsigned long addr = (unsigned long) xaddr - T2_DENSE_MEM;
463 unsigned long result, msb; 467 unsigned long result;
464 unsigned long flags;
465 raw_spin_lock_irqsave(&t2_hae_lock, flags);
466 468
467 t2_set_hae; 469 t2_set_hae;
468 470
469 result = *(vuip) ((addr << 5) + T2_SPARSE_MEM + 0x08); 471 result = *(vuip) ((addr << 5) + T2_SPARSE_MEM + 0x08);
470 raw_spin_unlock_irqrestore(&t2_hae_lock, flags);
471 return __kernel_extwl(result, addr & 3); 472 return __kernel_extwl(result, addr & 3);
472} 473}
473 474
@@ -478,59 +479,47 @@ __EXTERN_INLINE u16 t2_readw(const volatile void __iomem *xaddr)
478__EXTERN_INLINE u32 t2_readl(const volatile void __iomem *xaddr) 479__EXTERN_INLINE u32 t2_readl(const volatile void __iomem *xaddr)
479{ 480{
480 unsigned long addr = (unsigned long) xaddr - T2_DENSE_MEM; 481 unsigned long addr = (unsigned long) xaddr - T2_DENSE_MEM;
481 unsigned long result, msb; 482 unsigned long result;
482 unsigned long flags;
483 raw_spin_lock_irqsave(&t2_hae_lock, flags);
484 483
485 t2_set_hae; 484 t2_set_hae;
486 485
487 result = *(vuip) ((addr << 5) + T2_SPARSE_MEM + 0x18); 486 result = *(vuip) ((addr << 5) + T2_SPARSE_MEM + 0x18);
488 raw_spin_unlock_irqrestore(&t2_hae_lock, flags);
489 return result & 0xffffffffUL; 487 return result & 0xffffffffUL;
490} 488}
491 489
492__EXTERN_INLINE u64 t2_readq(const volatile void __iomem *xaddr) 490__EXTERN_INLINE u64 t2_readq(const volatile void __iomem *xaddr)
493{ 491{
494 unsigned long addr = (unsigned long) xaddr - T2_DENSE_MEM; 492 unsigned long addr = (unsigned long) xaddr - T2_DENSE_MEM;
495 unsigned long r0, r1, work, msb; 493 unsigned long r0, r1, work;
496 unsigned long flags;
497 raw_spin_lock_irqsave(&t2_hae_lock, flags);
498 494
499 t2_set_hae; 495 t2_set_hae;
500 496
501 work = (addr << 5) + T2_SPARSE_MEM + 0x18; 497 work = (addr << 5) + T2_SPARSE_MEM + 0x18;
502 r0 = *(vuip)(work); 498 r0 = *(vuip)(work);
503 r1 = *(vuip)(work + (4 << 5)); 499 r1 = *(vuip)(work + (4 << 5));
504 raw_spin_unlock_irqrestore(&t2_hae_lock, flags);
505 return r1 << 32 | r0; 500 return r1 << 32 | r0;
506} 501}
507 502
508__EXTERN_INLINE void t2_writeb(u8 b, volatile void __iomem *xaddr) 503__EXTERN_INLINE void t2_writeb(u8 b, volatile void __iomem *xaddr)
509{ 504{
510 unsigned long addr = (unsigned long) xaddr - T2_DENSE_MEM; 505 unsigned long addr = (unsigned long) xaddr - T2_DENSE_MEM;
511 unsigned long msb, w; 506 unsigned long w;
512 unsigned long flags;
513 raw_spin_lock_irqsave(&t2_hae_lock, flags);
514 507
515 t2_set_hae; 508 t2_set_hae;
516 509
517 w = __kernel_insbl(b, addr & 3); 510 w = __kernel_insbl(b, addr & 3);
518 *(vuip) ((addr << 5) + T2_SPARSE_MEM + 0x00) = w; 511 *(vuip) ((addr << 5) + T2_SPARSE_MEM + 0x00) = w;
519 raw_spin_unlock_irqrestore(&t2_hae_lock, flags);
520} 512}
521 513
522__EXTERN_INLINE void t2_writew(u16 b, volatile void __iomem *xaddr) 514__EXTERN_INLINE void t2_writew(u16 b, volatile void __iomem *xaddr)
523{ 515{
524 unsigned long addr = (unsigned long) xaddr - T2_DENSE_MEM; 516 unsigned long addr = (unsigned long) xaddr - T2_DENSE_MEM;
525 unsigned long msb, w; 517 unsigned long w;
526 unsigned long flags;
527 raw_spin_lock_irqsave(&t2_hae_lock, flags);
528 518
529 t2_set_hae; 519 t2_set_hae;
530 520
531 w = __kernel_inswl(b, addr & 3); 521 w = __kernel_inswl(b, addr & 3);
532 *(vuip) ((addr << 5) + T2_SPARSE_MEM + 0x08) = w; 522 *(vuip) ((addr << 5) + T2_SPARSE_MEM + 0x08) = w;
533 raw_spin_unlock_irqrestore(&t2_hae_lock, flags);
534} 523}
535 524
536/* 525/*
@@ -540,29 +529,22 @@ __EXTERN_INLINE void t2_writew(u16 b, volatile void __iomem *xaddr)
540__EXTERN_INLINE void t2_writel(u32 b, volatile void __iomem *xaddr) 529__EXTERN_INLINE void t2_writel(u32 b, volatile void __iomem *xaddr)
541{ 530{
542 unsigned long addr = (unsigned long) xaddr - T2_DENSE_MEM; 531 unsigned long addr = (unsigned long) xaddr - T2_DENSE_MEM;
543 unsigned long msb;
544 unsigned long flags;
545 raw_spin_lock_irqsave(&t2_hae_lock, flags);
546 532
547 t2_set_hae; 533 t2_set_hae;
548 534
549 *(vuip) ((addr << 5) + T2_SPARSE_MEM + 0x18) = b; 535 *(vuip) ((addr << 5) + T2_SPARSE_MEM + 0x18) = b;
550 raw_spin_unlock_irqrestore(&t2_hae_lock, flags);
551} 536}
552 537
553__EXTERN_INLINE void t2_writeq(u64 b, volatile void __iomem *xaddr) 538__EXTERN_INLINE void t2_writeq(u64 b, volatile void __iomem *xaddr)
554{ 539{
555 unsigned long addr = (unsigned long) xaddr - T2_DENSE_MEM; 540 unsigned long addr = (unsigned long) xaddr - T2_DENSE_MEM;
556 unsigned long msb, work; 541 unsigned long work;
557 unsigned long flags;
558 raw_spin_lock_irqsave(&t2_hae_lock, flags);
559 542
560 t2_set_hae; 543 t2_set_hae;
561 544
562 work = (addr << 5) + T2_SPARSE_MEM + 0x18; 545 work = (addr << 5) + T2_SPARSE_MEM + 0x18;
563 *(vuip)work = b; 546 *(vuip)work = b;
564 *(vuip)(work + (4 << 5)) = b >> 32; 547 *(vuip)(work + (4 << 5)) = b >> 32;
565 raw_spin_unlock_irqrestore(&t2_hae_lock, flags);
566} 548}
567 549
568__EXTERN_INLINE void __iomem *t2_ioportmap(unsigned long addr) 550__EXTERN_INLINE void __iomem *t2_ioportmap(unsigned long addr)
diff --git a/arch/alpha/include/asm/elf.h b/arch/alpha/include/asm/elf.h
index 9baae8afe8a3..da5449e22175 100644
--- a/arch/alpha/include/asm/elf.h
+++ b/arch/alpha/include/asm/elf.h
@@ -101,7 +101,7 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
101 101
102#define ELF_PLAT_INIT(_r, load_addr) _r->r0 = 0 102#define ELF_PLAT_INIT(_r, load_addr) _r->r0 = 0
103 103
104/* The registers are layed out in pt_regs for PAL and syscall 104/* The registers are laid out in pt_regs for PAL and syscall
105 convenience. Re-order them for the linear elf_gregset_t. */ 105 convenience. Re-order them for the linear elf_gregset_t. */
106 106
107struct pt_regs; 107struct pt_regs;
diff --git a/arch/alpha/include/asm/errno.h b/arch/alpha/include/asm/errno.h
index 98099bda9370..e5f29ca28180 100644
--- a/arch/alpha/include/asm/errno.h
+++ b/arch/alpha/include/asm/errno.h
@@ -122,4 +122,6 @@
122 122
123#define ERFKILL 138 /* Operation not possible due to RF-kill */ 123#define ERFKILL 138 /* Operation not possible due to RF-kill */
124 124
125#define EHWPOISON 139 /* Memory page has hardware error */
126
125#endif 127#endif
diff --git a/arch/alpha/include/asm/fcntl.h b/arch/alpha/include/asm/fcntl.h
index 70145cbb21cb..1b71ca70c9f6 100644
--- a/arch/alpha/include/asm/fcntl.h
+++ b/arch/alpha/include/asm/fcntl.h
@@ -31,6 +31,8 @@
31#define __O_SYNC 020000000 31#define __O_SYNC 020000000
32#define O_SYNC (__O_SYNC|O_DSYNC) 32#define O_SYNC (__O_SYNC|O_DSYNC)
33 33
34#define O_PATH 040000000
35
34#define F_GETLK 7 36#define F_GETLK 7
35#define F_SETLK 8 37#define F_SETLK 8
36#define F_SETLKW 9 38#define F_SETLKW 9
diff --git a/arch/alpha/include/asm/futex.h b/arch/alpha/include/asm/futex.h
index 945de222ab91..e8a761aee088 100644
--- a/arch/alpha/include/asm/futex.h
+++ b/arch/alpha/include/asm/futex.h
@@ -29,7 +29,7 @@
29 : "r" (uaddr), "r"(oparg) \ 29 : "r" (uaddr), "r"(oparg) \
30 : "memory") 30 : "memory")
31 31
32static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr) 32static inline int futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
33{ 33{
34 int op = (encoded_op >> 28) & 7; 34 int op = (encoded_op >> 28) & 7;
35 int cmp = (encoded_op >> 24) & 15; 35 int cmp = (encoded_op >> 24) & 15;
@@ -39,7 +39,7 @@ static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
39 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) 39 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
40 oparg = 1 << oparg; 40 oparg = 1 << oparg;
41 41
42 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) 42 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
43 return -EFAULT; 43 return -EFAULT;
44 44
45 pagefault_disable(); 45 pagefault_disable();
@@ -81,21 +81,23 @@ static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
81} 81}
82 82
83static inline int 83static inline int
84futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) 84futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
85 u32 oldval, u32 newval)
85{ 86{
86 int prev, cmp; 87 int ret = 0, cmp;
88 u32 prev;
87 89
88 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) 90 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
89 return -EFAULT; 91 return -EFAULT;
90 92
91 __asm__ __volatile__ ( 93 __asm__ __volatile__ (
92 __ASM_SMP_MB 94 __ASM_SMP_MB
93 "1: ldl_l %0,0(%2)\n" 95 "1: ldl_l %1,0(%3)\n"
94 " cmpeq %0,%3,%1\n" 96 " cmpeq %1,%4,%2\n"
95 " beq %1,3f\n" 97 " beq %2,3f\n"
96 " mov %4,%1\n" 98 " mov %5,%2\n"
97 "2: stl_c %1,0(%2)\n" 99 "2: stl_c %2,0(%3)\n"
98 " beq %1,4f\n" 100 " beq %2,4f\n"
99 "3: .subsection 2\n" 101 "3: .subsection 2\n"
100 "4: br 1b\n" 102 "4: br 1b\n"
101 " .previous\n" 103 " .previous\n"
@@ -105,11 +107,12 @@ futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
105 " .long 2b-.\n" 107 " .long 2b-.\n"
106 " lda $31,3b-2b(%0)\n" 108 " lda $31,3b-2b(%0)\n"
107 " .previous\n" 109 " .previous\n"
108 : "=&r"(prev), "=&r"(cmp) 110 : "+r"(ret), "=&r"(prev), "=&r"(cmp)
109 : "r"(uaddr), "r"((long)oldval), "r"(newval) 111 : "r"(uaddr), "r"((long)oldval), "r"(newval)
110 : "memory"); 112 : "memory");
111 113
112 return prev; 114 *uval = prev;
115 return ret;
113} 116}
114 117
115#endif /* __KERNEL__ */ 118#endif /* __KERNEL__ */
diff --git a/arch/alpha/include/asm/gpio.h b/arch/alpha/include/asm/gpio.h
new file mode 100644
index 000000000000..7dc6a6343c06
--- /dev/null
+++ b/arch/alpha/include/asm/gpio.h
@@ -0,0 +1,55 @@
1/*
2 * Generic GPIO API implementation for Alpha.
3 *
4 * A stright copy of that for PowerPC which was:
5 *
6 * Copyright (c) 2007-2008 MontaVista Software, Inc.
7 *
8 * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#ifndef _ASM_ALPHA_GPIO_H
17#define _ASM_ALPHA_GPIO_H
18
19#include <linux/errno.h>
20#include <asm-generic/gpio.h>
21
22#ifdef CONFIG_GPIOLIB
23
24/*
25 * We don't (yet) implement inlined/rapid versions for on-chip gpios.
26 * Just call gpiolib.
27 */
28static inline int gpio_get_value(unsigned int gpio)
29{
30 return __gpio_get_value(gpio);
31}
32
33static inline void gpio_set_value(unsigned int gpio, int value)
34{
35 __gpio_set_value(gpio, value);
36}
37
38static inline int gpio_cansleep(unsigned int gpio)
39{
40 return __gpio_cansleep(gpio);
41}
42
43static inline int gpio_to_irq(unsigned int gpio)
44{
45 return __gpio_to_irq(gpio);
46}
47
48static inline int irq_to_gpio(unsigned int irq)
49{
50 return -EINVAL;
51}
52
53#endif /* CONFIG_GPIOLIB */
54
55#endif /* _ASM_ALPHA_GPIO_H */
diff --git a/arch/alpha/include/asm/io.h b/arch/alpha/include/asm/io.h
index eda9b909aa05..56ff96501350 100644
--- a/arch/alpha/include/asm/io.h
+++ b/arch/alpha/include/asm/io.h
@@ -37,8 +37,9 @@
37 */ 37 */
38extern inline void __set_hae(unsigned long new_hae) 38extern inline void __set_hae(unsigned long new_hae)
39{ 39{
40 unsigned long flags; 40 unsigned long flags = swpipl(IPL_MAX);
41 local_irq_save(flags); 41
42 barrier();
42 43
43 alpha_mv.hae_cache = new_hae; 44 alpha_mv.hae_cache = new_hae;
44 *alpha_mv.hae_register = new_hae; 45 *alpha_mv.hae_register = new_hae;
@@ -46,7 +47,8 @@ extern inline void __set_hae(unsigned long new_hae)
46 /* Re-read to make sure it was written. */ 47 /* Re-read to make sure it was written. */
47 new_hae = *alpha_mv.hae_register; 48 new_hae = *alpha_mv.hae_register;
48 49
49 local_irq_restore(flags); 50 setipl(flags);
51 barrier();
50} 52}
51 53
52extern inline void set_hae(unsigned long new_hae) 54extern inline void set_hae(unsigned long new_hae)
diff --git a/arch/alpha/include/asm/ioctls.h b/arch/alpha/include/asm/ioctls.h
index 59617c3c2be6..80e1cee90f1f 100644
--- a/arch/alpha/include/asm/ioctls.h
+++ b/arch/alpha/include/asm/ioctls.h
@@ -92,7 +92,9 @@
92#define TIOCGSID 0x5429 /* Return the session ID of FD */ 92#define TIOCGSID 0x5429 /* Return the session ID of FD */
93#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ 93#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
94#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ 94#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
95#define TIOCGDEV _IOR('T',0x32, unsigned int) /* Get primary device node of /dev/console */
95#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */ 96#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */
97#define TIOCVHANGUP 0x5437
96 98
97#define TIOCSERCONFIG 0x5453 99#define TIOCSERCONFIG 0x5453
98#define TIOCSERGWILD 0x5454 100#define TIOCSERGWILD 0x5454
diff --git a/arch/alpha/include/asm/irqflags.h b/arch/alpha/include/asm/irqflags.h
new file mode 100644
index 000000000000..299bbc7e9d71
--- /dev/null
+++ b/arch/alpha/include/asm/irqflags.h
@@ -0,0 +1,67 @@
1#ifndef __ALPHA_IRQFLAGS_H
2#define __ALPHA_IRQFLAGS_H
3
4#include <asm/system.h>
5
6#define IPL_MIN 0
7#define IPL_SW0 1
8#define IPL_SW1 2
9#define IPL_DEV0 3
10#define IPL_DEV1 4
11#define IPL_TIMER 5
12#define IPL_PERF 6
13#define IPL_POWERFAIL 6
14#define IPL_MCHECK 7
15#define IPL_MAX 7
16
17#ifdef CONFIG_ALPHA_BROKEN_IRQ_MASK
18#undef IPL_MIN
19#define IPL_MIN __min_ipl
20extern int __min_ipl;
21#endif
22
23#define getipl() (rdps() & 7)
24#define setipl(ipl) ((void) swpipl(ipl))
25
26static inline unsigned long arch_local_save_flags(void)
27{
28 return rdps();
29}
30
31static inline void arch_local_irq_disable(void)
32{
33 setipl(IPL_MAX);
34 barrier();
35}
36
37static inline unsigned long arch_local_irq_save(void)
38{
39 unsigned long flags = swpipl(IPL_MAX);
40 barrier();
41 return flags;
42}
43
44static inline void arch_local_irq_enable(void)
45{
46 barrier();
47 setipl(IPL_MIN);
48}
49
50static inline void arch_local_irq_restore(unsigned long flags)
51{
52 barrier();
53 setipl(flags);
54 barrier();
55}
56
57static inline bool arch_irqs_disabled_flags(unsigned long flags)
58{
59 return flags == IPL_MAX;
60}
61
62static inline bool arch_irqs_disabled(void)
63{
64 return arch_irqs_disabled_flags(getipl());
65}
66
67#endif /* __ALPHA_IRQFLAGS_H */
diff --git a/arch/alpha/include/asm/mman.h b/arch/alpha/include/asm/mman.h
index 99c56d47879d..72db984f8781 100644
--- a/arch/alpha/include/asm/mman.h
+++ b/arch/alpha/include/asm/mman.h
@@ -53,6 +53,9 @@
53#define MADV_MERGEABLE 12 /* KSM may merge identical pages */ 53#define MADV_MERGEABLE 12 /* KSM may merge identical pages */
54#define MADV_UNMERGEABLE 13 /* KSM may not merge identical pages */ 54#define MADV_UNMERGEABLE 13 /* KSM may not merge identical pages */
55 55
56#define MADV_HUGEPAGE 14 /* Worth backing with hugepages */
57#define MADV_NOHUGEPAGE 15 /* Not worth backing with hugepages */
58
56/* compatibility flags */ 59/* compatibility flags */
57#define MAP_FILE 0 60#define MAP_FILE 0
58 61
diff --git a/arch/alpha/include/asm/mmzone.h b/arch/alpha/include/asm/mmzone.h
index 8af56ce346ad..445dc42e0334 100644
--- a/arch/alpha/include/asm/mmzone.h
+++ b/arch/alpha/include/asm/mmzone.h
@@ -56,7 +56,6 @@ PLAT_NODE_DATA_LOCALNR(unsigned long p, int n)
56 * Given a kernel address, find the home node of the underlying memory. 56 * Given a kernel address, find the home node of the underlying memory.
57 */ 57 */
58#define kvaddr_to_nid(kaddr) pa_to_nid(__pa(kaddr)) 58#define kvaddr_to_nid(kaddr) pa_to_nid(__pa(kaddr))
59#define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn)
60 59
61/* 60/*
62 * Given a kaddr, LOCAL_BASE_ADDR finds the owning node of the memory 61 * Given a kaddr, LOCAL_BASE_ADDR finds the owning node of the memory
diff --git a/arch/alpha/include/asm/perf_event.h b/arch/alpha/include/asm/perf_event.h
index 4157cd3c44a9..5996e7a6757e 100644
--- a/arch/alpha/include/asm/perf_event.h
+++ b/arch/alpha/include/asm/perf_event.h
@@ -1,15 +1,4 @@
1#ifndef __ASM_ALPHA_PERF_EVENT_H 1#ifndef __ASM_ALPHA_PERF_EVENT_H
2#define __ASM_ALPHA_PERF_EVENT_H 2#define __ASM_ALPHA_PERF_EVENT_H
3 3
4/* Alpha only supports software events through this interface. */
5extern void set_perf_event_pending(void);
6
7#define PERF_EVENT_INDEX_OFFSET 0
8
9#ifdef CONFIG_PERF_EVENTS
10extern void init_hw_perf_events(void);
11#else
12static inline void init_hw_perf_events(void) { }
13#endif
14
15#endif /* __ASM_ALPHA_PERF_EVENT_H */ 4#endif /* __ASM_ALPHA_PERF_EVENT_H */
diff --git a/arch/alpha/include/asm/pgtable.h b/arch/alpha/include/asm/pgtable.h
index 71a243294142..de98a732683d 100644
--- a/arch/alpha/include/asm/pgtable.h
+++ b/arch/alpha/include/asm/pgtable.h
@@ -318,9 +318,7 @@ extern inline pte_t * pte_offset_kernel(pmd_t * dir, unsigned long address)
318} 318}
319 319
320#define pte_offset_map(dir,addr) pte_offset_kernel((dir),(addr)) 320#define pte_offset_map(dir,addr) pte_offset_kernel((dir),(addr))
321#define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir),(addr))
322#define pte_unmap(pte) do { } while (0) 321#define pte_unmap(pte) do { } while (0)
323#define pte_unmap_nested(pte) do { } while (0)
324 322
325extern pgd_t swapper_pg_dir[1024]; 323extern pgd_t swapper_pg_dir[1024];
326 324
diff --git a/arch/alpha/include/asm/rwsem.h b/arch/alpha/include/asm/rwsem.h
index 1570c0b54336..a83bbea62c67 100644
--- a/arch/alpha/include/asm/rwsem.h
+++ b/arch/alpha/include/asm/rwsem.h
@@ -13,44 +13,13 @@
13#ifdef __KERNEL__ 13#ifdef __KERNEL__
14 14
15#include <linux/compiler.h> 15#include <linux/compiler.h>
16#include <linux/list.h>
17#include <linux/spinlock.h>
18 16
19struct rwsem_waiter;
20
21extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *sem);
22extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem);
23extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *);
24extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem);
25
26/*
27 * the semaphore definition
28 */
29struct rw_semaphore {
30 long count;
31#define RWSEM_UNLOCKED_VALUE 0x0000000000000000L 17#define RWSEM_UNLOCKED_VALUE 0x0000000000000000L
32#define RWSEM_ACTIVE_BIAS 0x0000000000000001L 18#define RWSEM_ACTIVE_BIAS 0x0000000000000001L
33#define RWSEM_ACTIVE_MASK 0x00000000ffffffffL 19#define RWSEM_ACTIVE_MASK 0x00000000ffffffffL
34#define RWSEM_WAITING_BIAS (-0x0000000100000000L) 20#define RWSEM_WAITING_BIAS (-0x0000000100000000L)
35#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS 21#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
36#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) 22#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
37 spinlock_t wait_lock;
38 struct list_head wait_list;
39};
40
41#define __RWSEM_INITIALIZER(name) \
42 { RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, \
43 LIST_HEAD_INIT((name).wait_list) }
44
45#define DECLARE_RWSEM(name) \
46 struct rw_semaphore name = __RWSEM_INITIALIZER(name)
47
48static inline void init_rwsem(struct rw_semaphore *sem)
49{
50 sem->count = RWSEM_UNLOCKED_VALUE;
51 spin_lock_init(&sem->wait_lock);
52 INIT_LIST_HEAD(&sem->wait_list);
53}
54 23
55static inline void __down_read(struct rw_semaphore *sem) 24static inline void __down_read(struct rw_semaphore *sem)
56{ 25{
@@ -250,10 +219,5 @@ static inline long rwsem_atomic_update(long val, struct rw_semaphore *sem)
250#endif 219#endif
251} 220}
252 221
253static inline int rwsem_is_locked(struct rw_semaphore *sem)
254{
255 return (sem->count != 0);
256}
257
258#endif /* __KERNEL__ */ 222#endif /* __KERNEL__ */
259#endif /* _ALPHA_RWSEM_H */ 223#endif /* _ALPHA_RWSEM_H */
diff --git a/arch/alpha/include/asm/smp.h b/arch/alpha/include/asm/smp.h
index 3f390e8cc0b3..c46e714aa3e0 100644
--- a/arch/alpha/include/asm/smp.h
+++ b/arch/alpha/include/asm/smp.h
@@ -39,8 +39,6 @@ struct cpuinfo_alpha {
39 39
40extern struct cpuinfo_alpha cpu_data[NR_CPUS]; 40extern struct cpuinfo_alpha cpu_data[NR_CPUS];
41 41
42#define PROC_CHANGE_PENALTY 20
43
44#define hard_smp_processor_id() __hard_smp_processor_id() 42#define hard_smp_processor_id() __hard_smp_processor_id()
45#define raw_smp_processor_id() (current_thread_info()->cpu) 43#define raw_smp_processor_id() (current_thread_info()->cpu)
46 44
diff --git a/arch/alpha/include/asm/system.h b/arch/alpha/include/asm/system.h
index 5aa40cca4f23..9f78e6934637 100644
--- a/arch/alpha/include/asm/system.h
+++ b/arch/alpha/include/asm/system.h
@@ -259,34 +259,6 @@ __CALL_PAL_RW2(wrperfmon, unsigned long, unsigned long, unsigned long);
259__CALL_PAL_W1(wrusp, unsigned long); 259__CALL_PAL_W1(wrusp, unsigned long);
260__CALL_PAL_W1(wrvptptr, unsigned long); 260__CALL_PAL_W1(wrvptptr, unsigned long);
261 261
262#define IPL_MIN 0
263#define IPL_SW0 1
264#define IPL_SW1 2
265#define IPL_DEV0 3
266#define IPL_DEV1 4
267#define IPL_TIMER 5
268#define IPL_PERF 6
269#define IPL_POWERFAIL 6
270#define IPL_MCHECK 7
271#define IPL_MAX 7
272
273#ifdef CONFIG_ALPHA_BROKEN_IRQ_MASK
274#undef IPL_MIN
275#define IPL_MIN __min_ipl
276extern int __min_ipl;
277#endif
278
279#define getipl() (rdps() & 7)
280#define setipl(ipl) ((void) swpipl(ipl))
281
282#define local_irq_disable() do { setipl(IPL_MAX); barrier(); } while(0)
283#define local_irq_enable() do { barrier(); setipl(IPL_MIN); } while(0)
284#define local_save_flags(flags) ((flags) = rdps())
285#define local_irq_save(flags) do { (flags) = swpipl(IPL_MAX); barrier(); } while(0)
286#define local_irq_restore(flags) do { barrier(); setipl(flags); barrier(); } while(0)
287
288#define irqs_disabled() (getipl() == IPL_MAX)
289
290/* 262/*
291 * TB routines.. 263 * TB routines..
292 */ 264 */
diff --git a/arch/alpha/include/asm/types.h b/arch/alpha/include/asm/types.h
index bd621ecd1eb3..881544339c21 100644
--- a/arch/alpha/include/asm/types.h
+++ b/arch/alpha/include/asm/types.h
@@ -20,16 +20,4 @@
20typedef unsigned int umode_t; 20typedef unsigned int umode_t;
21 21
22#endif /* __ASSEMBLY__ */ 22#endif /* __ASSEMBLY__ */
23
24/*
25 * These aren't exported outside the kernel to avoid name space clashes
26 */
27#ifdef __KERNEL__
28#ifndef __ASSEMBLY__
29
30typedef u64 dma_addr_t;
31typedef u64 dma64_addr_t;
32
33#endif /* __ASSEMBLY__ */
34#endif /* __KERNEL__ */
35#endif /* _ALPHA_TYPES_H */ 23#endif /* _ALPHA_TYPES_H */
diff --git a/arch/alpha/include/asm/unistd.h b/arch/alpha/include/asm/unistd.h
index 058937bf5a77..4ac48a095f3a 100644
--- a/arch/alpha/include/asm/unistd.h
+++ b/arch/alpha/include/asm/unistd.h
@@ -452,10 +452,15 @@
452#define __NR_fanotify_init 494 452#define __NR_fanotify_init 494
453#define __NR_fanotify_mark 495 453#define __NR_fanotify_mark 495
454#define __NR_prlimit64 496 454#define __NR_prlimit64 496
455#define __NR_name_to_handle_at 497
456#define __NR_open_by_handle_at 498
457#define __NR_clock_adjtime 499
458#define __NR_syncfs 500
459#define __NR_setns 501
455 460
456#ifdef __KERNEL__ 461#ifdef __KERNEL__
457 462
458#define NR_SYSCALLS 497 463#define NR_SYSCALLS 502
459 464
460#define __ARCH_WANT_IPC_PARSE_VERSION 465#define __ARCH_WANT_IPC_PARSE_VERSION
461#define __ARCH_WANT_OLD_READDIR 466#define __ARCH_WANT_OLD_READDIR