1 files changed, 49 insertions, 0 deletions

diff --git a/Documentation/devicetree/bindings/mtd/flctl-nand.txt b/Documentation/devicetree/bindings/mtd/flctl-nand.txt
new file mode 100644
index 000000000000..427f46dc60ad
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/flctl-nand.txt
@@ -0,0 +1,49 @@
+FLCTL NAND controller
+
+Required properties:
+- compatible : "renesas,shmobile-flctl-sh7372"
+- reg : Address range of the FLCTL
+- interrupts : flste IRQ number
+- nand-bus-width : bus width to NAND chip
+
+Optional properties:
+- dmas: DMA specifier(s)
+- dma-names: name for each DMA specifier. Valid names are
+             "data_tx", "data_rx", "ecc_tx", "ecc_rx"
+
+The DMA fields are not used yet in the driver but are listed here for
+completing the bindings.
+
+The device tree may optionally contain sub-nodes describing partitions of the
+address space. See partition.txt for more detail.
+
+Example:
+
+        flctl@e6a30000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "renesas,shmobile-flctl-sh7372";
+                reg = <0xe6a30000 0x100>;
+                interrupts = <0x0d80>;
+
+                nand-bus-width = <16>;
+
+                dmas = <&dmac 1 /* data_tx */
+                        &dmac 2;> /* data_rx */
+                dma-names = "data_tx", "data_rx";
+
+                system@0 {
+                        label = "system";
+                        reg = <0x0 0x8000000>;
+                };
+
+                userdata@8000000 {
+                        label = "userdata";
+                        reg = <0x8000000 0x10000000>;
+                };
+
+                cache@18000000 {
+                        label = "cache";
+                        reg = <0x18000000 0x8000000>;
+                };
+        };