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-rw-r--r--Documentation/devicetree/bindings/net/fsl-tsec-phy.txt16
1 files changed, 1 insertions, 15 deletions
diff --git a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
index eb06059f3cf3..2c6be0377f55 100644
--- a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
+++ b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
@@ -86,7 +86,6 @@ General Properties:
86 86
87Clock Properties: 87Clock Properties:
88 88
89 - fsl,cksel Timer reference clock source.
90 - fsl,tclk-period Timer reference clock period in nanoseconds. 89 - fsl,tclk-period Timer reference clock period in nanoseconds.
91 - fsl,tmr-prsc Prescaler, divides the output clock. 90 - fsl,tmr-prsc Prescaler, divides the output clock.
92 - fsl,tmr-add Frequency compensation value. 91 - fsl,tmr-add Frequency compensation value.
@@ -98,7 +97,7 @@ Clock Properties:
98 clock. You must choose these carefully for the clock to work right. 97 clock. You must choose these carefully for the clock to work right.
99 Here is how to figure good values: 98 Here is how to figure good values:
100 99
101 TimerOsc = selected reference clock MHz 100 TimerOsc = system clock MHz
102 tclk_period = desired clock period nanoseconds 101 tclk_period = desired clock period nanoseconds
103 NominalFreq = 1000 / tclk_period MHz 102 NominalFreq = 1000 / tclk_period MHz
104 FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0) 103 FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0)
@@ -115,18 +114,6 @@ Clock Properties:
115 Pulse Per Second (PPS) signal, since this will be offered to the PPS 114 Pulse Per Second (PPS) signal, since this will be offered to the PPS
116 subsystem to synchronize the Linux clock. 115 subsystem to synchronize the Linux clock.
117 116
118 "fsl,cksel" property allows to select different reference clock
119 sources:
120
121 <0> - external high precision timer reference clock (TSEC_TMR_CLK
122 input is used for this purpose);
123 <1> - eTSEC system clock;
124 <2> - eTSEC1 transmit clock;
125 <3> - RTC clock input.
126
127 When this attribute is not used, eTSEC system clock will serve as
128 IEEE 1588 timer reference clock.
129
130Example: 117Example:
131 118
132 ptp_clock@24E00 { 119 ptp_clock@24E00 {
@@ -134,7 +121,6 @@ Example:
134 reg = <0x24E00 0xB0>; 121 reg = <0x24E00 0xB0>;
135 interrupts = <12 0x8 13 0x8>; 122 interrupts = <12 0x8 13 0x8>;
136 interrupt-parent = < &ipic >; 123 interrupt-parent = < &ipic >;
137 fsl,cksel = <1>;
138 fsl,tclk-period = <10>; 124 fsl,tclk-period = <10>;
139 fsl,tmr-prsc = <100>; 125 fsl,tmr-prsc = <100>;
140 fsl,tmr-add = <0x999999A4>; 126 fsl,tmr-add = <0x999999A4>;