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-rw-r--r--Documentation/powerpc/booting-without-of.txt78
1 files changed, 72 insertions, 6 deletions
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index ddafbf2fb1f3..ea1b70b35793 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -41,12 +41,24 @@ Table of Contents
41 VI - System-on-a-chip devices and nodes 41 VI - System-on-a-chip devices and nodes
42 1) Defining child nodes of an SOC 42 1) Defining child nodes of an SOC
43 2) Representing devices without a current OF specification 43 2) Representing devices without a current OF specification
44 a) PHY nodes 44 a) MDIO IO device
45 b) Interrupt controllers 45 b) Gianfar-compatible ethernet nodes
46 c) CFI or JEDEC memory-mapped NOR flash 46 c) PHY nodes
47 d) 4xx/Axon EMAC ethernet nodes 47 d) Interrupt controllers
48 e) Xilinx IP cores 48 e) I2C
49 f) USB EHCI controllers 49 f) Freescale SOC USB controllers
50 g) Freescale SOC SEC Security Engines
51 h) Board Control and Status (BCSR)
52 i) Freescale QUICC Engine module (QE)
53 j) CFI or JEDEC memory-mapped NOR flash
54 k) Global Utilities Block
55 l) Freescale Communications Processor Module
56 m) Chipselect/Local Bus
57 n) 4xx/Axon EMAC ethernet nodes
58 o) Xilinx IP cores
59 p) Freescale Synchronous Serial Interface
60 q) USB EHCI controllers
61 r) MDIO on GPIOs
50 62
51 VII - Marvell Discovery mv64[345]6x System Controller chips 63 VII - Marvell Discovery mv64[345]6x System Controller chips
52 1) The /system-controller node 64 1) The /system-controller node
@@ -1817,6 +1829,60 @@ platforms are moved over to use the flattened-device-tree model.
1817 big-endian; 1829 big-endian;
1818 }; 1830 };
1819 1831
1832 r) Freescale Display Interface Unit
1833
1834 The Freescale DIU is a LCD controller, with proper hardware, it can also
1835 drive DVI monitors.
1836
1837 Required properties:
1838 - compatible : should be "fsl-diu".
1839 - reg : should contain at least address and length of the DIU register
1840 set.
1841 - Interrupts : one DIU interrupt should be describe here.
1842
1843 Example (MPC8610HPCD)
1844 display@2c000 {
1845 compatible = "fsl,diu";
1846 reg = <0x2c000 100>;
1847 interrupts = <72 2>;
1848 interrupt-parent = <&mpic>;
1849 };
1850
1851 s) Freescale on board FPGA
1852
1853 This is the memory-mapped registers for on board FPGA.
1854
1855 Required properities:
1856 - compatible : should be "fsl,fpga-pixis".
1857 - reg : should contain the address and the lenght of the FPPGA register
1858 set.
1859
1860 Example (MPC8610HPCD)
1861 board-control@e8000000 {
1862 compatible = "fsl,fpga-pixis";
1863 reg = <0xe8000000 32>;
1864 };
1865
1866 r) MDIO on GPIOs
1867
1868 Currently defined compatibles:
1869 - virtual,gpio-mdio
1870
1871 MDC and MDIO lines connected to GPIO controllers are listed in the
1872 gpios property as described in section VIII.1 in the following order:
1873
1874 MDC, MDIO.
1875
1876 Example:
1877
1878 mdio {
1879 compatible = "virtual,mdio-gpio";
1880 #address-cells = <1>;
1881 #size-cells = <0>;
1882 gpios = <&qe_pio_a 11
1883 &qe_pio_c 6>;
1884 };
1885
1820VII - Marvell Discovery mv64[345]6x System Controller chips 1886VII - Marvell Discovery mv64[345]6x System Controller chips
1821=========================================================== 1887===========================================================
1822 1888