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-rw-r--r--Documentation/powerpc/booting-without-of.txt189
1 files changed, 113 insertions, 76 deletions
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index aee243a846a2..ea1b70b35793 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -89,10 +89,12 @@ Table of Contents
89 3) OpenPIC Interrupt Controllers 89 3) OpenPIC Interrupt Controllers
90 4) ISA Interrupt Controllers 90 4) ISA Interrupt Controllers
91 91
92 VIII - Specifying GPIO information for devices 92 IX - Specifying GPIO information for devices
93 1) gpios property 93 1) gpios property
94 2) gpio-controller nodes 94 2) gpio-controller nodes
95 95
96 X - Specifying device power management information (sleep property)
97
96 Appendix A - Sample SOC node for MPC8540 98 Appendix A - Sample SOC node for MPC8540
97 99
98 100
@@ -2488,8 +2490,8 @@ encodings listed below:
2488 2 = high to low edge sensitive type enabled 2490 2 = high to low edge sensitive type enabled
2489 3 = low to high edge sensitive type enabled 2491 3 = low to high edge sensitive type enabled
2490 2492
2491VIII - Specifying GPIO information for devices 2493IX - Specifying GPIO information for devices
2492============================================== 2494============================================
2493 2495
24941) gpios property 24961) gpios property
2495----------------- 2497-----------------
@@ -2537,116 +2539,151 @@ Example of two SOC GPIO banks defined as gpio-controller nodes:
2537 gpio-controller; 2539 gpio-controller;
2538 }; 2540 };
2539 2541
2542X - Specifying Device Power Management Information (sleep property)
2543===================================================================
2544
2545Devices on SOCs often have mechanisms for placing devices into low-power
2546states that are decoupled from the devices' own register blocks. Sometimes,
2547this information is more complicated than a cell-index property can
2548reasonably describe. Thus, each device controlled in such a manner
2549may contain a "sleep" property which describes these connections.
2550
2551The sleep property consists of one or more sleep resources, each of
2552which consists of a phandle to a sleep controller, followed by a
2553controller-specific sleep specifier of zero or more cells.
2554
2555The semantics of what type of low power modes are possible are defined
2556by the sleep controller. Some examples of the types of low power modes
2557that may be supported are:
2558
2559 - Dynamic: The device may be disabled or enabled at any time.
2560 - System Suspend: The device may request to be disabled or remain
2561 awake during system suspend, but will not be disabled until then.
2562 - Permanent: The device is disabled permanently (until the next hard
2563 reset).
2564
2565Some devices may share a clock domain with each other, such that they should
2566only be suspended when none of the devices are in use. Where reasonable,
2567such nodes should be placed on a virtual bus, where the bus has the sleep
2568property. If the clock domain is shared among devices that cannot be
2569reasonably grouped in this manner, then create a virtual sleep controller
2570(similar to an interrupt nexus, except that defining a standardized
2571sleep-map should wait until its necessity is demonstrated).
2572
2540Appendix A - Sample SOC node for MPC8540 2573Appendix A - Sample SOC node for MPC8540
2541======================================== 2574========================================
2542 2575
2543Note that the #address-cells and #size-cells for the SoC node 2576 soc@e0000000 {
2544in this example have been explicitly listed; these are likely
2545not necessary as they are usually the same as the root node.
2546
2547 soc8540@e0000000 {
2548 #address-cells = <1>; 2577 #address-cells = <1>;
2549 #size-cells = <1>; 2578 #size-cells = <1>;
2550 #interrupt-cells = <2>; 2579 compatible = "fsl,mpc8540-ccsr", "simple-bus";
2551 device_type = "soc"; 2580 device_type = "soc";
2552 ranges = <00000000 e0000000 00100000> 2581 ranges = <0x00000000 0xe0000000 0x00100000>
2553 reg = <e0000000 00003000>;
2554 bus-frequency = <0>; 2582 bus-frequency = <0>;
2555 2583 interrupt-parent = <&pic>;
2556 mdio@24520 {
2557 reg = <24520 20>;
2558 device_type = "mdio";
2559 compatible = "gianfar";
2560
2561 ethernet-phy@0 {
2562 linux,phandle = <2452000>
2563 interrupt-parent = <40000>;
2564 interrupts = <35 1>;
2565 reg = <0>;
2566 device_type = "ethernet-phy";
2567 };
2568
2569 ethernet-phy@1 {
2570 linux,phandle = <2452001>
2571 interrupt-parent = <40000>;
2572 interrupts = <35 1>;
2573 reg = <1>;
2574 device_type = "ethernet-phy";
2575 };
2576
2577 ethernet-phy@3 {
2578 linux,phandle = <2452002>
2579 interrupt-parent = <40000>;
2580 interrupts = <35 1>;
2581 reg = <3>;
2582 device_type = "ethernet-phy";
2583 };
2584
2585 };
2586 2584
2587 ethernet@24000 { 2585 ethernet@24000 {
2588 #size-cells = <0>; 2586 #address-cells = <1>;
2587 #size-cells = <1>;
2589 device_type = "network"; 2588 device_type = "network";
2590 model = "TSEC"; 2589 model = "TSEC";
2591 compatible = "gianfar"; 2590 compatible = "gianfar", "simple-bus";
2592 reg = <24000 1000>; 2591 reg = <0x24000 0x1000>;
2593 mac-address = [ 00 E0 0C 00 73 00 ]; 2592 local-mac-address = [ 00 E0 0C 00 73 00 ];
2594 interrupts = <d 3 e 3 12 3>; 2593 interrupts = <29 2 30 2 34 2>;
2595 interrupt-parent = <40000>; 2594 phy-handle = <&phy0>;
2596 phy-handle = <2452000>; 2595 sleep = <&pmc 00000080>;
2596 ranges;
2597
2598 mdio@24520 {
2599 reg = <0x24520 0x20>;
2600 compatible = "fsl,gianfar-mdio";
2601
2602 phy0: ethernet-phy@0 {
2603 interrupts = <5 1>;
2604 reg = <0>;
2605 device_type = "ethernet-phy";
2606 };
2607
2608 phy1: ethernet-phy@1 {
2609 interrupts = <5 1>;
2610 reg = <1>;
2611 device_type = "ethernet-phy";
2612 };
2613
2614 phy3: ethernet-phy@3 {
2615 interrupts = <7 1>;
2616 reg = <3>;
2617 device_type = "ethernet-phy";
2618 };
2619 };
2597 }; 2620 };
2598 2621
2599 ethernet@25000 { 2622 ethernet@25000 {
2600 #address-cells = <1>;
2601 #size-cells = <0>;
2602 device_type = "network"; 2623 device_type = "network";
2603 model = "TSEC"; 2624 model = "TSEC";
2604 compatible = "gianfar"; 2625 compatible = "gianfar";
2605 reg = <25000 1000>; 2626 reg = <0x25000 0x1000>;
2606 mac-address = [ 00 E0 0C 00 73 01 ]; 2627 local-mac-address = [ 00 E0 0C 00 73 01 ];
2607 interrupts = <13 3 14 3 18 3>; 2628 interrupts = <13 2 14 2 18 2>;
2608 interrupt-parent = <40000>; 2629 phy-handle = <&phy1>;
2609 phy-handle = <2452001>; 2630 sleep = <&pmc 00000040>;
2610 }; 2631 };
2611 2632
2612 ethernet@26000 { 2633 ethernet@26000 {
2613 #address-cells = <1>;
2614 #size-cells = <0>;
2615 device_type = "network"; 2634 device_type = "network";
2616 model = "FEC"; 2635 model = "FEC";
2617 compatible = "gianfar"; 2636 compatible = "gianfar";
2618 reg = <26000 1000>; 2637 reg = <0x26000 0x1000>;
2619 mac-address = [ 00 E0 0C 00 73 02 ]; 2638 local-mac-address = [ 00 E0 0C 00 73 02 ];
2620 interrupts = <19 3>; 2639 interrupts = <41 2>;
2621 interrupt-parent = <40000>; 2640 phy-handle = <&phy3>;
2622 phy-handle = <2452002>; 2641 sleep = <&pmc 00000020>;
2623 }; 2642 };
2624 2643
2625 serial@4500 { 2644 serial@4500 {
2626 device_type = "serial"; 2645 #address-cells = <1>;
2627 compatible = "ns16550"; 2646 #size-cells = <1>;
2628 reg = <4500 100>; 2647 compatible = "fsl,mpc8540-duart", "simple-bus";
2629 clock-frequency = <0>; 2648 sleep = <&pmc 00000002>;
2630 interrupts = <1a 3>; 2649 ranges;
2631 interrupt-parent = <40000>; 2650
2651 serial@4500 {
2652 device_type = "serial";
2653 compatible = "ns16550";
2654 reg = <0x4500 0x100>;
2655 clock-frequency = <0>;
2656 interrupts = <42 2>;
2657 };
2658
2659 serial@4600 {
2660 device_type = "serial";
2661 compatible = "ns16550";
2662 reg = <0x4600 0x100>;
2663 clock-frequency = <0>;
2664 interrupts = <42 2>;
2665 };
2632 }; 2666 };
2633 2667
2634 pic@40000 { 2668 pic: pic@40000 {
2635 linux,phandle = <40000>;
2636 interrupt-controller; 2669 interrupt-controller;
2637 #address-cells = <0>; 2670 #address-cells = <0>;
2638 reg = <40000 40000>; 2671 #interrupt-cells = <2>;
2672 reg = <0x40000 0x40000>;
2639 compatible = "chrp,open-pic"; 2673 compatible = "chrp,open-pic";
2640 device_type = "open-pic"; 2674 device_type = "open-pic";
2641 }; 2675 };
2642 2676
2643 i2c@3000 { 2677 i2c@3000 {
2644 interrupt-parent = <40000>; 2678 interrupts = <43 2>;
2645 interrupts = <1b 3>; 2679 reg = <0x3000 0x100>;
2646 reg = <3000 18>;
2647 device_type = "i2c";
2648 compatible = "fsl-i2c"; 2680 compatible = "fsl-i2c";
2649 dfsrr; 2681 dfsrr;
2682 sleep = <&pmc 00000004>;
2650 }; 2683 };
2651 2684
2685 pmc: power@e0070 {
2686 compatible = "fsl,mpc8540-pmc", "fsl,mpc8548-pmc";
2687 reg = <0xe0070 0x20>;
2688 };
2652 }; 2689 };