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-rw-r--r--Documentation/devicetree/bindings/net/fsl-tsec-phy.txt16
1 files changed, 15 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
index 2c6be0377f55..eb06059f3cf3 100644
--- a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
+++ b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
@@ -86,6 +86,7 @@ General Properties:
86 86
87Clock Properties: 87Clock Properties:
88 88
89 - fsl,cksel Timer reference clock source.
89 - fsl,tclk-period Timer reference clock period in nanoseconds. 90 - fsl,tclk-period Timer reference clock period in nanoseconds.
90 - fsl,tmr-prsc Prescaler, divides the output clock. 91 - fsl,tmr-prsc Prescaler, divides the output clock.
91 - fsl,tmr-add Frequency compensation value. 92 - fsl,tmr-add Frequency compensation value.
@@ -97,7 +98,7 @@ Clock Properties:
97 clock. You must choose these carefully for the clock to work right. 98 clock. You must choose these carefully for the clock to work right.
98 Here is how to figure good values: 99 Here is how to figure good values:
99 100
100 TimerOsc = system clock MHz 101 TimerOsc = selected reference clock MHz
101 tclk_period = desired clock period nanoseconds 102 tclk_period = desired clock period nanoseconds
102 NominalFreq = 1000 / tclk_period MHz 103 NominalFreq = 1000 / tclk_period MHz
103 FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0) 104 FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0)
@@ -114,6 +115,18 @@ Clock Properties:
114 Pulse Per Second (PPS) signal, since this will be offered to the PPS 115 Pulse Per Second (PPS) signal, since this will be offered to the PPS
115 subsystem to synchronize the Linux clock. 116 subsystem to synchronize the Linux clock.
116 117
118 "fsl,cksel" property allows to select different reference clock
119 sources:
120
121 <0> - external high precision timer reference clock (TSEC_TMR_CLK
122 input is used for this purpose);
123 <1> - eTSEC system clock;
124 <2> - eTSEC1 transmit clock;
125 <3> - RTC clock input.
126
127 When this attribute is not used, eTSEC system clock will serve as
128 IEEE 1588 timer reference clock.
129
117Example: 130Example:
118 131
119 ptp_clock@24E00 { 132 ptp_clock@24E00 {
@@ -121,6 +134,7 @@ Example:
121 reg = <0x24E00 0xB0>; 134 reg = <0x24E00 0xB0>;
122 interrupts = <12 0x8 13 0x8>; 135 interrupts = <12 0x8 13 0x8>;
123 interrupt-parent = < &ipic >; 136 interrupt-parent = < &ipic >;
137 fsl,cksel = <1>;
124 fsl,tclk-period = <10>; 138 fsl,tclk-period = <10>;
125 fsl,tmr-prsc = <100>; 139 fsl,tmr-prsc = <100>;
126 fsl,tmr-add = <0x999999A4>; 140 fsl,tmr-add = <0x999999A4>;