10 files changed, 194 insertions, 11 deletions

diff --git a/Documentation/devicetree/bindings/net/amd-xgbe-phy.txt b/Documentation/devicetree/bindings/net/amd-xgbe-phy.txt
index d01ed63d3ebb..42409bfe04c4 100644
--- a/Documentation/devicetree/bindings/net/amd-xgbe-phy.txt
+++ b/Documentation/devicetree/bindings/net/amd-xgbe-phy.txt
@@ -8,10 +8,16 @@ Required properties:
    - SerDes integration registers (1/2)
    - SerDes integration registers (2/2)
 
+Optional properties:
+- amd,speed-set: Speed capabilities of the device
+    0 - 1GbE and 10GbE (default)
+    1 - 2.5GbE and 10GbE
+
 Example:
         xgbe_phy@e1240800 {
                 compatible = "amd,xgbe-phy-seattle-v1a", "ethernet-phy-ieee802.3-c45";
                 reg = <0 0xe1240800 0 0x00400>,
                       <0 0xe1250000 0 0x00060>,
                       <0 0xe1250080 0 0x00004>;
+                amd,speed-set = <0>;
         };
diff --git a/Documentation/devicetree/bindings/net/amd-xgbe.txt b/Documentation/devicetree/bindings/net/amd-xgbe.txt
index ea0c7908a3b8..41354f730beb 100644
--- a/Documentation/devicetree/bindings/net/amd-xgbe.txt
+++ b/Documentation/devicetree/bindings/net/amd-xgbe.txt
@@ -8,16 +8,21 @@ Required properties:
 - interrupt-parent: Should be the phandle for the interrupt controller
   that services interrupts for this device
 - interrupts: Should contain the amd-xgbe interrupt
-- clocks: Should be the DMA clock for the amd-xgbe device (used for
-  calculating the correct Rx interrupt watchdog timer value on a DMA
-  channel for coalescing)
-- clock-names: Should be the name of the DMA clock, "dma_clk"
+- clocks:
+   - DMA clock for the amd-xgbe device (used for calculating the
+     correct Rx interrupt watchdog timer value on a DMA channel
+     for coalescing)
+   - PTP clock for the amd-xgbe device
+- clock-names: Should be the names of the clocks
+   - "dma_clk" for the DMA clock
+   - "ptp_clk" for the PTP clock
 - phy-handle: See ethernet.txt file in the same directory
 - phy-mode: See ethernet.txt file in the same directory
 
 Optional properties:
 - mac-address: mac address to be assigned to the device. Can be overridden
   by UEFI.
+- dma-coherent: Present if dma operations are coherent
 
 Example:
         xgbe@e0700000 {
@@ -26,8 +31,8 @@ Example:
                       <0 0xe0780000 0 0x80000>;
                 interrupt-parent = <&gic>;
                 interrupts = <0 325 4>;
-                clocks = <&xgbe_clk>;
-                clock-names = "dma_clk";
+                clocks = <&xgbe_dma_clk>, <&xgbe_ptp_clk>;
+                clock-names = "dma_clk", "ptp_clk";
                 phy-handle = <&phy>;
                 phy-mode = "xgmii";
                 mac-address = [ 02 a1 a2 a3 a4 a5 ];
diff --git a/Documentation/devicetree/bindings/net/broadcom-systemport.txt b/Documentation/devicetree/bindings/net/broadcom-systemport.txt
index c183ea90d9bc..aa7ad622259d 100644
--- a/Documentation/devicetree/bindings/net/broadcom-systemport.txt
+++ b/Documentation/devicetree/bindings/net/broadcom-systemport.txt
@@ -4,7 +4,8 @@ Required properties:
 - compatible: should be one of "brcm,systemport-v1.00" or "brcm,systemport"
 - reg: address and length of the register set for the device.
 - interrupts: interrupts for the device, first cell must be for the the rx
-  interrupts, and the second cell should be for the transmit queues
+  interrupts, and the second cell should be for the transmit queues. An
+  optional third interrupt cell for Wake-on-LAN can be specified
 - local-mac-address: Ethernet MAC address (48 bits) of this adapter
 - phy-mode: Should be a string describing the PHY interface to the
   Ethernet switch/PHY, see Documentation/devicetree/bindings/net/ethernet.txt
diff --git a/Documentation/devicetree/bindings/net/davinci-mdio.txt b/Documentation/devicetree/bindings/net/davinci-mdio.txt
index 72efaaf764f7..0369e25aabd2 100644
--- a/Documentation/devicetree/bindings/net/davinci-mdio.txt
+++ b/Documentation/devicetree/bindings/net/davinci-mdio.txt
@@ -1,8 +1,8 @@
-TI SoC Davinci MDIO Controller Device Tree Bindings
+TI SoC Davinci/Keystone2 MDIO Controller Device Tree Bindings
 ---------------------------------------------------
 
 Required properties:
-- compatible            : Should be "ti,davinci_mdio"
+- compatible            : Should be "ti,davinci_mdio" or "ti,keystone_mdio"
 - reg                   : physical base address and size of the davinci mdio
                           registers map
 - bus_freq              : Mdio Bus frequency
@@ -19,7 +19,7 @@ file.
 Examples:
 
         mdio: davinci_mdio@4A101000 {
-                compatible = "ti,cpsw";
+                compatible = "ti,davinci_mdio";
                 reg = <0x4A101000 0x1000>;
                 bus_freq = <1000000>;
         };
@@ -27,7 +27,7 @@ Examples:
 (or)
 
         mdio: davinci_mdio@4A101000 {
-                compatible = "ti,cpsw";
+                compatible = "ti,davinci_mdio";
                 ti,hwmods = "davinci_mdio";
                 bus_freq = <1000000>;
         };
diff --git a/Documentation/devicetree/bindings/net/ieee802154/cc2520.txt b/Documentation/devicetree/bindings/net/ieee802154/cc2520.txt
new file mode 100644
index 000000000000..0071883c08d8
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/ieee802154/cc2520.txt
@@ -0,0 +1,29 @@
+*CC2520 IEEE 802.15.4 Compatible Radio*
+
+Required properties:
+        - compatible:           should be "ti,cc2520"
+        - spi-max-frequency:    maximal bus speed (8000000), should be set to 4000000 depends
+                                sync or async operation mode
+        - reg:                  the chipselect index
+        - pinctrl-0:            pin control group to be used for this controller.
+        - pinctrl-names:        must contain a "default" entry.
+        - fifo-gpio:            GPIO spec for the FIFO pin
+        - fifop-gpio:           GPIO spec for the FIFOP pin
+        - sfd-gpio:             GPIO spec for the SFD pin
+        - cca-gpio:             GPIO spec for the CCA pin
+        - vreg-gpio:            GPIO spec for the VREG pin
+        - reset-gpio:           GPIO spec for the RESET pin
+Example:
+        cc2520@0 {
+                compatible = "ti,cc2520";
+                reg = <0>;
+                spi-max-frequency = <4000000>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&cc2520_cape_pins>;
+                fifo-gpio = <&gpio1 18 0>;
+                fifop-gpio = <&gpio1 19 0>;
+                sfd-gpio = <&gpio1 13 0>;
+                cca-gpio = <&gpio1 16 0>;
+                vreg-gpio = <&gpio0 31 0>;
+                reset-gpio = <&gpio1 12 0>;
+        };
diff --git a/Documentation/devicetree/bindings/net/marvell-pp2.txt b/Documentation/devicetree/bindings/net/marvell-pp2.txt
new file mode 100644
index 000000000000..aa4f4230bfd7
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/marvell-pp2.txt
@@ -0,0 +1,61 @@
+* Marvell Armada 375 Ethernet Controller (PPv2)
+
+Required properties:
+
+- compatible: should be "marvell,armada-375-pp2"
+- reg: addresses and length of the register sets for the device.
+  Must contain the following register sets:
+        - common controller registers
+        - LMS registers
+  In addition, at least one port register set is required.
+- clocks: a pointer to the reference clocks for this device, consequently:
+        - main controller clock
+        - GOP clock
+- clock-names: names of used clocks, must be "pp_clk" and "gop_clk".
+
+The ethernet ports are represented by subnodes. At least one port is
+required.
+
+Required properties (port):
+
+- interrupts: interrupt for the port
+- port-id: should be '0' or '1' for ethernet ports, and '2' for the
+           loopback port
+- phy-mode: See ethernet.txt file in the same directory
+
+Optional properties (port):
+
+- marvell,loopback: port is loopback mode
+- phy: a phandle to a phy node defining the PHY address (as the reg
+  property, a single integer). Note: if this property isn't present,
+  then fixed link is assumed, and the 'fixed-link' property is
+  mandatory.
+
+Example:
+
+ethernet@f0000 {
+        compatible = "marvell,armada-375-pp2";
+        reg = <0xf0000 0xa000>,
+              <0xc0000 0x3060>,
+              <0xc4000 0x100>,
+              <0xc5000 0x100>;
+        clocks = <&gateclk 3>, <&gateclk 19>;
+        clock-names = "pp_clk", "gop_clk";
+        status = "okay";
+
+        eth0: eth0@c4000 {
+                interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+                port-id = <0>;
+                status = "okay";
+                phy = <&phy0>;
+                phy-mode = "gmii";
+        };
+
+        eth1: eth1@c5000 {
+                interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+                port-id = <1>;
+                status = "okay";
+                phy = <&phy3>;
+                phy-mode = "gmii";
+        };
+};
diff --git a/Documentation/devicetree/bindings/net/nfc/st21nfcb.txt b/Documentation/devicetree/bindings/net/nfc/st21nfcb.txt
new file mode 100644
index 000000000000..3b58ae480344
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/nfc/st21nfcb.txt
@@ -0,0 +1,33 @@
+* STMicroelectronics SAS. ST21NFCB NFC Controller
+
+Required properties:
+- compatible: Should be "st,st21nfcb_i2c".
+- clock-frequency: I²C work frequency.
+- reg: address on the bus
+- interrupt-parent: phandle for the interrupt gpio controller
+- interrupts: GPIO interrupt to which the chip is connected
+- reset-gpios: Output GPIO pin used to reset the ST21NFCB
+
+Optional SoC Specific Properties:
+- pinctrl-names: Contains only one value - "default".
+- pintctrl-0: Specifies the pin control groups used for this controller.
+
+Example (for ARM-based BeagleBoard xM with ST21NFCB on I2C2):
+
+&i2c2 {
+
+        status = "okay";
+
+        st21nfcb: st21nfcb@8 {
+
+                compatible = "st,st21nfcb_i2c";
+
+                reg = <0x08>;
+                clock-frequency = <400000>;
+
+                interrupt-parent = <&gpio5>;
+                interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+
+                reset-gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
+        };
+};
diff --git a/Documentation/devicetree/bindings/net/sh_eth.txt b/Documentation/devicetree/bindings/net/sh_eth.txt
index e7106b50dbdc..34d4db1a4e25 100644
--- a/Documentation/devicetree/bindings/net/sh_eth.txt
+++ b/Documentation/devicetree/bindings/net/sh_eth.txt
@@ -9,6 +9,7 @@ Required properties:
               "renesas,ether-r8a7779"  if the device is a part of R8A7779 SoC.
               "renesas,ether-r8a7790"  if the device is a part of R8A7790 SoC.
               "renesas,ether-r8a7791"  if the device is a part of R8A7791 SoC.
+              "renesas,ether-r8a7794"  if the device is a part of R8A7794 SoC.
               "renesas,ether-r7s72100" if the device is a part of R7S72100 SoC.
 - reg: offset and length of (1) the E-DMAC/feLic register block (required),
        (2) the TSU register block (optional).
diff --git a/Documentation/devicetree/bindings/net/stmmac.txt b/Documentation/devicetree/bindings/net/stmmac.txt
index a2acd2b26baf..9b03c57563a4 100644
--- a/Documentation/devicetree/bindings/net/stmmac.txt
+++ b/Documentation/devicetree/bindings/net/stmmac.txt
@@ -25,6 +25,10 @@ Required properties:
 - snps,force_sf_dma_mode        Force DMA to use the Store and Forward
                                 mode for both tx and rx. This flag is
                                 ignored if force_thresh_dma_mode is set.
+- snps,multicast-filter-bins:   Number of multicast filter hash bins
+                                supported by this device instance
+- snps,perfect-filter-entries:  Number of perfect filter entries supported
+                                by this device instance
 
 Optional properties:
 - resets: Should contain a phandle to the STMMAC reset signal, if any
@@ -47,6 +51,8 @@ Examples:
                 mac-address = [000000000000]; /* Filled in by U-Boot */
                 max-frame-size = <3800>;
                 phy-mode = "gmii";
+                snps,multicast-filter-bins = <256>;
+                snps,perfect-filter-entries = <128>;
                 clocks = <&clock>;
                 clock-names = "stmmaceth">;
         };
diff --git a/Documentation/devicetree/bindings/net/wireless/brcm,bcm43xx-fmac.txt b/Documentation/devicetree/bindings/net/wireless/brcm,bcm43xx-fmac.txt
new file mode 100644
index 000000000000..5dbf169cd81c
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/wireless/brcm,bcm43xx-fmac.txt
@@ -0,0 +1,41 @@
+Broadcom BCM43xx Fullmac wireless SDIO devices
+
+This node provides properties for controlling the Broadcom wireless device. The
+node is expected to be specified as a child node to the SDIO controller that
+connects the device to the system.
+
+Required properties:
+
+ - compatible : Should be "brcm,bcm4329-fmac".
+
+Optional properties:
+ - brcm,drive-strength : drive strength used for SDIO pins on device in mA
+        (default = 6).
+ - interrupt-parent : the phandle for the interrupt controller to which the
+        device interrupts are connected.
+ - interrupts : specifies attributes for the out-of-band interrupt (host-wake).
+        When not specified the device will use in-band SDIO interrupts.
+ - interrupt-names : name of the out-of-band interrupt, which must be set
+        to "host-wake".
+
+Example:
+
+mmc3: mmc@01c12000 {
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc3_pins_a>;
+        vmmc-supply = <&reg_vmmc3>;
+        bus-width = <4>;
+        non-removable;
+        status = "okay";
+
+        brcmf: bcrmf@1 {
+                reg = <1>;
+                compatible = "brcm,bcm4329-fmac";
+                interrupt-parent = <&pio>;
+                interrupts = <10 8>; /* PH10 / EINT10 */
+                interrupt-names = "host-wake";
+        };
+};