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1 | MediaTek PMIC Wrapper Driver | ||
2 | |||
3 | This document describes the binding for the MediaTek PMIC wrapper. | ||
4 | |||
5 | On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface | ||
6 | is not directly visible to the CPU, but only through the PMIC wrapper | ||
7 | inside the SoC. The communication between the SoC and the PMIC can | ||
8 | optionally be encrypted. Also a non standard Dual IO SPI mode can be | ||
9 | used to increase speed. | ||
10 | |||
11 | IP Pairing | ||
12 | |||
13 | on MT8135 the pins of some SoC internal peripherals can be on the PMIC. | ||
14 | The signals of these pins are routed over the SPI bus using the pwrap | ||
15 | bridge. In the binding description below the properties needed for bridging | ||
16 | are marked with "IP Pairing". These are optional on SoCs which do not support | ||
17 | IP Pairing | ||
18 | |||
19 | Required properties in pwrap device node. | ||
20 | - compatible: | ||
21 | "mediatek,mt8135-pwrap" for MT8135 SoCs | ||
22 | "mediatek,mt8173-pwrap" for MT8173 SoCs | ||
23 | - interrupts: IRQ for pwrap in SOC | ||
24 | - reg-names: Must include the following entries: | ||
25 | "pwrap": Main registers base | ||
26 | "pwrap-bridge": bridge base (IP Pairing) | ||
27 | - reg: Must contain an entry for each entry in reg-names. | ||
28 | - reset-names: Must include the following entries: | ||
29 | "pwrap" | ||
30 | "pwrap-bridge" (IP Pairing) | ||
31 | - resets: Must contain an entry for each entry in reset-names. | ||
32 | - clock-names: Must include the following entries: | ||
33 | "spi": SPI bus clock | ||
34 | "wrap": Main module clock | ||
35 | - clocks: Must contain an entry for each entry in clock-names. | ||
36 | |||
37 | Optional properities: | ||
38 | - pmic: Mediatek PMIC MFD is the child device of pwrap | ||
39 | See the following for child node definitions: | ||
40 | Documentation/devicetree/bindings/mfd/mt6397.txt | ||
41 | |||
42 | Example: | ||
43 | pwrap: pwrap@1000f000 { | ||
44 | compatible = "mediatek,mt8135-pwrap"; | ||
45 | reg = <0 0x1000f000 0 0x1000>, | ||
46 | <0 0x11017000 0 0x1000>; | ||
47 | reg-names = "pwrap", "pwrap-bridge"; | ||
48 | interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; | ||
49 | resets = <&infracfg MT8135_INFRA_PMIC_WRAP_RST>, | ||
50 | <&pericfg MT8135_PERI_PWRAP_BRIDGE_SW_RST>; | ||
51 | reset-names = "pwrap", "pwrap-bridge"; | ||
52 | clocks = <&clk26m>, <&clk26m>; | ||
53 | clock-names = "spi", "wrap"; | ||
54 | |||
55 | pmic { | ||
56 | compatible = "mediatek,mt6397"; | ||
57 | }; | ||
58 | }; | ||