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Diffstat (limited to 'Documentation/devicetree/bindings/pci/ti-pci.txt')
-rw-r--r-- | Documentation/devicetree/bindings/pci/ti-pci.txt | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pci/ti-pci.txt b/Documentation/devicetree/bindings/pci/ti-pci.txt new file mode 100644 index 000000000000..3d217911b313 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/ti-pci.txt | |||
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1 | TI PCI Controllers | ||
2 | |||
3 | PCIe Designware Controller | ||
4 | - compatible: Should be "ti,dra7-pcie"" | ||
5 | - reg : Two register ranges as listed in the reg-names property | ||
6 | - reg-names : The first entry must be "ti-conf" for the TI specific registers | ||
7 | The second entry must be "rc-dbics" for the designware pcie | ||
8 | registers | ||
9 | The third entry must be "config" for the PCIe configuration space | ||
10 | - phys : list of PHY specifiers (used by generic PHY framework) | ||
11 | - phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the | ||
12 | number of PHYs as specified in *phys* property. | ||
13 | - ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>", | ||
14 | where <X> is the instance number of the pcie from the HW spec. | ||
15 | - interrupts : Two interrupt entries must be specified. The first one is for | ||
16 | main interrupt line and the second for MSI interrupt line. | ||
17 | - #address-cells, | ||
18 | #size-cells, | ||
19 | #interrupt-cells, | ||
20 | device_type, | ||
21 | ranges, | ||
22 | num-lanes, | ||
23 | interrupt-map-mask, | ||
24 | interrupt-map : as specified in ../designware-pcie.txt | ||
25 | |||
26 | Example: | ||
27 | axi { | ||
28 | compatible = "simple-bus"; | ||
29 | #size-cells = <1>; | ||
30 | #address-cells = <1>; | ||
31 | ranges = <0x51000000 0x51000000 0x3000 | ||
32 | 0x0 0x20000000 0x10000000>; | ||
33 | pcie@51000000 { | ||
34 | compatible = "ti,dra7-pcie"; | ||
35 | reg = <0x51000000 0x2000>, <0x51002000 0x14c>, <0x1000 0x2000>; | ||
36 | reg-names = "rc_dbics", "ti_conf", "config"; | ||
37 | interrupts = <0 232 0x4>, <0 233 0x4>; | ||
38 | #address-cells = <3>; | ||
39 | #size-cells = <2>; | ||
40 | device_type = "pci"; | ||
41 | ranges = <0x81000000 0 0 0x03000 0 0x00010000 | ||
42 | 0x82000000 0 0x20013000 0x13000 0 0xffed000>; | ||
43 | #interrupt-cells = <1>; | ||
44 | num-lanes = <1>; | ||
45 | ti,hwmods = "pcie1"; | ||
46 | phys = <&pcie1_phy>; | ||
47 | phy-names = "pcie-phy0"; | ||
48 | interrupt-map-mask = <0 0 0 7>; | ||
49 | interrupt-map = <0 0 0 1 &pcie_intc 1>, | ||
50 | <0 0 0 2 &pcie_intc 2>, | ||
51 | <0 0 0 3 &pcie_intc 3>, | ||
52 | <0 0 0 4 &pcie_intc 4>; | ||
53 | pcie_intc: interrupt-controller { | ||
54 | interrupt-controller; | ||
55 | #address-cells = <0>; | ||
56 | #interrupt-cells = <1>; | ||
57 | }; | ||
58 | }; | ||
59 | }; | ||