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-rw-r--r--Documentation/clk.txt46
1 files changed, 26 insertions, 20 deletions
diff --git a/Documentation/clk.txt b/Documentation/clk.txt
index 6f68ba0d1e01..3aeb5c440442 100644
--- a/Documentation/clk.txt
+++ b/Documentation/clk.txt
@@ -70,6 +70,10 @@ the operations defined in clk.h:
70 unsigned long parent_rate); 70 unsigned long parent_rate);
71 long (*round_rate)(struct clk_hw *hw, unsigned long, 71 long (*round_rate)(struct clk_hw *hw, unsigned long,
72 unsigned long *); 72 unsigned long *);
73 long (*determine_rate)(struct clk_hw *hw,
74 unsigned long rate,
75 unsigned long *best_parent_rate,
76 struct clk **best_parent_clk);
73 int (*set_parent)(struct clk_hw *hw, u8 index); 77 int (*set_parent)(struct clk_hw *hw, u8 index);
74 u8 (*get_parent)(struct clk_hw *hw); 78 u8 (*get_parent)(struct clk_hw *hw);
75 int (*set_rate)(struct clk_hw *hw, unsigned long); 79 int (*set_rate)(struct clk_hw *hw, unsigned long);
@@ -179,26 +183,28 @@ mandatory, a cell marked as "n" implies that either including that
179callback is invalid or otherwise unnecessary. Empty cells are either 183callback is invalid or otherwise unnecessary. Empty cells are either
180optional or must be evaluated on a case-by-case basis. 184optional or must be evaluated on a case-by-case basis.
181 185
182 clock hardware characteristics 186 clock hardware characteristics
183 ----------------------------------------------------------- 187 -----------------------------------------------------------
184 | gate | change rate | single parent | multiplexer | root | 188 | gate | change rate | single parent | multiplexer | root |
185 |------|-------------|---------------|-------------|------| 189 |------|-------------|---------------|-------------|------|
186.prepare | | | | | | 190.prepare | | | | | |
187.unprepare | | | | | | 191.unprepare | | | | | |
188 | | | | | | 192 | | | | | |
189.enable | y | | | | | 193.enable | y | | | | |
190.disable | y | | | | | 194.disable | y | | | | |
191.is_enabled | y | | | | | 195.is_enabled | y | | | | |
192 | | | | | | 196 | | | | | |
193.recalc_rate | | y | | | | 197.recalc_rate | | y | | | |
194.round_rate | | y | | | | 198.round_rate | | y [1] | | | |
195.set_rate | | y | | | | 199.determine_rate | | y [1] | | | |
196 | | | | | | 200.set_rate | | y | | | |
197.set_parent | | | n | y | n | 201 | | | | | |
198.get_parent | | | n | y | n | 202.set_parent | | | n | y | n |
199 | | | | | | 203.get_parent | | | n | y | n |
200.init | | | | | | 204 | | | | | |
201 ----------------------------------------------------------- 205.init | | | | | |
206 -----------------------------------------------------------
207[1] either one of round_rate or determine_rate is required.
202 208
203Finally, register your clock at run-time with a hardware-specific 209Finally, register your clock at run-time with a hardware-specific
204registration function. This function simply populates struct clk_foo's 210registration function. This function simply populates struct clk_foo's