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-rw-r--r--Documentation/DMA-mapping.txt26
1 files changed, 19 insertions, 7 deletions
diff --git a/Documentation/DMA-mapping.txt b/Documentation/DMA-mapping.txt
index ee4bb73683cd..7c717699032c 100644
--- a/Documentation/DMA-mapping.txt
+++ b/Documentation/DMA-mapping.txt
@@ -58,11 +58,15 @@ translating each of those pages back to a kernel address using
58something like __va(). [ EDIT: Update this when we integrate 58something like __va(). [ EDIT: Update this when we integrate
59Gerd Knorr's generic code which does this. ] 59Gerd Knorr's generic code which does this. ]
60 60
61This rule also means that you may not use kernel image addresses 61This rule also means that you may use neither kernel image addresses
62(ie. items in the kernel's data/text/bss segment, or your driver's) 62(items in data/text/bss segments), nor module image addresses, nor
63nor may you use kernel stack addresses for DMA. Both of these items 63stack addresses for DMA. These could all be mapped somewhere entirely
64might be mapped somewhere entirely different than the rest of physical 64different than the rest of physical memory. Even if those classes of
65memory. 65memory could physically work with DMA, you'd need to ensure the I/O
66buffers were cacheline-aligned. Without that, you'd see cacheline
67sharing problems (data corruption) on CPUs with DMA-incoherent caches.
68(The CPU could write to one word, DMA would write to a different one
69in the same cache line, and one of them could be overwritten.)
66 70
67Also, this means that you cannot take the return of a kmap() 71Also, this means that you cannot take the return of a kmap()
68call and DMA to/from that. This is similar to vmalloc(). 72call and DMA to/from that. This is similar to vmalloc().
@@ -194,7 +198,7 @@ document for how to handle this case.
194Finally, if your device can only drive the low 24-bits of 198Finally, if your device can only drive the low 24-bits of
195address during PCI bus mastering you might do something like: 199address during PCI bus mastering you might do something like:
196 200
197 if (pci_set_dma_mask(pdev, 0x00ffffff)) { 201 if (pci_set_dma_mask(pdev, DMA_24BIT_MASK)) {
198 printk(KERN_WARNING 202 printk(KERN_WARNING
199 "mydev: 24-bit DMA addressing not available.\n"); 203 "mydev: 24-bit DMA addressing not available.\n");
200 goto ignore_this_device; 204 goto ignore_this_device;
@@ -212,7 +216,7 @@ functions (for example a sound card provides playback and record
212functions) and the various different functions have _different_ 216functions) and the various different functions have _different_
213DMA addressing limitations, you may wish to probe each mask and 217DMA addressing limitations, you may wish to probe each mask and
214only provide the functionality which the machine can handle. It 218only provide the functionality which the machine can handle. It
215is important that the last call to pci_set_dma_mask() be for the 219is important that the last call to pci_set_dma_mask() be for the
216most specific mask. 220most specific mask.
217 221
218Here is pseudo-code showing how this might be done: 222Here is pseudo-code showing how this might be done:
@@ -284,6 +288,11 @@ There are two types of DMA mappings:
284 288
285 in order to get correct behavior on all platforms. 289 in order to get correct behavior on all platforms.
286 290
291 Also, on some platforms your driver may need to flush CPU write
292 buffers in much the same way as it needs to flush write buffers
293 found in PCI bridges (such as by reading a register's value
294 after writing it).
295
287- Streaming DMA mappings which are usually mapped for one DMA transfer, 296- Streaming DMA mappings which are usually mapped for one DMA transfer,
288 unmapped right after it (unless you use pci_dma_sync_* below) and for which 297 unmapped right after it (unless you use pci_dma_sync_* below) and for which
289 hardware can optimize for sequential accesses. 298 hardware can optimize for sequential accesses.
@@ -303,6 +312,9 @@ There are two types of DMA mappings:
303 312
304Neither type of DMA mapping has alignment restrictions that come 313Neither type of DMA mapping has alignment restrictions that come
305from PCI, although some devices may have such restrictions. 314from PCI, although some devices may have such restrictions.
315Also, systems with caches that aren't DMA-coherent will work better
316when the underlying buffers don't share cache lines with other data.
317
306 318
307 Using Consistent DMA mappings. 319 Using Consistent DMA mappings.
308 320