diff options
-rw-r--r-- | drivers/net/wireless/b43/phy_ht.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/net/wireless/b43/phy_ht.h b/drivers/net/wireless/b43/phy_ht.h index 9b2408efb224..6cae370d1018 100644 --- a/drivers/net/wireless/b43/phy_ht.h +++ b/drivers/net/wireless/b43/phy_ht.h | |||
@@ -23,6 +23,9 @@ | |||
23 | #define B43_PHY_HT_SAMP_WAIT_CNT 0x0C5 /* Sample wait count */ | 23 | #define B43_PHY_HT_SAMP_WAIT_CNT 0x0C5 /* Sample wait count */ |
24 | #define B43_PHY_HT_SAMP_DEP_CNT 0x0C6 /* Sample depth count */ | 24 | #define B43_PHY_HT_SAMP_DEP_CNT 0x0C6 /* Sample depth count */ |
25 | #define B43_PHY_HT_SAMP_STAT 0x0C7 /* Sample status */ | 25 | #define B43_PHY_HT_SAMP_STAT 0x0C7 /* Sample status */ |
26 | #define B43_PHY_HT_EST_PWR_C1 0x118 | ||
27 | #define B43_PHY_HT_EST_PWR_C2 0x119 | ||
28 | #define B43_PHY_HT_EST_PWR_C3 0x11A | ||
26 | #define B43_PHY_HT_TSSIMODE 0x122 /* TSSI mode */ | 29 | #define B43_PHY_HT_TSSIMODE 0x122 /* TSSI mode */ |
27 | #define B43_PHY_HT_TSSIMODE_EN 0x0001 /* TSSI enable */ | 30 | #define B43_PHY_HT_TSSIMODE_EN 0x0001 /* TSSI enable */ |
28 | #define B43_PHY_HT_TSSIMODE_PDEN 0x0002 /* Power det enable */ | 31 | #define B43_PHY_HT_TSSIMODE_PDEN 0x0002 /* Power det enable */ |
@@ -53,6 +56,8 @@ | |||
53 | #define B43_PHY_HT_TXPCTL_TARG_PWR_C1_SHIFT 0 | 56 | #define B43_PHY_HT_TXPCTL_TARG_PWR_C1_SHIFT 0 |
54 | #define B43_PHY_HT_TXPCTL_TARG_PWR_C2 0xFF00 /* Power 1 */ | 57 | #define B43_PHY_HT_TXPCTL_TARG_PWR_C2 0xFF00 /* Power 1 */ |
55 | #define B43_PHY_HT_TXPCTL_TARG_PWR_C2_SHIFT 8 | 58 | #define B43_PHY_HT_TXPCTL_TARG_PWR_C2_SHIFT 8 |
59 | #define B43_PHY_HT_TX_PCTL_STATUS_C1 0x1ED | ||
60 | #define B43_PHY_HT_TX_PCTL_STATUS_C2 0x1EE | ||
56 | #define B43_PHY_HT_TXPCTL_CMD_C2 0x222 | 61 | #define B43_PHY_HT_TXPCTL_CMD_C2 0x222 |
57 | #define B43_PHY_HT_TXPCTL_CMD_C2_INIT 0x007F | 62 | #define B43_PHY_HT_TXPCTL_CMD_C2_INIT 0x007F |
58 | #define B43_PHY_HT_RSSI_C1 0x219 | 63 | #define B43_PHY_HT_RSSI_C1 0x219 |
@@ -97,6 +102,7 @@ | |||
97 | #define B43_PHY_HT_TXPCTL_TARG_PWR2 B43_PHY_EXTG(0x166) /* TX power control target power */ | 102 | #define B43_PHY_HT_TXPCTL_TARG_PWR2 B43_PHY_EXTG(0x166) /* TX power control target power */ |
98 | #define B43_PHY_HT_TXPCTL_TARG_PWR2_C3 0x00FF | 103 | #define B43_PHY_HT_TXPCTL_TARG_PWR2_C3 0x00FF |
99 | #define B43_PHY_HT_TXPCTL_TARG_PWR2_C3_SHIFT 0 | 104 | #define B43_PHY_HT_TXPCTL_TARG_PWR2_C3_SHIFT 0 |
105 | #define B43_PHY_HT_TX_PCTL_STATUS_C3 B43_PHY_EXTG(0x169) | ||
100 | 106 | ||
101 | #define B43_PHY_HT_TEST B43_PHY_N_BMODE(0x00A) | 107 | #define B43_PHY_HT_TEST B43_PHY_N_BMODE(0x00A) |
102 | 108 | ||