diff options
| -rw-r--r-- | drivers/gpu/drm/mgag200/mgag200_mode.c | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index 2affe7af6cbb..d983868ebd35 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c | |||
| @@ -189,12 +189,12 @@ static int mga_g200wb_set_plls(struct mga_device *mdev, long clock) | |||
| 189 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); | 189 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); |
| 190 | tmp = RREG8(DAC_DATA); | 190 | tmp = RREG8(DAC_DATA); |
| 191 | tmp |= MGA1064_PIX_CLK_CTL_CLK_DIS; | 191 | tmp |= MGA1064_PIX_CLK_CTL_CLK_DIS; |
| 192 | WREG_DAC(MGA1064_PIX_CLK_CTL_CLK_DIS, tmp); | 192 | WREG8(DAC_DATA, tmp); |
| 193 | 193 | ||
| 194 | WREG8(DAC_INDEX, MGA1064_REMHEADCTL); | 194 | WREG8(DAC_INDEX, MGA1064_REMHEADCTL); |
| 195 | tmp = RREG8(DAC_DATA); | 195 | tmp = RREG8(DAC_DATA); |
| 196 | tmp |= MGA1064_REMHEADCTL_CLKDIS; | 196 | tmp |= MGA1064_REMHEADCTL_CLKDIS; |
| 197 | WREG_DAC(MGA1064_REMHEADCTL, tmp); | 197 | WREG8(DAC_DATA, tmp); |
| 198 | 198 | ||
| 199 | /* select PLL Set C */ | 199 | /* select PLL Set C */ |
| 200 | tmp = RREG8(MGAREG_MEM_MISC_READ); | 200 | tmp = RREG8(MGAREG_MEM_MISC_READ); |
| @@ -204,7 +204,7 @@ static int mga_g200wb_set_plls(struct mga_device *mdev, long clock) | |||
| 204 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); | 204 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); |
| 205 | tmp = RREG8(DAC_DATA); | 205 | tmp = RREG8(DAC_DATA); |
| 206 | tmp |= MGA1064_PIX_CLK_CTL_CLK_POW_DOWN | 0x80; | 206 | tmp |= MGA1064_PIX_CLK_CTL_CLK_POW_DOWN | 0x80; |
| 207 | WREG_DAC(MGA1064_PIX_CLK_CTL, tmp); | 207 | WREG8(DAC_DATA, tmp); |
| 208 | 208 | ||
| 209 | udelay(500); | 209 | udelay(500); |
| 210 | 210 | ||
| @@ -212,7 +212,7 @@ static int mga_g200wb_set_plls(struct mga_device *mdev, long clock) | |||
| 212 | WREG8(DAC_INDEX, MGA1064_VREF_CTL); | 212 | WREG8(DAC_INDEX, MGA1064_VREF_CTL); |
| 213 | tmp = RREG8(DAC_DATA); | 213 | tmp = RREG8(DAC_DATA); |
| 214 | tmp &= ~0x04; | 214 | tmp &= ~0x04; |
| 215 | WREG_DAC(MGA1064_VREF_CTL, tmp); | 215 | WREG8(DAC_DATA, tmp); |
| 216 | 216 | ||
| 217 | udelay(50); | 217 | udelay(50); |
| 218 | 218 | ||
| @@ -236,13 +236,13 @@ static int mga_g200wb_set_plls(struct mga_device *mdev, long clock) | |||
| 236 | tmp = RREG8(DAC_DATA); | 236 | tmp = RREG8(DAC_DATA); |
| 237 | tmp &= ~MGA1064_PIX_CLK_CTL_SEL_MSK; | 237 | tmp &= ~MGA1064_PIX_CLK_CTL_SEL_MSK; |
| 238 | tmp |= MGA1064_PIX_CLK_CTL_SEL_PLL; | 238 | tmp |= MGA1064_PIX_CLK_CTL_SEL_PLL; |
| 239 | WREG_DAC(MGA1064_PIX_CLK_CTL, tmp); | 239 | WREG8(DAC_DATA, tmp); |
| 240 | 240 | ||
| 241 | WREG8(DAC_INDEX, MGA1064_REMHEADCTL); | 241 | WREG8(DAC_INDEX, MGA1064_REMHEADCTL); |
| 242 | tmp = RREG8(DAC_DATA); | 242 | tmp = RREG8(DAC_DATA); |
| 243 | tmp &= ~MGA1064_REMHEADCTL_CLKSL_MSK; | 243 | tmp &= ~MGA1064_REMHEADCTL_CLKSL_MSK; |
| 244 | tmp |= MGA1064_REMHEADCTL_CLKSL_PLL; | 244 | tmp |= MGA1064_REMHEADCTL_CLKSL_PLL; |
| 245 | WREG_DAC(MGA1064_REMHEADCTL, tmp); | 245 | WREG8(DAC_DATA, tmp); |
| 246 | 246 | ||
| 247 | /* reset dotclock rate bit */ | 247 | /* reset dotclock rate bit */ |
| 248 | WREG8(MGAREG_SEQ_INDEX, 1); | 248 | WREG8(MGAREG_SEQ_INDEX, 1); |
| @@ -253,7 +253,7 @@ static int mga_g200wb_set_plls(struct mga_device *mdev, long clock) | |||
| 253 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); | 253 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); |
| 254 | tmp = RREG8(DAC_DATA); | 254 | tmp = RREG8(DAC_DATA); |
| 255 | tmp &= ~MGA1064_PIX_CLK_CTL_CLK_DIS; | 255 | tmp &= ~MGA1064_PIX_CLK_CTL_CLK_DIS; |
| 256 | WREG_DAC(MGA1064_PIX_CLK_CTL, tmp); | 256 | WREG8(DAC_DATA, tmp); |
| 257 | 257 | ||
| 258 | vcount = RREG8(MGAREG_VCOUNT); | 258 | vcount = RREG8(MGAREG_VCOUNT); |
| 259 | 259 | ||
| @@ -318,7 +318,7 @@ static int mga_g200ev_set_plls(struct mga_device *mdev, long clock) | |||
| 318 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); | 318 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); |
| 319 | tmp = RREG8(DAC_DATA); | 319 | tmp = RREG8(DAC_DATA); |
| 320 | tmp |= MGA1064_PIX_CLK_CTL_CLK_DIS; | 320 | tmp |= MGA1064_PIX_CLK_CTL_CLK_DIS; |
| 321 | WREG_DAC(MGA1064_PIX_CLK_CTL_CLK_DIS, tmp); | 321 | WREG8(DAC_DATA, tmp); |
| 322 | 322 | ||
| 323 | tmp = RREG8(MGAREG_MEM_MISC_READ); | 323 | tmp = RREG8(MGAREG_MEM_MISC_READ); |
| 324 | tmp |= 0x3 << 2; | 324 | tmp |= 0x3 << 2; |
| @@ -326,12 +326,12 @@ static int mga_g200ev_set_plls(struct mga_device *mdev, long clock) | |||
| 326 | 326 | ||
| 327 | WREG8(DAC_INDEX, MGA1064_PIX_PLL_STAT); | 327 | WREG8(DAC_INDEX, MGA1064_PIX_PLL_STAT); |
| 328 | tmp = RREG8(DAC_DATA); | 328 | tmp = RREG8(DAC_DATA); |
| 329 | WREG_DAC(MGA1064_PIX_PLL_STAT, tmp & ~0x40); | 329 | WREG8(DAC_DATA, tmp & ~0x40); |
| 330 | 330 | ||
| 331 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); | 331 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); |
| 332 | tmp = RREG8(DAC_DATA); | 332 | tmp = RREG8(DAC_DATA); |
| 333 | tmp |= MGA1064_PIX_CLK_CTL_CLK_POW_DOWN; | 333 | tmp |= MGA1064_PIX_CLK_CTL_CLK_POW_DOWN; |
| 334 | WREG_DAC(MGA1064_PIX_CLK_CTL, tmp); | 334 | WREG8(DAC_DATA, tmp); |
| 335 | 335 | ||
| 336 | WREG_DAC(MGA1064_EV_PIX_PLLC_M, m); | 336 | WREG_DAC(MGA1064_EV_PIX_PLLC_M, m); |
| 337 | WREG_DAC(MGA1064_EV_PIX_PLLC_N, n); | 337 | WREG_DAC(MGA1064_EV_PIX_PLLC_N, n); |
| @@ -342,7 +342,7 @@ static int mga_g200ev_set_plls(struct mga_device *mdev, long clock) | |||
| 342 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); | 342 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); |
| 343 | tmp = RREG8(DAC_DATA); | 343 | tmp = RREG8(DAC_DATA); |
| 344 | tmp &= ~MGA1064_PIX_CLK_CTL_CLK_POW_DOWN; | 344 | tmp &= ~MGA1064_PIX_CLK_CTL_CLK_POW_DOWN; |
| 345 | WREG_DAC(MGA1064_PIX_CLK_CTL, tmp); | 345 | WREG8(DAC_DATA, tmp); |
| 346 | 346 | ||
| 347 | udelay(500); | 347 | udelay(500); |
| 348 | 348 | ||
| @@ -350,11 +350,11 @@ static int mga_g200ev_set_plls(struct mga_device *mdev, long clock) | |||
| 350 | tmp = RREG8(DAC_DATA); | 350 | tmp = RREG8(DAC_DATA); |
| 351 | tmp &= ~MGA1064_PIX_CLK_CTL_SEL_MSK; | 351 | tmp &= ~MGA1064_PIX_CLK_CTL_SEL_MSK; |
| 352 | tmp |= MGA1064_PIX_CLK_CTL_SEL_PLL; | 352 | tmp |= MGA1064_PIX_CLK_CTL_SEL_PLL; |
| 353 | WREG_DAC(MGA1064_PIX_CLK_CTL, tmp); | 353 | WREG8(DAC_DATA, tmp); |
| 354 | 354 | ||
| 355 | WREG8(DAC_INDEX, MGA1064_PIX_PLL_STAT); | 355 | WREG8(DAC_INDEX, MGA1064_PIX_PLL_STAT); |
| 356 | tmp = RREG8(DAC_DATA); | 356 | tmp = RREG8(DAC_DATA); |
| 357 | WREG_DAC(MGA1064_PIX_PLL_STAT, tmp | 0x40); | 357 | WREG8(DAC_DATA, tmp | 0x40); |
| 358 | 358 | ||
| 359 | tmp = RREG8(MGAREG_MEM_MISC_READ); | 359 | tmp = RREG8(MGAREG_MEM_MISC_READ); |
| 360 | tmp |= (0x3 << 2); | 360 | tmp |= (0x3 << 2); |
| @@ -363,7 +363,7 @@ static int mga_g200ev_set_plls(struct mga_device *mdev, long clock) | |||
| 363 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); | 363 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); |
| 364 | tmp = RREG8(DAC_DATA); | 364 | tmp = RREG8(DAC_DATA); |
| 365 | tmp &= ~MGA1064_PIX_CLK_CTL_CLK_DIS; | 365 | tmp &= ~MGA1064_PIX_CLK_CTL_CLK_DIS; |
| 366 | WREG_DAC(MGA1064_PIX_CLK_CTL, tmp); | 366 | WREG8(DAC_DATA, tmp); |
| 367 | 367 | ||
| 368 | return 0; | 368 | return 0; |
| 369 | } | 369 | } |
| @@ -416,7 +416,7 @@ static int mga_g200eh_set_plls(struct mga_device *mdev, long clock) | |||
| 416 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); | 416 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); |
| 417 | tmp = RREG8(DAC_DATA); | 417 | tmp = RREG8(DAC_DATA); |
| 418 | tmp |= MGA1064_PIX_CLK_CTL_CLK_DIS; | 418 | tmp |= MGA1064_PIX_CLK_CTL_CLK_DIS; |
| 419 | WREG_DAC(MGA1064_PIX_CLK_CTL_CLK_DIS, tmp); | 419 | WREG8(DAC_DATA, tmp); |
| 420 | 420 | ||
| 421 | tmp = RREG8(MGAREG_MEM_MISC_READ); | 421 | tmp = RREG8(MGAREG_MEM_MISC_READ); |
| 422 | tmp |= 0x3 << 2; | 422 | tmp |= 0x3 << 2; |
| @@ -425,7 +425,7 @@ static int mga_g200eh_set_plls(struct mga_device *mdev, long clock) | |||
| 425 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); | 425 | WREG8(DAC_INDEX, MGA1064_PIX_CLK_CTL); |
| 426 | tmp = RREG8(DAC_DATA); | 426 | tmp = RREG8(DAC_DATA); |
| 427 | tmp |= MGA1064_PIX_CLK_CTL_CLK_POW_DOWN; | 427 | tmp |= MGA1064_PIX_CLK_CTL_CLK_POW_DOWN; |
| 428 | WREG_DAC(MGA1064_PIX_CLK_CTL, tmp); | 428 | WREG8(DAC_DATA, tmp); |
| 429 | 429 | ||
| 430 | udelay(500); | 430 | udelay(500); |
| 431 | 431 | ||
| @@ -439,13 +439,13 @@ static int mga_g200eh_set_plls(struct mga_device *mdev, long clock) | |||
| 439 | tmp = RREG8(DAC_DATA); | 439 | tmp = RREG8(DAC_DATA); |
| 440 | tmp &= ~MGA1064_PIX_CLK_CTL_SEL_MSK; | 440 | tmp &= ~MGA1064_PIX_CLK_CTL_SEL_MSK; |
| 441 | tmp |= MGA1064_PIX_CLK_CTL_SEL_PLL; | 441 | tmp |= MGA1064_PIX_CLK_CTL_SEL_PLL; |
| 442 | WREG_DAC(MGA1064_PIX_CLK_CTL, tmp); | 442 | WREG8(DAC_DATA, tmp); |
