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-rw-r--r--drivers/rtc/rtc-omap.c12
1 files changed, 7 insertions, 5 deletions
diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c
index 64d9727b7229..73377b0d65da 100644
--- a/drivers/rtc/rtc-omap.c
+++ b/drivers/rtc/rtc-omap.c
@@ -34,7 +34,8 @@
34 * Board-specific wiring options include using split power mode with 34 * Board-specific wiring options include using split power mode with
35 * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset), 35 * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
36 * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from 36 * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
37 * low power modes). See the BOARD-SPECIFIC CUSTOMIZATION comment. 37 * low power modes) for OMAP1 boards (OMAP-L138 has this built into
38 * the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment.
38 */ 39 */
39 40
40#define OMAP_RTC_BASE 0xfffb4800 41#define OMAP_RTC_BASE 0xfffb4800
@@ -401,16 +402,17 @@ static int __init omap_rtc_probe(struct platform_device *pdev)
401 402
402 /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE: 403 /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
403 * 404 *
404 * - Boards wired so that RTC_WAKE_INT does something, and muxed 405 * - Device wake-up capability setting should come through chip
405 * right (W13_1610_RTC_WAKE_INT is the default after chip reset), 406 * init logic. OMAP1 boards should initialize the "wakeup capable"
406 * should initialize the device wakeup flag appropriately. 407 * flag in the platform device if the board is wired right for
408 * being woken up by RTC alarm. For OMAP-L138, this capability
409 * is built into the SoC by the "Deep Sleep" capability.
407 * 410 *
408 * - Boards wired so RTC_ON_nOFF is used as the reset signal, 411 * - Boards wired so RTC_ON_nOFF is used as the reset signal,
409 * rather than nPWRON_RESET, should forcibly enable split 412 * rather than nPWRON_RESET, should forcibly enable split
410 * power mode. (Some chip errata report that RTC_CTRL_SPLIT 413 * power mode. (Some chip errata report that RTC_CTRL_SPLIT
411 * is write-only, and always reads as zero...) 414 * is write-only, and always reads as zero...)
412 */ 415 */
413 device_init_wakeup(&pdev->dev, 0);
414 416
415 if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT) 417 if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT)
416 pr_info("%s: split power mode\n", pdev->name); 418 pr_info("%s: split power mode\n", pdev->name);