3 files changed, 10 insertions, 4 deletions

diff --git a/arch/ia64/kernel/sal.c b/arch/ia64/kernel/sal.c
index 642fdc7b969d..20bad78b5073 100644
--- a/arch/ia64/kernel/sal.c
+++ b/arch/ia64/kernel/sal.c
@@ -223,12 +223,13 @@ static void __init sal_desc_ap_wakeup(void *p) { }
  */
 static int sal_cache_flush_drops_interrupts;
 
-static void __init
+void __init
 check_sal_cache_flush (void)
 {
         unsigned long flags;
         int cpu;
-        u64 vector;
+        u64 vector, cache_type = 3;
+        struct ia64_sal_retval isrv;
 
         cpu = get_cpu();
         local_irq_save(flags);
@@ -243,7 +244,10 @@ check_sal_cache_flush (void)
         while (!ia64_get_irr(IA64_TIMER_VECTOR))
                 cpu_relax();
 
-        ia64_sal_cache_flush(3);
+        SAL_CALL(isrv, SAL_CACHE_FLUSH, cache_type, 0, 0, 0, 0, 0, 0);
+
+        if (isrv.status)
+                printk(KERN_ERR "SAL_CAL_FLUSH failed with %ld\n", isrv.status);
 
         if (ia64_get_irr(IA64_TIMER_VECTOR)) {
                 vector = ia64_get_ivr();
@@ -331,7 +335,6 @@ ia64_sal_init (struct ia64_sal_systab *systab)
                 p += SAL_DESC_SIZE(*p);
         }
 
-        check_sal_cache_flush();
 }
 
 int
diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c
index c4caa8003492..d10404a41756 100644
--- a/arch/ia64/kernel/setup.c
+++ b/arch/ia64/kernel/setup.c
@@ -457,6 +457,8 @@ setup_arch (char **cmdline_p)
         cpu_init();     /* initialize the bootstrap CPU */
         mmu_context_init();     /* initialize context_id bitmap */
 
+        check_sal_cache_flush();
+
 #ifdef CONFIG_ACPI
         acpi_boot_init();
 #endif
diff --git a/include/asm-ia64/sal.h b/include/asm-ia64/sal.h
index 0b210abbe003..d000689d9142 100644
--- a/include/asm-ia64/sal.h
+++ b/include/asm-ia64/sal.h
@@ -659,6 +659,7 @@ ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second,
 }
 
 extern s64 ia64_sal_cache_flush (u64 cache_type);
+extern void __init check_sal_cache_flush (void);
 
 /* Initialize all the processor and platform level instruction and data caches */
 static inline s64