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-rw-r--r--drivers/edac/amd64_edac.c16
1 files changed, 7 insertions, 9 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index c9eee6d33e9a..b9424dcde906 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -2133,6 +2133,7 @@ static void read_mc_regs(struct amd64_pvt *pvt)
2133static u32 amd64_csrow_nr_pages(struct amd64_pvt *pvt, u8 dct, int csrow_nr) 2133static u32 amd64_csrow_nr_pages(struct amd64_pvt *pvt, u8 dct, int csrow_nr)
2134{ 2134{
2135 u32 cs_mode, nr_pages; 2135 u32 cs_mode, nr_pages;
2136 u32 dbam = dct ? pvt->dbam1 : pvt->dbam0;
2136 2137
2137 /* 2138 /*
2138 * The math on this doesn't look right on the surface because x/2*4 can 2139 * The math on this doesn't look right on the surface because x/2*4 can
@@ -2141,16 +2142,10 @@ static u32 amd64_csrow_nr_pages(struct amd64_pvt *pvt, u8 dct, int csrow_nr)
2141 * number of bits to shift the DBAM register to extract the proper CSROW 2142 * number of bits to shift the DBAM register to extract the proper CSROW
2142 * field. 2143 * field.
2143 */ 2144 */
2144 cs_mode = (pvt->dbam0 >> ((csrow_nr / 2) * 4)) & 0xF; 2145 cs_mode = (dbam >> ((csrow_nr / 2) * 4)) & 0xF;
2145 2146
2146 nr_pages = pvt->ops->dbam_to_cs(pvt, dct, cs_mode) << (20 - PAGE_SHIFT); 2147 nr_pages = pvt->ops->dbam_to_cs(pvt, dct, cs_mode) << (20 - PAGE_SHIFT);
2147 2148
2148 /*
2149 * If dual channel then double the memory size of single channel.
2150 * Channel count is 1 or 2
2151 */
2152 nr_pages <<= (pvt->channel_count - 1);
2153
2154 debugf0(" (csrow=%d) DBAM map index= %d\n", csrow_nr, cs_mode); 2149 debugf0(" (csrow=%d) DBAM map index= %d\n", csrow_nr, cs_mode);
2155 debugf0(" nr_pages= %u channel-count = %d\n", 2150 debugf0(" nr_pages= %u channel-count = %d\n",
2156 nr_pages, pvt->channel_count); 2151 nr_pages, pvt->channel_count);
@@ -2181,7 +2176,7 @@ static int init_csrows(struct mem_ctl_info *mci)
2181 for_each_chip_select(i, 0, pvt) { 2176 for_each_chip_select(i, 0, pvt) {
2182 csrow = &mci->csrows[i]; 2177 csrow = &mci->csrows[i];
2183 2178
2184 if (!csrow_enabled(i, 0, pvt)) { 2179 if (!csrow_enabled(i, 0, pvt) && !csrow_enabled(i, 1, pvt)) {
2185 debugf1("----CSROW %d EMPTY for node %d\n", i, 2180 debugf1("----CSROW %d EMPTY for node %d\n", i,
2186 pvt->mc_node_id); 2181 pvt->mc_node_id);
2187 continue; 2182 continue;
@@ -2191,7 +2186,10 @@ static int init_csrows(struct mem_ctl_info *mci)
2191 i, pvt->mc_node_id); 2186 i, pvt->mc_node_id);
2192 2187
2193 empty = 0; 2188 empty = 0;
2194 csrow->nr_pages = amd64_csrow_nr_pages(pvt, 0, i); 2189 if (csrow_enabled(i, 0, pvt))
2190 csrow->nr_pages = amd64_csrow_nr_pages(pvt, 0, i);
2191 if (csrow_enabled(i, 1, pvt))
2192 csrow->nr_pages += amd64_csrow_nr_pages(pvt, 1, i);
2195 find_csrow_limits(mci, i, &input_addr_min, &input_addr_max); 2193 find_csrow_limits(mci, i, &input_addr_min, &input_addr_max);
2196 sys_addr = input_addr_to_sys_addr(mci, input_addr_min); 2194 sys_addr = input_addr_to_sys_addr(mci, input_addr_min);
2197 csrow->first_page = (u32) (sys_addr >> PAGE_SHIFT); 2195 csrow->first_page = (u32) (sys_addr >> PAGE_SHIFT);