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-rw-r--r--arch/mips/alchemy/Kconfig2
-rw-r--r--arch/mips/alchemy/devboards/Makefile2
-rw-r--r--arch/mips/alchemy/devboards/db1550.c506
-rw-r--r--arch/mips/alchemy/devboards/db1x00/board_setup.c24
-rw-r--r--arch/mips/alchemy/devboards/db1x00/platform.c61
-rw-r--r--arch/mips/configs/db1550_defconfig288
-rw-r--r--arch/mips/include/asm/mach-db1x00/bcsr.h2
-rw-r--r--arch/mips/include/asm/mach-db1x00/db1x00.h16
-rw-r--r--sound/soc/au1x/Kconfig4
-rw-r--r--sound/soc/au1x/db1200.c34
10 files changed, 763 insertions, 176 deletions
diff --git a/arch/mips/alchemy/Kconfig b/arch/mips/alchemy/Kconfig
index f9a13beada4a..a1b995ff517b 100644
--- a/arch/mips/alchemy/Kconfig
+++ b/arch/mips/alchemy/Kconfig
@@ -71,7 +71,7 @@ config MIPS_DB1550
71 bool "Alchemy DB1550 board" 71 bool "Alchemy DB1550 board"
72 select ALCHEMY_GPIOINT_AU1000 72 select ALCHEMY_GPIOINT_AU1000
73 select HW_HAS_PCI 73 select HW_HAS_PCI
74 select DMA_NONCOHERENT 74 select DMA_COHERENT
75 select MIPS_DISABLE_OBSOLETE_IDE 75 select MIPS_DISABLE_OBSOLETE_IDE
76 select SYS_SUPPORTS_LITTLE_ENDIAN 76 select SYS_SUPPORTS_LITTLE_ENDIAN
77 select SYS_HAS_EARLY_PRINTK 77 select SYS_HAS_EARLY_PRINTK
diff --git a/arch/mips/alchemy/devboards/Makefile b/arch/mips/alchemy/devboards/Makefile
index 2eb75c92a583..3467ec94d8b1 100644
--- a/arch/mips/alchemy/devboards/Makefile
+++ b/arch/mips/alchemy/devboards/Makefile
@@ -13,4 +13,4 @@ obj-$(CONFIG_MIPS_DB1100) += db1x00/
13obj-$(CONFIG_MIPS_DB1200) += db1200/ 13obj-$(CONFIG_MIPS_DB1200) += db1200/
14obj-$(CONFIG_MIPS_DB1300) += db1300.o 14obj-$(CONFIG_MIPS_DB1300) += db1300.o
15obj-$(CONFIG_MIPS_DB1500) += db1x00/ 15obj-$(CONFIG_MIPS_DB1500) += db1x00/
16obj-$(CONFIG_MIPS_DB1550) += db1x00/ 16obj-$(CONFIG_MIPS_DB1550) += db1550.o
diff --git a/arch/mips/alchemy/devboards/db1550.c b/arch/mips/alchemy/devboards/db1550.c
new file mode 100644
index 000000000000..a4755b0570a1
--- /dev/null
+++ b/arch/mips/alchemy/devboards/db1550.c
@@ -0,0 +1,506 @@
1/*
2 * Alchemy Db1550 board support
3 *
4 * (c) 2011 Manuel Lauss <manuel.lauss@googlemail.com>
5 */
6
7#include <linux/dma-mapping.h>
8#include <linux/gpio.h>
9#include <linux/i2c.h>
10#include <linux/init.h>
11#include <linux/io.h>
12#include <linux/interrupt.h>
13#include <linux/mtd/mtd.h>
14#include <linux/mtd/nand.h>
15#include <linux/mtd/partitions.h>
16#include <linux/platform_device.h>
17#include <linux/pm.h>
18#include <linux/spi/spi.h>
19#include <linux/spi/flash.h>
20#include <asm/mach-au1x00/au1000.h>
21#include <asm/mach-au1x00/au1xxx_eth.h>
22#include <asm/mach-au1x00/au1xxx_dbdma.h>
23#include <asm/mach-au1x00/au1xxx_psc.h>
24#include <asm/mach-au1x00/au1550_spi.h>
25#include <asm/mach-db1x00/bcsr.h>
26#include <prom.h>
27#include "platform.h"
28
29
30const char *get_system_type(void)
31{
32 return "DB1550";
33}
34
35static void __init db1550_hw_setup(void)
36{
37 void __iomem *base;
38
39 alchemy_gpio_direction_output(203, 0); /* red led on */
40
41 /* complete SPI setup: link psc0_intclk to a 48MHz source,
42 * and assign GPIO16 to PSC0_SYNC1 (SPI cs# line)
43 */
44 base = (void __iomem *)SYS_CLKSRC;
45 __raw_writel(__raw_readl(base) | 0x000001e0, base);
46 base = (void __iomem *)SYS_PINFUNC;
47 __raw_writel(__raw_readl(base) | 1, base);
48 wmb();
49
50 /* reset the AC97 codec now, the reset time in the psc-ac97 driver
51 * is apparently too short although it's ridiculous as it is.
52 */
53 base = (void __iomem *)KSEG1ADDR(AU1550_PSC1_PHYS_ADDR);
54 __raw_writel(PSC_SEL_CLK_SERCLK | PSC_SEL_PS_AC97MODE,
55 base + PSC_SEL_OFFSET);
56 __raw_writel(PSC_CTRL_DISABLE, base + PSC_CTRL_OFFSET);
57 wmb();
58 __raw_writel(PSC_AC97RST_RST, base + PSC_AC97RST_OFFSET);
59 wmb();
60
61 alchemy_gpio_direction_output(202, 0); /* green led on */
62}
63
64void __init board_setup(void)
65{
66 unsigned short whoami;
67
68 bcsr_init(DB1550_BCSR_PHYS_ADDR,
69 DB1550_BCSR_PHYS_ADDR + DB1550_BCSR_HEXLED_OFS);
70
71 whoami = bcsr_read(BCSR_WHOAMI);
72 printk(KERN_INFO "Alchemy/AMD DB1550 Board, CPLD Rev %d"
73 " Board-ID %d Daughtercard ID %d\n",
74 (whoami >> 4) & 0xf, (whoami >> 8) & 0xf, whoami & 0xf);
75
76 db1550_hw_setup();
77}
78
79/*****************************************************************************/
80
81static struct mtd_partition db1550_spiflash_parts[] = {
82 {
83 .name = "spi_flash",
84 .offset = 0,
85 .size = MTDPART_SIZ_FULL,
86 },
87};
88
89static struct flash_platform_data db1550_spiflash_data = {
90 .name = "s25fl010",
91 .parts = db1550_spiflash_parts,
92 .nr_parts = ARRAY_SIZE(db1550_spiflash_parts),
93 .type = "m25p10",
94};
95
96static struct spi_board_info db1550_spi_devs[] __initdata = {
97 {
98 /* TI TMP121AIDBVR temp sensor */
99 .modalias = "tmp121",
100 .max_speed_hz = 2400000,
101 .bus_num = 0,
102 .chip_select = 0,
103 .mode = SPI_MODE_0,
104 },
105 {
106 /* Spansion S25FL001D0FMA SPI flash */
107 .modalias = "m25p80",
108 .max_speed_hz = 2400000,
109 .bus_num = 0,
110 .chip_select = 1,
111 .mode = SPI_MODE_0,
112 .platform_data = &db1550_spiflash_data,
113 },
114};
115
116static struct i2c_board_info db1550_i2c_devs[] __initdata = {
117 { I2C_BOARD_INFO("24c04", 0x52),}, /* AT24C04-10 I2C eeprom */
118 { I2C_BOARD_INFO("ne1619", 0x2d),}, /* adm1025-compat hwmon */
119 { I2C_BOARD_INFO("wm8731", 0x1b),}, /* I2S audio codec WM8731 */
120};
121
122/**********************************************************************/
123
124static void au1550_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
125 unsigned int ctrl)
126{
127 struct nand_chip *this = mtd->priv;
128 unsigned long ioaddr = (unsigned long)this->IO_ADDR_W;
129
130 ioaddr &= 0xffffff00;
131
132 if (ctrl & NAND_CLE) {
133 ioaddr += MEM_STNAND_CMD;
134 } else if (ctrl & NAND_ALE) {
135 ioaddr += MEM_STNAND_ADDR;
136 } else {
137 /* assume we want to r/w real data by default */
138 ioaddr += MEM_STNAND_DATA;
139 }
140 this->IO_ADDR_R = this->IO_ADDR_W = (void __iomem *)ioaddr;
141 if (cmd != NAND_CMD_NONE) {
142 __raw_writeb(cmd, this->IO_ADDR_W);
143 wmb();
144 }
145}
146
147static int au1550_nand_device_ready(struct mtd_info *mtd)
148{
149 return __raw_readl((void __iomem *)MEM_STSTAT) & 1;
150}
151
152static const char *db1550_part_probes[] = { "cmdlinepart", NULL };
153
154static struct mtd_partition db1550_nand_parts[] = {
155 {
156 .name = "NAND FS 0",
157 .offset = 0,
158 .size = 8 * 1024 * 1024,
159 },
160 {
161 .name = "NAND FS 1",
162 .offset = MTDPART_OFS_APPEND,
163 .size = MTDPART_SIZ_FULL
164 },
165};
166
167struct platform_nand_data db1550_nand_platdata = {
168 .chip = {
169 .nr_chips = 1,
170 .chip_offset = 0,
171 .nr_partitions = ARRAY_SIZE(db1550_nand_parts),
172 .partitions = db1550_nand_parts,
173 .chip_delay = 20,
174 .part_probe_types = db1550_part_probes,
175 },
176 .ctrl = {
177 .dev_ready = au1550_nand_device_ready,
178 .cmd_ctrl = au1550_nand_cmd_ctrl,
179 },
180};
181
182static struct resource db1550_nand_res[] = {
183 [0] = {
184 .start = 0x20000000,
185 .end = 0x200000ff,
186 .flags = IORESOURCE_MEM,
187 },
188};
189
190static struct platform_device db1550_nand_dev = {
191 .name = "gen_nand",
192 .num_resources = ARRAY_SIZE(db1550_nand_res),
193 .resource = db1550_nand_res,
194 .id = -1,
195 .dev = {
196 .platform_data = &db1550_nand_platdata,
197 }
198};
199
200/**********************************************************************/
201
202static struct resource au1550_psc0_res[] = {
203 [0] = {
204 .start = AU1550_PSC0_PHYS_ADDR,
205 .end = AU1550_PSC0_PHYS_ADDR + 0xfff,
206 .flags = IORESOURCE_MEM,
207 },
208 [1] = {
209 .start = AU1550_PSC0_INT,
210 .end = AU1550_PSC0_INT,
211 .flags = IORESOURCE_IRQ,
212 },
213 [2] = {
214 .start = AU1550_DSCR_CMD0_PSC0_TX,
215 .end = AU1550_DSCR_CMD0_PSC0_TX,
216 .flags = IORESOURCE_DMA,
217 },
218 [3] = {
219 .start = AU1550_DSCR_CMD0_PSC0_RX,
220 .end = AU1550_DSCR_CMD0_PSC0_RX,
221 .flags = IORESOURCE_DMA,
222 },
223};
224
225static void db1550_spi_cs_en(struct au1550_spi_info *spi, int cs, int pol)
226{
227 if (cs)
228 bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_SPISEL);
229 else
230 bcsr_mod(BCSR_BOARD, BCSR_BOARD_SPISEL, 0);
231}
232
233static struct au1550_spi_info db1550_spi_platdata = {
234 .mainclk_hz = 48000000, /* PSC0 clock: max. 2.4MHz SPI clk */
235 .num_chipselect = 2,
236 .activate_cs = db1550_spi_cs_en,
237};
238
239static u64 spi_dmamask = DMA_BIT_MASK(32);
240
241static struct platform_device db1550_spi_dev = {
242 .dev = {
243 .dma_mask = &spi_dmamask,
244 .coherent_dma_mask = DMA_BIT_MASK(32),
245 .platform_data = &db1550_spi_platdata,
246 },
247 .name = "au1550-spi",
248 .id = 0, /* bus number */
249 .num_resources = ARRAY_SIZE(au1550_psc0_res),
250 .resource = au1550_psc0_res,
251};
252
253/**********************************************************************/
254
255static struct resource au1550_psc1_res[] = {
256 [0] = {
257 .start = AU1550_PSC1_PHYS_ADDR,
258 .end = AU1550_PSC1_PHYS_ADDR + 0xfff,
259 .flags = IORESOURCE_MEM,
260 },
261 [1] = {
262 .start = AU1550_PSC1_INT,
263 .end = AU1550_PSC1_INT,
264 .flags = IORESOURCE_IRQ,
265 },
266 [2] = {
267 .start = AU1550_DSCR_CMD0_PSC1_TX,
268 .end = AU1550_DSCR_CMD0_PSC1_TX,
269 .flags = IORESOURCE_DMA,
270 },
271 [3] = {
272 .start = AU1550_DSCR_CMD0_PSC1_RX,
273 .end = AU1550_DSCR_CMD0_PSC1_RX,
274 .flags = IORESOURCE_DMA,
275 },
276};
277
278static struct platform_device db1550_ac97_dev = {
279 .name = "au1xpsc_ac97",
280 .id = 1, /* PSC ID */
281 .num_resources = ARRAY_SIZE(au1550_psc1_res),
282 .resource = au1550_psc1_res,
283};
284
285
286static struct resource au1550_psc2_res[] = {
287 [0] = {
288 .start = AU1550_PSC2_PHYS_ADDR,
289 .end = AU1550_PSC2_PHYS_ADDR + 0xfff,
290 .flags = IORESOURCE_MEM,
291 },
292 [1] = {
293 .start = AU1550_PSC2_INT,
294 .end = AU1550_PSC2_INT,
295 .flags = IORESOURCE_IRQ,
296 },
297 [2] = {
298 .start = AU1550_DSCR_CMD0_PSC2_TX,
299 .end = AU1550_DSCR_CMD0_PSC2_TX,
300 .flags = IORESOURCE_DMA,
301 },
302 [3] = {
303 .start = AU1550_DSCR_CMD0_PSC2_RX,
304 .end = AU1550_DSCR_CMD0_PSC2_RX,
305 .flags = IORESOURCE_DMA,
306 },
307};
308
309static struct platform_device db1550_i2c_dev = {
310 .name = "au1xpsc_smbus",
311 .id = 0, /* bus number */
312 .num_resources = ARRAY_SIZE(au1550_psc2_res),
313 .resource = au1550_psc2_res,
314};
315
316/**********************************************************************/
317
318static struct resource au1550_psc3_res[] = {
319 [0] = {
320 .start = AU1550_PSC3_PHYS_ADDR,
321 .end = AU1550_PSC3_PHYS_ADDR + 0xfff,
322 .flags = IORESOURCE_MEM,
323 },
324 [1] = {
325 .start = AU1550_PSC3_INT,
326 .end = AU1550_PSC3_INT,
327 .flags = IORESOURCE_IRQ,
328 },
329 [2] = {
330 .start = AU1550_DSCR_CMD0_PSC3_TX,
331 .end = AU1550_DSCR_CMD0_PSC3_TX,
332 .flags = IORESOURCE_DMA,
333 },
334 [3] = {
335 .start = AU1550_DSCR_CMD0_PSC3_RX,
336 .end = AU1550_DSCR_CMD0_PSC3_RX,
337 .flags = IORESOURCE_DMA,
338 },
339};
340
341static struct platform_device db1550_i2s_dev = {
342 .name = "au1xpsc_i2s",
343 .id = 3, /* PSC ID */
344 .num_resources = ARRAY_SIZE(au1550_psc3_res),
345 .resource = au1550_psc3_res,
346};
347
348/**********************************************************************/
349
350static struct platform_device db1550_stac_dev = {
351 .name = "ac97-codec",
352 .id = 1, /* on PSC1 */
353};
354
355static struct platform_device db1550_ac97dma_dev = {
356 .name = "au1xpsc-pcm",
357 .id = 1, /* on PSC3 */
358};
359
360static struct platform_device db1550_i2sdma_dev = {
361 .name = "au1xpsc-pcm",
362 .id = 3, /* on PSC3 */
363};
364
365static struct platform_device db1550_sndac97_dev = {
366 .name = "db1550-ac97",
367};
368
369static struct platform_device db1550_sndi2s_dev = {
370 .name = "db1550-i2s",
371};
372
373/**********************************************************************/
374
375static struct platform_device db1550_rtc_dev = {
376 .name = "rtc-au1xxx",
377 .id = -1,
378};
379
380/**********************************************************************/
381
382static int db1550_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
383{
384 if ((slot < 11) || (slot > 13) || pin == 0)
385 return -1;
386 if (slot == 11)
387 return (pin == 1) ? AU1550_PCI_INTC : 0xff;
388 if (slot == 12) {
389 switch (pin) {
390 case 1: return AU1550_PCI_INTB;
391 case 2: return AU1550_PCI_INTC;
392 case 3: return AU1550_PCI_INTD;
393 case 4: return AU1550_PCI_INTA;
394 }
395 }
396 if (slot == 13) {
397 switch (pin) {
398 case 1: return AU1550_PCI_INTA;
399 case 2: return AU1550_PCI_INTB;
400 case 3: return AU1550_PCI_INTC;
401 case 4: return AU1550_PCI_INTD;
402 }
403 }
404 return -1;
405}
406
407static struct resource alchemy_pci_host_res[] = {
408 [0] = {
409 .start = AU1500_PCI_PHYS_ADDR,
410 .end = AU1500_PCI_PHYS_ADDR + 0xfff,
411 .flags = IORESOURCE_MEM,
412 },
413};
414
415static struct alchemy_pci_platdata db1550_pci_pd = {
416 .board_map_irq = db1550_map_pci_irq,
417};
418
419static struct platform_device db1550_pci_host_dev = {
420 .dev.platform_data = &db1550_pci_pd,
421 .name = "alchemy-pci",
422 .id = 0,
423 .num_resources = ARRAY_SIZE(alchemy_pci_host_res),
424 .resource = alchemy_pci_host_res,
425};
426
427/**********************************************************************/
428
429static struct platform_device *db1550_devs[] __initdata = {
430 &db1550_rtc_dev,
431 &db1550_nand_dev,
432 &db1550_i2c_dev,
433 &db1550_ac97_dev,
434 &db1550_spi_dev,
435 &db1550_i2s_dev,
436 &db1550_stac_dev,
437 &db1550_ac97dma_dev,
438 &db1550_i2sdma_dev,
439 &db1550_sndac97_dev,
440 &db1550_sndi2s_dev,
441};
442
443/* must be arch_initcall; MIPS PCI scans busses in a subsys_initcall */
444static int __init db1550_pci_init(void)
445{
446 return platform_device_register(&db1550_pci_host_dev);
447}
448arch_initcall(db1550_pci_init);
449
450static int __init db1550_dev_init(void)
451{
452 int swapped;
453
454 irq_set_irq_type(AU1550_GPIO0_INT, IRQ_TYPE_EDGE_BOTH); /* CD0# */
455 irq_set_irq_type(AU1550_GPIO1_INT, IRQ_TYPE_EDGE_BOTH); /* CD1# */
456 irq_set_irq_type(AU1550_GPIO3_INT, IRQ_TYPE_LEVEL_LOW); /* CARD0# */
457 irq_set_irq_type(AU1550_GPIO5_INT, IRQ_TYPE_LEVEL_LOW); /* CARD1# */
458 irq_set_irq_type(AU1550_GPIO21_INT, IRQ_TYPE_LEVEL_LOW); /* STSCHG0# */
459 irq_set_irq_type(AU1550_GPIO22_INT, IRQ_TYPE_LEVEL_LOW); /* STSCHG1# */
460
461 i2c_register_board_info(0, db1550_i2c_devs,
462 ARRAY_SIZE(db1550_i2c_devs));
463 spi_register_board_info(db1550_spi_devs,
464 ARRAY_SIZE(db1550_i2c_devs));
465
466 /* Audio PSC clock is supplied by codecs (PSC1, 3) FIXME: platdata!! */
467 __raw_writel(PSC_SEL_CLK_SERCLK,
468 (void __iomem *)KSEG1ADDR(AU1550_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);
469 wmb();
470 __raw_writel(PSC_SEL_CLK_SERCLK,
471 (void __iomem *)KSEG1ADDR(AU1550_PSC3_PHYS_ADDR) + PSC_SEL_OFFSET);
472 wmb();
473 /* SPI/I2C use internally supplied 50MHz source */
474 __raw_writel(PSC_SEL_CLK_INTCLK,
475 (void __iomem *)KSEG1ADDR(AU1550_PSC0_PHYS_ADDR) + PSC_SEL_OFFSET);
476 wmb();
477 __raw_writel(PSC_SEL_CLK_INTCLK,
478 (void __iomem *)KSEG1ADDR(AU1550_PSC2_PHYS_ADDR) + PSC_SEL_OFFSET);
479 wmb();
480
481 db1x_register_pcmcia_socket(
482 AU1000_PCMCIA_ATTR_PHYS_ADDR,
483 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
484 AU1000_PCMCIA_MEM_PHYS_ADDR,
485 AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
486 AU1000_PCMCIA_IO_PHYS_ADDR,
487 AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1,
488 AU1550_GPIO3_INT, AU1550_GPIO0_INT,
489 /*AU1550_GPIO21_INT*/0, 0, 0);
490
491 db1x_register_pcmcia_socket(
492 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004000000,
493 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1,
494 AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004000000,
495 AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004400000 - 1,
496 AU1000_PCMCIA_IO_PHYS_ADDR + 0x004000000,
497 AU1000_PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1,
498 AU1550_GPIO5_INT, AU1550_GPIO1_INT,
499 /*AU1550_GPIO22_INT*/0, 0, 1);
500
501 swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT;
502 db1x_register_norflash(128 << 20, 4, swapped);
503
504 return platform_add_devices(db1550_devs, ARRAY_SIZE(db1550_devs));
505}
506device_initcall(db1550_dev_init);
diff --git a/arch/mips/alchemy/devboards/db1x00/board_setup.c b/arch/mips/alchemy/devboards/db1x00/board_setup.c
index 8a222b3eba32..2dbebcba0206 100644
--- a/arch/mips/alchemy/devboards/db1x00/board_setup.c
+++ b/arch/mips/alchemy/devboards/db1x00/board_setup.c
@@ -48,11 +48,6 @@ const char *get_system_type(void)
48 48
49void __init board_setup(void) 49void __init board_setup(void)
50{ 50{
51 unsigned long bcsr1, bcsr2;
52
53 bcsr1 = DB1000_BCSR_PHYS_ADDR;
54 bcsr2 = DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS;
55
56#ifdef CONFIG_MIPS_DB1000 51#ifdef CONFIG_MIPS_DB1000
57 printk(KERN_INFO "AMD Alchemy Au1000/Db1000 Board\n"); 52 printk(KERN_INFO "AMD Alchemy Au1000/Db1000 Board\n");
58#endif 53#endif
@@ -62,15 +57,9 @@ void __init board_setup(void)
62#ifdef CONFIG_MIPS_DB1100 57#ifdef CONFIG_MIPS_DB1100
63 printk(KERN_INFO "AMD Alchemy Au1100/Db1100 Board\n"); 58 printk(KERN_INFO "AMD Alchemy Au1100/Db1100 Board\n");
64#endif 59#endif
65#ifdef CONFIG_MIPS_DB1550
66 printk(KERN_INFO "AMD Alchemy Au1550/Db1550 Board\n");
67
68 bcsr1 = DB1550_BCSR_PHYS_ADDR;
69 bcsr2 = DB1550_BCSR_PHYS_ADDR + DB1550_BCSR_HEXLED_OFS;
70#endif
71
72 /* initialize board register space */ 60 /* initialize board register space */
73 bcsr_init(bcsr1, bcsr2); 61 bcsr_init(DB1000_BCSR_PHYS_ADDR,
62 DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS);
74 63
75#if defined(CONFIG_IRDA) && defined(CONFIG_AU1000_FIR) 64#if defined(CONFIG_IRDA) && defined(CONFIG_AU1000_FIR)
76 { 65 {
@@ -92,14 +81,7 @@ void __init board_setup(void)
92 81
93static int __init db1x00_init_irq(void) 82static int __init db1x00_init_irq(void)
94{ 83{
95#if defined(CONFIG_MIPS_DB1550) 84#if defined(CONFIG_MIPS_DB1500)
96 irq_set_irq_type(AU1550_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */
97 irq_set_irq_type(AU1550_GPIO1_INT, IRQF_TRIGGER_LOW); /* CD1# */
98 irq_set_irq_type(AU1550_GPIO3_INT, IRQF_TRIGGER_LOW); /* CARD0# */
99 irq_set_irq_type(AU1550_GPIO5_INT, IRQF_TRIGGER_LOW); /* CARD1# */
100 irq_set_irq_type(AU1550_GPIO21_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */
101 irq_set_irq_type(AU1550_GPIO22_INT, IRQF_TRIGGER_LOW); /* STSCHG1# */
102#elif defined(CONFIG_MIPS_DB1500)
103 irq_set_irq_type(AU1500_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */ 85 irq_set_irq_type(AU1500_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */
104 irq_set_irq_type(AU1500_GPIO3_INT, IRQF_TRIGGER_LOW); /* CD1# */ 86 irq_set_irq_type(AU1500_GPIO3_INT, IRQF_TRIGGER_LOW); /* CD1# */
105 irq_set_irq_type(AU1500_GPIO2_INT, IRQF_TRIGGER_LOW); /* CARD0# */ 87 irq_set_irq_type(AU1500_GPIO2_INT, IRQF_TRIGGER_LOW); /* CARD0# */
diff --git a/arch/mips/alchemy/devboards/db1x00/platform.c b/arch/mips/alchemy/devboards/db1x00/platform.c
index 677414d5f5b4..67b36e8a4c98 100644
--- a/arch/mips/alchemy/devboards/db1x00/platform.c
+++ b/arch/mips/alchemy/devboards/db1x00/platform.c
@@ -34,7 +34,6 @@ struct pci_dev;
34 * CD0/1 GPIO0/3 34 * CD0/1 GPIO0/3
35 * STSCHG0/1 GPIO1/4 35 * STSCHG0/1 GPIO1/4
36 * CARD0/1 GPIO2/5 36 * CARD0/1 GPIO2/5
37 * Db1550: 0/1, 21/22, 3/5
38 */ 37 */
39 38
40#define F_SWAPPED (bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT) 39#define F_SWAPPED (bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT)
@@ -46,7 +45,6 @@ struct pci_dev;
46#define DB1XXX_PCMCIA_CD1 AU1000_GPIO3_INT 45#define DB1XXX_PCMCIA_CD1 AU1000_GPIO3_INT
47#define DB1XXX_PCMCIA_STSCHG1 AU1000_GPIO4_INT 46#define DB1XXX_PCMCIA_STSCHG1 AU1000_GPIO4_INT
48#define DB1XXX_PCMCIA_CARD1 AU1000_GPIO5_INT 47#define DB1XXX_PCMCIA_CARD1 AU1000_GPIO5_INT
49#define BOARD_FLASH_SIZE 0x02000000 /* 32MB */
50#elif defined(CONFIG_MIPS_DB1100) 48#elif defined(CONFIG_MIPS_DB1100)
51#define DB1XXX_PCMCIA_CD0 AU1100_GPIO0_INT 49#define DB1XXX_PCMCIA_CD0 AU1100_GPIO0_INT
52#define DB1XXX_PCMCIA_STSCHG0 AU1100_GPIO1_INT 50#define DB1XXX_PCMCIA_STSCHG0 AU1100_GPIO1_INT
@@ -54,7 +52,6 @@ struct pci_dev;
54#define DB1XXX_PCMCIA_CD1 AU1100_GPIO3_INT 52#define DB1XXX_PCMCIA_CD1 AU1100_GPIO3_INT
55#define DB1XXX_PCMCIA_STSCHG1 AU1100_GPIO4_INT 53#define DB1XXX_PCMCIA_STSCHG1 AU1100_GPIO4_INT
56#define DB1XXX_PCMCIA_CARD1 AU1100_GPIO5_INT 54#define DB1XXX_PCMCIA_CARD1 AU1100_GPIO5_INT
57#define BOARD_FLASH_SIZE 0x02000000 /* 32MB */
58#elif defined(CONFIG_MIPS_DB1500) 55#elif defined(CONFIG_MIPS_DB1500)
59#define DB1XXX_PCMCIA_CD0 AU1500_GPIO0_INT 56#define DB1XXX_PCMCIA_CD0 AU1500_GPIO0_INT
60#define DB1XXX_PCMCIA_STSCHG0 AU1500_GPIO1_INT 57#define DB1XXX_PCMCIA_STSCHG0 AU1500_GPIO1_INT
@@ -62,20 +59,8 @@ struct pci_dev;
62#define DB1XXX_PCMCIA_CD1 AU1500_GPIO3_INT 59#define DB1XXX_PCMCIA_CD1 AU1500_GPIO3_INT
63#define DB1XXX_PCMCIA_STSCHG1 AU1500_GPIO4_INT 60#define DB1XXX_PCMCIA_STSCHG1 AU1500_GPIO4_INT
64#define DB1XXX_PCMCIA_CARD1 AU1500_GPIO5_INT 61#define DB1XXX_PCMCIA_CARD1 AU1500_GPIO5_INT
65#define BOARD_FLASH_SIZE 0x02000000 /* 32MB */
66#elif defined(CONFIG_MIPS_DB1550)
67#define DB1XXX_PCMCIA_CD0 AU1550_GPIO0_INT
68#define DB1XXX_PCMCIA_STSCHG0 AU1550_GPIO21_INT
69#define DB1XXX_PCMCIA_CARD0 AU1550_GPIO3_INT
70#define DB1XXX_PCMCIA_CD1 AU1550_GPIO1_INT
71#define DB1XXX_PCMCIA_STSCHG1 AU1550_GPIO22_INT
72#define DB1XXX_PCMCIA_CARD1 AU1550_GPIO5_INT
73#define BOARD_FLASH_SIZE 0x08000000 /* 128MB */
74#endif
75 62
76#ifdef CONFIG_PCI 63static int db1500_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
77#ifdef CONFIG_MIPS_DB1500
78static int db1xxx_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
79{ 64{
80 if ((slot < 12) || (slot > 13) || pin == 0) 65 if ((slot < 12) || (slot > 13) || pin == 0)
81 return -1; 66 return -1;
@@ -91,34 +76,6 @@ static int db1xxx_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
91 } 76 }
92 return -1; 77 return -1;
93} 78}
94#endif
95
96#ifdef CONFIG_MIPS_DB1550
97static int db1xxx_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
98{
99 if ((slot < 11) || (slot > 13) || pin == 0)
100 return -1;
101 if (slot == 11)
102 return (pin == 1) ? AU1550_PCI_INTC : 0xff;
103 if (slot == 12) {
104 switch (pin) {
105 case 1: return AU1550_PCI_INTB;
106 case 2: return AU1550_PCI_INTC;
107 case 3: return AU1550_PCI_INTD;
108 case 4: return AU1550_PCI_INTA;
109 }
110 }
111 if (slot == 13) {
112 switch (pin) {
113 case 1: return AU1550_PCI_INTA;
114 case 2: return AU1550_PCI_INTB;
115 case 3: return AU1550_PCI_INTC;
116 case 4: return AU1550_PCI_INTD;
117 }
118 }
119 return -1;
120}
121#endif
122 79
123static struct resource alchemy_pci_host_res[] = { 80static struct resource alchemy_pci_host_res[] = {
124 [0] = { 81 [0] = {
@@ -128,24 +85,24 @@ static struct resource alchemy_pci_host_res[] = {
128 }, 85 },
129}; 86};
130 87
131static struct alchemy_pci_platdata db1xxx_pci_pd = { 88static struct alchemy_pci_platdata db1500_pci_pd = {
132 .board_map_irq = db1xxx_map_pci_irq, 89 .board_map_irq = db1500_map_pci_irq,
133}; 90};
134 91
135static struct platform_device db1xxx_pci_host_dev = { 92static struct platform_device db1500_pci_host_dev = {
136 .dev.platform_data = &db1xxx_pci_pd, 93 .dev.platform_data = &db1500_pci_pd,
137 .name = "alchemy-pci", 94 .name = "alchemy-pci",
138 .id = 0, 95 .id = 0,
139 .num_resources = ARRAY_SIZE(alchemy_pci_host_res), 96 .num_resources = ARRAY_SIZE(alchemy_pci_host_res),
140 .resource = alchemy_pci_host_res, 97 .resource = alchemy_pci_host_res,
141}; 98};
142 99
143static int __init db15x0_pci_init(void) 100static int __init db1500_pci_init(void)
144{ 101{
145 return platform_device_register(&db1xxx_pci_host_dev); 102 return platform_device_register(&db1500_pci_host_dev);
146} 103}
147/* must be arch_initcall; MIPS PCI scans busses in a subsys_initcall */ 104/* must be arch_initcall; MIPS PCI scans busses in a subsys_initcall */
148arch_initcall(db15x0_pci_init); 105arch_initcall(db1500_pci_init);
149#endif 106#endif
150 107
151#ifdef CONFIG_MIPS_DB1100 108#ifdef CONFIG_MIPS_DB1100
@@ -244,7 +201,7 @@ static int __init db1xxx_dev_init(void)
244 platform_device_register(&alchemy_ac97c_dev); 201 platform_device_register(&alchemy_ac97c_dev);
245 platform_device_register(&db1x00_audio_dev); 202 platform_device_register(&db1x00_audio_dev);
246 203
247 db1x_register_norflash(BOARD_FLASH_SIZE, 4 /* 32bit */, F_SWAPPED); 204 db1x_register_norflash(0x02000000, 4 /* 32bit */, F_SWAPPED);
248 return 0; 205 return 0;
249} 206}
250device_initcall(db1xxx_dev_init); 207device_initcall(db1xxx_dev_init);
diff --git a/arch/mips/configs/db1550_defconfig b/arch/mips/configs/db1550_defconfig
index 798a553c9e80..36cda27725e7 100644
--- a/arch/mips/configs/db1550_defconfig
+++ b/arch/mips/configs/db1550_defconfig
@@ -1,145 +1,262 @@
1CONFIG_MIPS=y
1CONFIG_MIPS_ALCHEMY=y 2CONFIG_MIPS_ALCHEMY=y
2CONFIG_MIPS_DB1550=y 3CONFIG_MIPS_DB1550=y
4CONFIG_SCHED_OMIT_FRAME_POINTER=y
5CONFIG_GENERIC_GPIO=y
6CONFIG_TICK_ONESHOT=y
3CONFIG_NO_HZ=y 7CONFIG_NO_HZ=y
4CONFIG_HIGH_RES_TIMERS=y 8CONFIG_HIGH_RES_TIMERS=y
5CONFIG_HZ_100=y 9CONFIG_HZ_100=y
6# CONFIG_SECCOMP is not set 10CONFIG_HZ=100
7CONFIG_EXPERIMENTAL=y 11CONFIG_EXPERIMENTAL=y
12CONFIG_BROKEN_ON_SMP=y
13CONFIG_INIT_ENV_ARG_LIMIT=32
8CONFIG_LOCALVERSION="-db1550" 14CONFIG_LOCALVERSION="-db1550"
15CONFIG_LOCALVERSION_AUTO=y
9CONFIG_KERNEL_LZMA=y 16CONFIG_KERNEL_LZMA=y
17CONFIG_DEFAULT_HOSTNAME="db1550"
18CONFIG_SWAP=y
10CONFIG_SYSVIPC=y 19CONFIG_SYSVIPC=y
20CONFIG_SYSVIPC_SYSCTL=y
11CONFIG_POSIX_MQUEUE=y 21CONFIG_POSIX_MQUEUE=y
22CONFIG_POSIX_MQUEUE_SYSCTL=y
23CONFIG_FHANDLE=y
24CONFIG_AUDIT=y
12CONFIG_TINY_RCU=y 25CONFIG_TINY_RCU=y
13CONFIG_LOG_BUF_SHIFT=14 26CONFIG_LOG_BUF_SHIFT=18
27CONFIG_NAMESPACES=y
28CONFIG_UTS_NS=y
29CONFIG_IPC_NS=y
30CONFIG_USER_NS=y
31CONFIG_PID_NS=y
32CONFIG_NET_NS=y
14CONFIG_EXPERT=y 33CONFIG_EXPERT=y
15# CONFIG_SYSCTL_SYSCALL is not set 34CONFIG_HOTPLUG=y
16# CONFIG_KALLSYMS is not set 35CONFIG_PRINTK=y
17# CONFIG_PCSPKR_PLATFORM is not set 36CONFIG_BUG=y
18# CONFIG_VM_EVENT_COUNTERS is not set 37CONFIG_ELF_CORE=y
19# CONFIG_COMPAT_BRK is not set 38CONFIG_BASE_FULL=y
39CONFIG_FUTEX=y
40CONFIG_EPOLL=y
41CONFIG_SIGNALFD=y
42CONFIG_TIMERFD=y
43CONFIG_EVENTFD=y
44CONFIG_SHMEM=y
45CONFIG_AIO=y
46CONFIG_EMBEDDED=y
47CONFIG_PCI_QUIRKS=y
20CONFIG_SLAB=y 48CONFIG_SLAB=y
21CONFIG_MODULES=y 49CONFIG_BLOCK=y
22CONFIG_MODULE_UNLOAD=y 50CONFIG_LBDAF=y
23# CONFIG_IOSCHED_DEADLINE is not set 51CONFIG_BLK_DEV_BSG=y
24# CONFIG_IOSCHED_CFQ is not set 52CONFIG_BLK_DEV_BSGLIB=y
53CONFIG_IOSCHED_NOOP=y
54CONFIG_DEFAULT_NOOP=y
55CONFIG_DEFAULT_IOSCHED="noop"
25CONFIG_PCI=y 56CONFIG_PCI=y
26CONFIG_PCCARD=y 57CONFIG_PCCARD=y
27# CONFIG_CARDBUS is not set 58CONFIG_PCMCIA=y
59CONFIG_PCMCIA_LOAD_CIS=y
28CONFIG_PCMCIA_ALCHEMY_DEVBOARD=y 60CONFIG_PCMCIA_ALCHEMY_DEVBOARD=y
29CONFIG_PM=y 61CONFIG_BINFMT_ELF=y
62CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
63CONFIG_BINFMT_MISC=y
64CONFIG_SUSPEND=y
65CONFIG_SUSPEND_FREEZER=y
66CONFIG_PM_SLEEP=y
30CONFIG_PM_RUNTIME=y 67CONFIG_PM_RUNTIME=y
68CONFIG_PM=y
31CONFIG_NET=y 69CONFIG_NET=y
32CONFIG_PACKET=y 70CONFIG_PACKET=y
33CONFIG_UNIX=y 71CONFIG_UNIX=y
72CONFIG_XFRM=y
34CONFIG_INET=y 73CONFIG_INET=y
35CONFIG_IP_MULTICAST=y 74CONFIG_IP_MULTICAST=y
36CONFIG_IP_PNP=y 75CONFIG_IP_PNP=y
37CONFIG_IP_PNP_DHCP=y 76CONFIG_IP_PNP_DHCP=y
38CONFIG_IP_PNP_BOOTP=y 77CONFIG_IP_PNP_BOOTP=y
39CONFIG_IP_PNP_RARP=y 78CONFIG_IP_PNP_RARP=y
40# CONFIG_INET_XFRM_MODE_TRANSPORT is not set 79CONFIG_INET_TUNNEL=y
41# CONFIG_INET_XFRM_MODE_TUNNEL is not set 80CONFIG_INET_LRO=y
42# CONFIG_INET_XFRM_MODE_BEET is not set 81CONFIG_TCP_CONG_CUBIC=y
43# CONFIG_INET_DIAG is not set 82CONFIG_DEFAULT_TCP_CONG="cubic"
44# CONFIG_IPV6 is not set 83CONFIG_IPV6=y
45# CONFIG_WIRELESS is not set 84CONFIG_INET6_XFRM_MODE_TRANSPORT=y
46CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 85CONFIG_INET6_XFRM_MODE_TUNNEL=y
86CONFIG_INET6_XFRM_MODE_BEET=y
87CONFIG_IPV6_SIT=y
88CONFIG_IPV6_NDISC_NODETYPE=y
89CONFIG_DNS_RESOLVER=y
90CONFIG_UEVENT_HELPER_PATH=""
91CONFIG_STANDALONE=y
92CONFIG_PREVENT_FIRMWARE_BUILD=y
93CONFIG_FW_LOADER=y
94CONFIG_FIRMWARE_IN_KERNEL=y
47CONFIG_MTD=y 95CONFIG_MTD=y
48CONFIG_MTD_PARTITIONS=y
49CONFIG_MTD_CHAR=y 96CONFIG_MTD_CHAR=y
97CONFIG_MTD_BLKDEVS=y
50CONFIG_MTD_BLOCK=y 98CONFIG_MTD_BLOCK=y
51CONFIG_MTD_CFI=y 99CONFIG_MTD_CFI=y
100CONFIG_MTD_GEN_PROBE=y
101CONFIG_MTD_MAP_BANK_WIDTH_1=y
102CONFIG_MTD_MAP_BANK_WIDTH_2=y
103CONFIG_MTD_MAP_BANK_WIDTH_4=y
104CONFIG_MTD_CFI_I1=y
105CONFIG_MTD_CFI_I2=y
52CONFIG_MTD_CFI_AMDSTD=y 106CONFIG_MTD_CFI_AMDSTD=y
107CONFIG_MTD_CFI_UTIL=y
53CONFIG_MTD_PHYSMAP=y 108CONFIG_MTD_PHYSMAP=y
109CONFIG_MTD_M25P80=y
110CONFIG_MTD_NAND_ECC=y
54CONFIG_MTD_NAND=y 111CONFIG_MTD_NAND=y
55CONFIG_MTD_NAND_AU1550=y 112CONFIG_MTD_NAND_IDS=y
56CONFIG_BLK_DEV_UB=y 113CONFIG_MTD_NAND_PLATFORM=y
57# CONFIG_MISC_DEVICES is not set 114CONFIG_MISC_DEVICES=y
58CONFIG_IDE=y 115CONFIG_EEPROM_AT24=y
59CONFIG_BLK_DEV_IDECS=y 116CONFIG_SCSI_MOD=y
60CONFIG_BLK_DEV_IDECD=y 117CONFIG_SCSI=y
61# CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS is not set 118CONFIG_SCSI_DMA=y
62CONFIG_IDE_TASK_IOCTL=y 119CONFIG_BLK_DEV_SD=y
63# CONFIG_IDEPCI_PCIBUS_ORDER is not set 120CONFIG_CHR_DEV_SG=y
64CONFIG_BLK_DEV_HPT366=y 121CONFIG_SCSI_MULTI_LUN=y
122CONFIG_SCSI_SCAN_ASYNC=y
123CONFIG_ATA=y
124CONFIG_ATA_SFF=y
125CONFIG_ATA_BMDMA=y
126CONFIG_PATA_HPT37X=y
127CONFIG_PATA_PCMCIA=y
128CONFIG_MD=y
129CONFIG_BLK_DEV_DM=y
65CONFIG_NETDEVICES=y 130CONFIG_NETDEVICES=y
66CONFIG_MARVELL_PHY=y
67CONFIG_DAVICOM_PHY=y
68CONFIG_QSEMI_PHY=y
69CONFIG_LXT_PHY=y
70CONFIG_CICADA_PHY=y
71CONFIG_VITESSE_PHY=y
72CONFIG_SMSC_PHY=y
73CONFIG_BROADCOM_PHY=y
74CONFIG_ICPLUS_PHY=y
75CONFIG_REALTEK_PHY=y
76CONFIG_NATIONAL_PHY=y
77CONFIG_STE10XP=y
78CONFIG_LSI_ET1011C_PHY=y
79CONFIG_NET_ETHERNET=y
80CONFIG_MII=y 131CONFIG_MII=y
132CONFIG_PHYLIB=y
133CONFIG_NET_ETHERNET=y
81CONFIG_MIPS_AU1X00_ENET=y 134CONFIG_MIPS_AU1X00_ENET=y
82# CONFIG_NETDEV_1000 is not set 135CONFIG_NET_PCMCIA=y
83# CONFIG_NETDEV_10000 is not set 136CONFIG_PCMCIA_3C589=y
84# CONFIG_WLAN is not set 137CONFIG_PCMCIA_PCNET=y
85# CONFIG_INPUT_MOUSEDEV is not set 138CONFIG_INPUT=y
86CONFIG_INPUT_EVDEV=y 139CONFIG_INPUT_EVDEV=y
87# CONFIG_INPUT_KEYBOARD is not set 140CONFIG_VT=y
88# CONFIG_INPUT_MOUSE is not set 141CONFIG_CONSOLE_TRANSLATIONS=y
89# CONFIG_SERIO is not set 142CONFIG_VT_CONSOLE=y
143CONFIG_HW_CONSOLE=y
144CONFIG_UNIX98_PTYS=y
145CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
146CONFIG_DEVKMEM=y
90CONFIG_SERIAL_8250=y 147CONFIG_SERIAL_8250=y
91CONFIG_SERIAL_8250_CONSOLE=y 148CONFIG_SERIAL_8250_CONSOLE=y
92# CONFIG_LEGACY_PTYS is not set 149CONFIG_SERIAL_8250_NR_UARTS=4
93# CONFIG_HW_RANDOM is not set 150CONFIG_SERIAL_8250_RUNTIME_UARTS=4
151CONFIG_SERIAL_CORE=y
152CONFIG_SERIAL_CORE_CONSOLE=y
153CONFIG_DEVPORT=y
94CONFIG_I2C=y 154CONFIG_I2C=y
95# CONFIG_I2C_COMPAT is not set 155CONFIG_I2C_BOARDINFO=y
96CONFIG_I2C_CHARDEV=y 156CONFIG_I2C_CHARDEV=y
97# CONFIG_I2C_HELPER_AUTO is not set
98CONFIG_I2C_AU1550=y 157CONFIG_I2C_AU1550=y
99CONFIG_SPI=y 158CONFIG_SPI=y
159CONFIG_SPI_MASTER=y
100CONFIG_SPI_AU1550=y 160CONFIG_SPI_AU1550=y
101# CONFIG_HWMON is not set 161CONFIG_SPI_BITBANG=y
102# CONFIG_VGA_ARB is not set 162CONFIG_HWMON=y
103# CONFIG_VGA_CONSOLE is not set 163CONFIG_SENSORS_ADM1025=y
164CONFIG_SENSORS_LM70=y
165CONFIG_DUMMY_CONSOLE=y
104CONFIG_SOUND=y 166CONFIG_SOUND=y
105CONFIG_SND=y 167CONFIG_SND=y
106CONFIG_SND_HRTIMER=y 168CONFIG_SND_TIMER=y
107CONFIG_SND_DYNAMIC_MINORS=y 169CONFIG_SND_PCM=y
108# CONFIG_SND_SUPPORT_OLD_API is not set 170CONFIG_SND_JACK=y
109# CONFIG_SND_VERBOSE_PROCFS is not set 171CONFIG_SND_VMASTER=y
110# CONFIG_SND_DRIVERS is not set 172CONFIG_SND_AC97_CODEC=y
111# CONFIG_SND_PCI is not set
112# CONFIG_SND_SPI is not set
113# CONFIG_SND_MIPS is not set
114# CONFIG_SND_PCMCIA is not set
115CONFIG_SND_SOC=y 173CONFIG_SND_SOC=y
174CONFIG_SND_SOC_AC97_BUS=y
116CONFIG_SND_SOC_AU1XPSC=y 175CONFIG_SND_SOC_AU1XPSC=y
117# CONFIG_HID_SUPPORT is not set 176CONFIG_SND_SOC_AU1XPSC_I2S=y
177CONFIG_SND_SOC_AU1XPSC_AC97=y
178CONFIG_SND_SOC_DB1200=y
179CONFIG_SND_SOC_I2C_AND_SPI=y
180CONFIG_SND_SOC_AC97_CODEC=y
181CONFIG_SND_SOC_WM8731=y
182CONFIG_SND_SOC_WM9712=y
183CONFIG_AC97_BUS=y
118CONFIG_USB=y 184CONFIG_USB=y
119# CONFIG_USB_DEVICE_CLASS is not set
120CONFIG_USB_DYNAMIC_MINORS=y 185CONFIG_USB_DYNAMIC_MINORS=y
121CONFIG_USB_SUSPEND=y
122CONFIG_USB_EHCI_HCD=y 186CONFIG_USB_EHCI_HCD=y
123CONFIG_USB_EHCI_ROOT_HUB_TT=y 187CONFIG_USB_EHCI_ROOT_HUB_TT=y
188CONFIG_USB_EHCI_TT_NEWSCHED=y
124CONFIG_USB_OHCI_HCD=y 189CONFIG_USB_OHCI_HCD=y
190CONFIG_USB_OHCI_LITTLE_ENDIAN=y
191CONFIG_USB_UHCI_HCD=y
192CONFIG_USB_STORAGE=y
193CONFIG_RTC_LIB=y
125CONFIG_RTC_CLASS=y 194CONFIG_RTC_CLASS=y
195CONFIG_RTC_HCTOSYS=y
196CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
197CONFIG_RTC_INTF_SYSFS=y
198CONFIG_RTC_INTF_PROC=y
199CONFIG_RTC_INTF_DEV=y
126CONFIG_RTC_DRV_AU1XXX=y 200CONFIG_RTC_DRV_AU1XXX=y
127CONFIG_EXT2_FS=y 201CONFIG_EXT4_FS=y
128# CONFIG_PROC_PAGE_MONITOR is not set 202CONFIG_EXT4_USE_FOR_EXT23=y
203CONFIG_EXT4_FS_XATTR=y
204CONFIG_EXT4_FS_POSIX_ACL=y
205CONFIG_EXT4_FS_SECURITY=y
206CONFIG_JBD2=y
207CONFIG_FS_MBCACHE=y
208CONFIG_FS_POSIX_ACL=y
209CONFIG_EXPORTFS=y
210CONFIG_FILE_LOCKING=y
211CONFIG_FSNOTIFY=y
212CONFIG_DNOTIFY=y
213CONFIG_INOTIFY_USER=y
214CONFIG_PROC_FS=y
215CONFIG_PROC_SYSCTL=y
216CONFIG_SYSFS=y
129CONFIG_TMPFS=y 217CONFIG_TMPFS=y
130CONFIG_CONFIGFS_FS=y 218CONFIG_CONFIGFS_FS=y
219CONFIG_MISC_FILESYSTEMS=y
131CONFIG_JFFS2_FS=y 220CONFIG_JFFS2_FS=y
221CONFIG_JFFS2_FS_DEBUG=0
222CONFIG_JFFS2_FS_WRITEBUFFER=y
132CONFIG_JFFS2_SUMMARY=y 223CONFIG_JFFS2_SUMMARY=y
133CONFIG_JFFS2_FS_XATTR=y 224CONFIG_JFFS2_FS_XATTR=y
134# CONFIG_JFFS2_FS_POSIX_ACL is not set
135# CONFIG_JFFS2_FS_SECURITY is not set
136CONFIG_JFFS2_COMPRESSION_OPTIONS=y 225CONFIG_JFFS2_COMPRESSION_OPTIONS=y
226CONFIG_JFFS2_ZLIB=y
137CONFIG_JFFS2_LZO=y 227CONFIG_JFFS2_LZO=y
228CONFIG_JFFS2_RTIME=y
138CONFIG_JFFS2_RUBIN=y 229CONFIG_JFFS2_RUBIN=y
230CONFIG_JFFS2_CMODE_PRIORITY=y
139CONFIG_SQUASHFS=y 231CONFIG_SQUASHFS=y
232CONFIG_SQUASHFS_ZLIB=y
233CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
234CONFIG_NETWORK_FILESYSTEMS=y
140CONFIG_NFS_FS=y 235CONFIG_NFS_FS=y
141CONFIG_NFS_V3=y 236CONFIG_NFS_V3=y
237CONFIG_NFS_V3_ACL=y
238CONFIG_NFS_V4=y
239CONFIG_NFS_V4_1=y
240CONFIG_PNFS_FILE_LAYOUT=y
241CONFIG_PNFS_BLOCK=y
142CONFIG_ROOT_NFS=y 242CONFIG_ROOT_NFS=y
243CONFIG_NFS_USE_KERNEL_DNS=y
244CONFIG_NFS_USE_NEW_IDMAPPER=y
245CONFIG_NFSD=y
246CONFIG_NFSD_V2_ACL=y
247CONFIG_NFSD_V3=y
248CONFIG_NFSD_V3_ACL=y
249CONFIG_NFSD_V4=y
250CONFIG_LOCKD=y
251CONFIG_LOCKD_V4=y
252CONFIG_NFS_ACL_SUPPORT=y
253CONFIG_NFS_COMMON=y
254CONFIG_SUNRPC=y
255CONFIG_SUNRPC_GSS=y
256CONFIG_SUNRPC_BACKCHANNEL=y
257CONFIG_MSDOS_PARTITION=y
258CONFIG_NLS=y
259CONFIG_NLS_DEFAULT="iso8859-1"
143CONFIG_NLS_CODEPAGE_437=y 260CONFIG_NLS_CODEPAGE_437=y
144CONFIG_NLS_CODEPAGE_850=y 261CONFIG_NLS_CODEPAGE_850=y
145CONFIG_NLS_CODEPAGE_852=y 262CONFIG_NLS_CODEPAGE_852=y
@@ -148,10 +265,21 @@ CONFIG_NLS_ASCII=y
148CONFIG_NLS_ISO8859_1=y 265CONFIG_NLS_ISO8859_1=y
149CONFIG_NLS_ISO8859_15=y 266CONFIG_NLS_ISO8859_15=y
150CONFIG_NLS_UTF8=y 267CONFIG_NLS_UTF8=y
151CONFIG_DEBUG_KERNEL=y 268CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
152# CONFIG_SCHED_DEBUG is not set 269CONFIG_FRAME_WARN=1024
153# CONFIG_FTRACE is not set 270CONFIG_CMDLINE_BOOL=y
154CONFIG_DEBUG_ZBOOT=y 271CONFIG_CMDLINE="noirqdebug console=ttyS0,115200 root=/dev/sda1 rootfstype=ext4"
155CONFIG_KEYS=y 272CONFIG_KEYS=y
156CONFIG_KEYS_DEBUG_PROC_KEYS=y
157CONFIG_SECURITYFS=y 273CONFIG_SECURITYFS=y
274CONFIG_DEFAULT_SECURITY_DAC=y
275CONFIG_BITREVERSE=y
276CONFIG_CRC16=y
277CONFIG_CRC_ITU_T=y
278CONFIG_CRC32=y
279CONFIG_AUDIT_GENERIC=y
280CONFIG_ZLIB_INFLATE=y
281CONFIG_ZLIB_DEFLATE=y
282CONFIG_LZO_COMPRESS=y
283CONFIG_LZO_DECOMPRESS=y
284CONFIG_BCH=y
285CONFIG_NLATTR=y
diff --git a/arch/mips/include/asm/mach-db1x00/bcsr.h b/arch/mips/include/asm/mach-db1x00/bcsr.h
index 0ef630071304..bb9fc23d853a 100644
--- a/arch/mips/include/asm/mach-db1x00/bcsr.h
+++ b/arch/mips/include/asm/mach-db1x00/bcsr.h
@@ -163,7 +163,7 @@ enum bcsr_whoami_boards {
163#define BCSR_BOARD_GPIO200RST 0x0400 163#define BCSR_BOARD_GPIO200RST 0x0400
164#define BCSR_BOARD_PCICLKOUT 0x0800 164#define BCSR_BOARD_PCICLKOUT 0x0800
165#define BCSR_BOARD_PCICFG 0x1000 165#define BCSR_BOARD_PCICFG 0x1000
166#define BCSR_BOARD_SPISEL 0x4000 /* PB/DB1550 */ 166#define BCSR_BOARD_SPISEL 0x2000 /* PB/DB1550 */
167#define BCSR_BOARD_SD0WP 0x4000 /* DB1100 */ 167#define BCSR_BOARD_SD0WP 0x4000 /* DB1100 */
168#define BCSR_BOARD_SD1WP 0x8000 /* DB1100 */ 168#define BCSR_BOARD_SD1WP 0x8000 /* DB1100 */
169 169
diff --git a/arch/mips/include/asm/mach-db1x00/db1x00.h b/arch/mips/include/asm/mach-db1x00/db1x00.h
index a5affb0568ef..51f1ebf0df9a 100644
--- a/arch/mips/include/asm/mach-db1x00/db1x00.h
+++ b/arch/mips/include/asm/mach-db1x00/db1x00.h
@@ -29,22 +29,6 @@
29 29
30#include <asm/mach-au1x00/au1xxx_psc.h> 30#include <asm/mach-au1x00/au1xxx_psc.h>
31 31
32#ifdef CONFIG_MIPS_DB1550
33
34#define DBDMA_AC97_TX_CHAN AU1550_DSCR_CMD0_PSC1_TX
35#define DBDMA_AC97_RX_CHAN AU1550_DSCR_CMD0_PSC1_RX
36#define DBDMA_I2S_TX_CHAN AU1550_DSCR_CMD0_PSC3_TX
37#define DBDMA_I2S_RX_CHAN AU1550_DSCR_CMD0_PSC3_RX
38
39#define SPI_PSC_BASE AU1550_PSC0_PHYS_ADDR
40#define AC97_PSC_BASE AU1550_PSC1_PHYS_ADDR
41#define SMBUS_PSC_BASE AU1550_PSC2_PHYS_ADDR
42#define I2S_PSC_BASE AU1550_PSC3_PHYS_ADDR
43
44#define NAND_PHYS_ADDR 0x20000000
45
46#endif
47
48/* 32/*
49 * NAND defines 33 * NAND defines
50 * 34 *
diff --git a/sound/soc/au1x/Kconfig b/sound/soc/au1x/Kconfig
index 78b664921cb3..a56104040e83 100644
--- a/sound/soc/au1x/Kconfig
+++ b/sound/soc/au1x/Kconfig
@@ -51,7 +51,7 @@ config SND_SOC_DB1000
51 of boards (DB1000/DB1500/DB1100). 51 of boards (DB1000/DB1500/DB1100).
52 52
53config SND_SOC_DB1200 53config SND_SOC_DB1200
54 tristate "DB1200/DB1300 Audio support" 54 tristate "DB1200/DB1300/DB1550 Audio support"
55 depends on SND_SOC_AU1XPSC 55 depends on SND_SOC_AU1XPSC
56 select SND_SOC_AU1XPSC_AC97 56 select SND_SOC_AU1XPSC_AC97
57 select SND_SOC_AC97_CODEC 57 select SND_SOC_AC97_CODEC
@@ -60,5 +60,5 @@ config SND_SOC_DB1200
60 select SND_SOC_WM8731 60 select SND_SOC_WM8731
61 help 61 help
62 Select this option to enable audio (AC97 and I2S) on the 62 Select this option to enable audio (AC97 and I2S) on the
63 Alchemy/AMD/RMI/NetLogic Db1200 and Db1300 evaluation boards. 63 Alchemy/AMD/RMI/NetLogic Db1200, Db1550 and Db1300 evaluation boards.
64 If you need Db1300 touchscreen support, you definitely want to say Y. 64 If you need Db1300 touchscreen support, you definitely want to say Y.
diff --git a/sound/soc/au1x/db1200.c b/sound/soc/au1x/db1200.c
index ca2335afe6b6..44ad11827364 100644
--- a/sound/soc/au1x/db1200.c
+++ b/sound/soc/au1x/db1200.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * DB1200/DB1300 ASoC audio fabric support code. 2 * DB1200/DB1300/DB1550 ASoC audio fabric support code.
3 * 3 *
4 * (c) 2008-2011 Manuel Lauss <manuel.lauss@googlemail.com> 4 * (c) 2008-2011 Manuel Lauss <manuel.lauss@googlemail.com>
5 * 5 *
@@ -34,6 +34,12 @@ static struct platform_device_id db1200_pids[] = {
34 }, { 34 }, {
35 .name = "db1300-i2s", 35 .name = "db1300-i2s",
36 .driver_data = 3, 36 .driver_data = 3,
37 }, {
38 .name = "db1550-ac97",
39 .driver_data = 4,
40 }, {
41 .name = "db1550-i2s",
42 .driver_data = 5,
37 }, 43 },
38 {}, 44 {},
39}; 45};
@@ -70,6 +76,12 @@ static struct snd_soc_card db1300_ac97_machine = {
70 .num_links = 1, 76 .num_links = 1,
71}; 77};
72 78
79static struct snd_soc_card db1550_ac97_machine = {
80 .name = "DB1550_AC97",
81 .dai_link = &db1200_ac97_dai,
82 .num_links = 1,
83};
84
73/*------------------------- I2S PART ---------------------------*/ 85/*------------------------- I2S PART ---------------------------*/
74 86
75static int db1200_i2s_startup(struct snd_pcm_substream *substream) 87static int db1200_i2s_startup(struct snd_pcm_substream *substream)
@@ -135,6 +147,22 @@ static struct snd_soc_card db1300_i2s_machine = {
135 .num_links = 1, 147 .num_links = 1,
136}; 148};
137 149
150static struct snd_soc_dai_link db1550_i2s_dai = {
151 .name = "WM8731",
152 .stream_name = "WM8731 PCM",
153 .codec_dai_name = "wm8731-hifi",
154 .cpu_dai_name = "au1xpsc_i2s.3",
155 .platform_name = "au1xpsc-pcm.3",
156 .codec_name = "wm8731.0-001b",
157 .ops = &db1200_i2s_wm8731_ops,
158};
159
160static struct snd_soc_card db1550_i2s_machine = {
161 .name = "DB1550_I2S",
162 .dai_link = &db1550_i2s_dai,
163 .num_links = 1,
164};
165
138/*------------------------- COMMON PART ---------------------------*/ 166/*------------------------- COMMON PART ---------------------------*/
139 167
140static struct snd_soc_card *db1200_cards[] __devinitdata = { 168static struct snd_soc_card *db1200_cards[] __devinitdata = {
@@ -142,6 +170,8 @@ static struct snd_soc_card *db1200_cards[] __devinitdata = {
142 &db1200_i2s_machine, 170 &db1200_i2s_machine,
143 &db1300_ac97_machine, 171 &db1300_ac97_machine,
144 &db1300_i2s_machine, 172 &db1300_i2s_machine,
173 &db1550_ac97_machine,
174 &db1550_i2s_machine,
145}; 175};
146 176
147static int __devinit db1200_audio_probe(struct platform_device *pdev) 177static int __devinit db1200_audio_probe(struct platform_device *pdev)
@@ -186,5 +216,5 @@ module_init(db1200_audio_load);
186module_exit(db1200_audio_unload); 216module_exit(db1200_audio_unload);
187 217
188MODULE_LICENSE("GPL"); 218MODULE_LICENSE("GPL");
189MODULE_DESCRIPTION("DB1200/DB1300 ASoC audio support"); 219MODULE_DESCRIPTION("DB1200/DB1300/DB1550 ASoC audio support");
190MODULE_AUTHOR("Manuel Lauss"); 220MODULE_AUTHOR("Manuel Lauss");
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-11 04:29:44 -0400