diff options
-rw-r--r-- | drivers/dma/ioat/dma.c | 10 | ||||
-rw-r--r-- | drivers/dma/ioat/dma_v2.c | 8 | ||||
-rw-r--r-- | drivers/dma/ioat/registers.h | 6 |
3 files changed, 10 insertions, 14 deletions
diff --git a/drivers/dma/ioat/dma.c b/drivers/dma/ioat/dma.c index 5173ba97ba31..6dd0af194b8a 100644 --- a/drivers/dma/ioat/dma.c +++ b/drivers/dma/ioat/dma.c | |||
@@ -452,7 +452,6 @@ static int ioat1_dma_alloc_chan_resources(struct dma_chan *c) | |||
452 | struct ioat_dma_chan *ioat = to_ioat_chan(c); | 452 | struct ioat_dma_chan *ioat = to_ioat_chan(c); |
453 | struct ioat_chan_common *chan = &ioat->base; | 453 | struct ioat_chan_common *chan = &ioat->base; |
454 | struct ioat_desc_sw *desc; | 454 | struct ioat_desc_sw *desc; |
455 | u16 chanctrl; | ||
456 | u32 chanerr; | 455 | u32 chanerr; |
457 | int i; | 456 | int i; |
458 | LIST_HEAD(tmp_list); | 457 | LIST_HEAD(tmp_list); |
@@ -462,10 +461,7 @@ static int ioat1_dma_alloc_chan_resources(struct dma_chan *c) | |||
462 | return ioat->desccount; | 461 | return ioat->desccount; |
463 | 462 | ||
464 | /* Setup register to interrupt and write completion status on error */ | 463 | /* Setup register to interrupt and write completion status on error */ |
465 | chanctrl = IOAT_CHANCTRL_ERR_INT_EN | | 464 | writew(IOAT_CHANCTRL_RUN, chan->reg_base + IOAT_CHANCTRL_OFFSET); |
466 | IOAT_CHANCTRL_ANY_ERR_ABORT_EN | | ||
467 | IOAT_CHANCTRL_ERR_COMPLETION_EN; | ||
468 | writew(chanctrl, chan->reg_base + IOAT_CHANCTRL_OFFSET); | ||
469 | 465 | ||
470 | chanerr = readl(chan->reg_base + IOAT_CHANERR_OFFSET); | 466 | chanerr = readl(chan->reg_base + IOAT_CHANERR_OFFSET); |
471 | if (chanerr) { | 467 | if (chanerr) { |
@@ -672,9 +668,9 @@ ioat1_dma_prep_memcpy(struct dma_chan *c, dma_addr_t dma_dest, | |||
672 | static void ioat1_cleanup_tasklet(unsigned long data) | 668 | static void ioat1_cleanup_tasklet(unsigned long data) |
673 | { | 669 | { |
674 | struct ioat_dma_chan *chan = (void *)data; | 670 | struct ioat_dma_chan *chan = (void *)data; |
671 | |||
675 | ioat1_cleanup(chan); | 672 | ioat1_cleanup(chan); |
676 | writew(IOAT_CHANCTRL_INT_DISABLE, | 673 | writew(IOAT_CHANCTRL_RUN, chan->base.reg_base + IOAT_CHANCTRL_OFFSET); |
677 | chan->base.reg_base + IOAT_CHANCTRL_OFFSET); | ||
678 | } | 674 | } |
679 | 675 | ||
680 | static void ioat_unmap(struct pci_dev *pdev, dma_addr_t addr, size_t len, | 676 | static void ioat_unmap(struct pci_dev *pdev, dma_addr_t addr, size_t len, |
diff --git a/drivers/dma/ioat/dma_v2.c b/drivers/dma/ioat/dma_v2.c index 137cf879265f..2f34f290041e 100644 --- a/drivers/dma/ioat/dma_v2.c +++ b/drivers/dma/ioat/dma_v2.c | |||
@@ -341,8 +341,7 @@ static void ioat2_cleanup_tasklet(unsigned long data) | |||
341 | struct ioat2_dma_chan *ioat = (void *) data; | 341 | struct ioat2_dma_chan *ioat = (void *) data; |
342 | 342 | ||
343 | ioat2_cleanup(ioat); | 343 | ioat2_cleanup(ioat); |
344 | writew(IOAT_CHANCTRL_INT_DISABLE, | 344 | writew(IOAT_CHANCTRL_RUN, ioat->base.reg_base + IOAT_CHANCTRL_OFFSET); |
345 | ioat->base.reg_base + IOAT_CHANCTRL_OFFSET); | ||
346 | } | 345 | } |
347 | 346 | ||
348 | /** | 347 | /** |
@@ -454,7 +453,6 @@ static int ioat2_alloc_chan_resources(struct dma_chan *c) | |||
454 | struct ioat2_dma_chan *ioat = to_ioat2_chan(c); | 453 | struct ioat2_dma_chan *ioat = to_ioat2_chan(c); |
455 | struct ioat_chan_common *chan = &ioat->base; | 454 | struct ioat_chan_common *chan = &ioat->base; |
456 | struct ioat_ring_ent **ring; | 455 | struct ioat_ring_ent **ring; |
457 | u16 chanctrl; | ||
458 | u32 chanerr; | 456 | u32 chanerr; |
459 | int descs; | 457 | int descs; |
460 | int i; | 458 | int i; |
@@ -464,9 +462,7 @@ static int ioat2_alloc_chan_resources(struct dma_chan *c) | |||
464 | return 1 << ioat->alloc_order; | 462 | return 1 << ioat->alloc_order; |
465 | 463 | ||
466 | /* Setup register to interrupt and write completion status on error */ | 464 | /* Setup register to interrupt and write completion status on error */ |
467 | chanctrl = IOAT_CHANCTRL_ERR_INT_EN | IOAT_CHANCTRL_ANY_ERR_ABORT_EN | | 465 | writew(IOAT_CHANCTRL_RUN, chan->reg_base + IOAT_CHANCTRL_OFFSET); |
468 | IOAT_CHANCTRL_ERR_COMPLETION_EN; | ||
469 | writew(chanctrl, chan->reg_base + IOAT_CHANCTRL_OFFSET); | ||
470 | 466 | ||
471 | chanerr = readl(chan->reg_base + IOAT_CHANERR_OFFSET); | 467 | chanerr = readl(chan->reg_base + IOAT_CHANERR_OFFSET); |
472 | if (chanerr) { | 468 | if (chanerr) { |
diff --git a/drivers/dma/ioat/registers.h b/drivers/dma/ioat/registers.h index a83c7332125c..4380f6fbf056 100644 --- a/drivers/dma/ioat/registers.h +++ b/drivers/dma/ioat/registers.h | |||
@@ -75,7 +75,11 @@ | |||
75 | #define IOAT_CHANCTRL_ERR_INT_EN 0x0010 | 75 | #define IOAT_CHANCTRL_ERR_INT_EN 0x0010 |
76 | #define IOAT_CHANCTRL_ANY_ERR_ABORT_EN 0x0008 | 76 | #define IOAT_CHANCTRL_ANY_ERR_ABORT_EN 0x0008 |
77 | #define IOAT_CHANCTRL_ERR_COMPLETION_EN 0x0004 | 77 | #define IOAT_CHANCTRL_ERR_COMPLETION_EN 0x0004 |
78 | #define IOAT_CHANCTRL_INT_DISABLE 0x0001 | 78 | #define IOAT_CHANCTRL_INT_REARM 0x0001 |
79 | #define IOAT_CHANCTRL_RUN (IOAT_CHANCTRL_INT_REARM |\ | ||
80 | IOAT_CHANCTRL_ERR_COMPLETION_EN |\ | ||
81 | IOAT_CHANCTRL_ANY_ERR_ABORT_EN |\ | ||
82 | IOAT_CHANCTRL_ERR_INT_EN) | ||
79 | 83 | ||
80 | #define IOAT_DMA_COMP_OFFSET 0x02 /* 16-bit DMA channel compatibility */ | 84 | #define IOAT_DMA_COMP_OFFSET 0x02 /* 16-bit DMA channel compatibility */ |
81 | #define IOAT_DMA_COMP_V1 0x0001 /* Compatibility with DMA version 1 */ | 85 | #define IOAT_DMA_COMP_V1 0x0001 /* Compatibility with DMA version 1 */ |