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-rw-r--r--drivers/pinctrl/pinctrl-exynos.c108
-rw-r--r--drivers/pinctrl/pinctrl-samsung.c2
-rw-r--r--drivers/pinctrl/pinctrl-samsung.h1
3 files changed, 111 insertions, 0 deletions
diff --git a/drivers/pinctrl/pinctrl-exynos.c b/drivers/pinctrl/pinctrl-exynos.c
index 538b9ddaadf7..8738933a57d7 100644
--- a/drivers/pinctrl/pinctrl-exynos.c
+++ b/drivers/pinctrl/pinctrl-exynos.c
@@ -677,3 +677,111 @@ struct samsung_pin_ctrl exynos4x12_pin_ctrl[] = {
677 .label = "exynos4x12-gpio-ctrl3", 677 .label = "exynos4x12-gpio-ctrl3",
678 }, 678 },
679}; 679};
680
681/* pin banks of exynos5250 pin-controller 0 */
682static struct samsung_pin_bank exynos5250_pin_banks0[] = {
683 EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
684 EXYNOS_PIN_BANK_EINTG(6, 0x020, "gpa1", 0x04),
685 EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpa2", 0x08),
686 EXYNOS_PIN_BANK_EINTG(5, 0x060, "gpb0", 0x0c),
687 EXYNOS_PIN_BANK_EINTG(5, 0x080, "gpb1", 0x10),
688 EXYNOS_PIN_BANK_EINTG(4, 0x0A0, "gpb2", 0x14),
689 EXYNOS_PIN_BANK_EINTG(4, 0x0C0, "gpb3", 0x18),
690 EXYNOS_PIN_BANK_EINTG(7, 0x0E0, "gpc0", 0x1c),
691 EXYNOS_PIN_BANK_EINTG(4, 0x100, "gpc1", 0x20),
692 EXYNOS_PIN_BANK_EINTG(7, 0x120, "gpc2", 0x24),
693 EXYNOS_PIN_BANK_EINTG(7, 0x140, "gpc3", 0x28),
694 EXYNOS_PIN_BANK_EINTG(4, 0x160, "gpd0", 0x2c),
695 EXYNOS_PIN_BANK_EINTG(8, 0x180, "gpd1", 0x30),
696 EXYNOS_PIN_BANK_EINTG(7, 0x2E0, "gpc4", 0x34),
697 EXYNOS_PIN_BANK_EINTN(6, 0x1A0, "gpy0"),
698 EXYNOS_PIN_BANK_EINTN(4, 0x1C0, "gpy1"),
699 EXYNOS_PIN_BANK_EINTN(6, 0x1E0, "gpy2"),
700 EXYNOS_PIN_BANK_EINTN(8, 0x200, "gpy3"),
701 EXYNOS_PIN_BANK_EINTN(8, 0x220, "gpy4"),
702 EXYNOS_PIN_BANK_EINTN(8, 0x240, "gpy5"),
703 EXYNOS_PIN_BANK_EINTN(8, 0x260, "gpy6"),
704 EXYNOS_PIN_BANK_EINTW(8, 0xC00, "gpx0", 0x00),
705 EXYNOS_PIN_BANK_EINTW(8, 0xC20, "gpx1", 0x04),
706 EXYNOS_PIN_BANK_EINTW(8, 0xC40, "gpx2", 0x08),
707 EXYNOS_PIN_BANK_EINTW(8, 0xC60, "gpx3", 0x0c),
708};
709
710/* pin banks of exynos5250 pin-controller 1 */
711static struct samsung_pin_bank exynos5250_pin_banks1[] = {
712 EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpe0", 0x00),
713 EXYNOS_PIN_BANK_EINTG(2, 0x020, "gpe1", 0x04),
714 EXYNOS_PIN_BANK_EINTG(4, 0x040, "gpf0", 0x08),
715 EXYNOS_PIN_BANK_EINTG(4, 0x060, "gpf1", 0x0c),
716 EXYNOS_PIN_BANK_EINTG(8, 0x080, "gpg0", 0x10),
717 EXYNOS_PIN_BANK_EINTG(8, 0x0A0, "gpg1", 0x14),
718 EXYNOS_PIN_BANK_EINTG(2, 0x0C0, "gpg2", 0x18),
719 EXYNOS_PIN_BANK_EINTG(4, 0x0E0, "gph0", 0x1c),
720 EXYNOS_PIN_BANK_EINTG(8, 0x100, "gph1", 0x20),
721};
722
723/* pin banks of exynos5250 pin-controller 2 */
724static struct samsung_pin_bank exynos5250_pin_banks2[] = {
725 EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpv0", 0x00),
726 EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpv1", 0x04),
727 EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpv2", 0x08),
728 EXYNOS_PIN_BANK_EINTG(8, 0x080, "gpv3", 0x0c),
729 EXYNOS_PIN_BANK_EINTG(2, 0x0C0, "gpv4", 0x10),
730};
731
732/* pin banks of exynos5250 pin-controller 3 */
733static struct samsung_pin_bank exynos5250_pin_banks3[] = {
734 EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpz", 0x00),
735};
736
737/*
738 * Samsung pinctrl driver data for Exynos5250 SoC. Exynos5250 SoC includes
739 * four gpio/pin-mux/pinconfig controllers.
740 */
741struct samsung_pin_ctrl exynos5250_pin_ctrl[] = {
742 {
743 /* pin-controller instance 0 data */
744 .pin_banks = exynos5250_pin_banks0,
745 .nr_banks = ARRAY_SIZE(exynos5250_pin_banks0),
746 .geint_con = EXYNOS_GPIO_ECON_OFFSET,
747 .geint_mask = EXYNOS_GPIO_EMASK_OFFSET,
748 .geint_pend = EXYNOS_GPIO_EPEND_OFFSET,
749 .weint_con = EXYNOS_WKUP_ECON_OFFSET,
750 .weint_mask = EXYNOS_WKUP_EMASK_OFFSET,
751 .weint_pend = EXYNOS_WKUP_EPEND_OFFSET,
752 .svc = EXYNOS_SVC_OFFSET,
753 .eint_gpio_init = exynos_eint_gpio_init,
754 .eint_wkup_init = exynos_eint_wkup_init,
755 .label = "exynos5250-gpio-ctrl0",
756 }, {
757 /* pin-controller instance 1 data */
758 .pin_banks = exynos5250_pin_banks1,
759 .nr_banks = ARRAY_SIZE(exynos5250_pin_banks1),
760 .geint_con = EXYNOS_GPIO_ECON_OFFSET,
761 .geint_mask = EXYNOS_GPIO_EMASK_OFFSET,
762 .geint_pend = EXYNOS_GPIO_EPEND_OFFSET,
763 .svc = EXYNOS_SVC_OFFSET,
764 .eint_gpio_init = exynos_eint_gpio_init,
765 .label = "exynos5250-gpio-ctrl1",
766 }, {
767 /* pin-controller instance 2 data */
768 .pin_banks = exynos5250_pin_banks2,
769 .nr_banks = ARRAY_SIZE(exynos5250_pin_banks2),
770 .geint_con = EXYNOS_GPIO_ECON_OFFSET,
771 .geint_mask = EXYNOS_GPIO_EMASK_OFFSET,
772 .geint_pend = EXYNOS_GPIO_EPEND_OFFSET,
773 .svc = EXYNOS_SVC_OFFSET,
774 .eint_gpio_init = exynos_eint_gpio_init,
775 .label = "exynos5250-gpio-ctrl2",
776 }, {
777 /* pin-controller instance 3 data */
778 .pin_banks = exynos5250_pin_banks3,
779 .nr_banks = ARRAY_SIZE(exynos5250_pin_banks3),
780 .geint_con = EXYNOS_GPIO_ECON_OFFSET,
781 .geint_mask = EXYNOS_GPIO_EMASK_OFFSET,
782 .geint_pend = EXYNOS_GPIO_EPEND_OFFSET,
783 .svc = EXYNOS_SVC_OFFSET,
784 .eint_gpio_init = exynos_eint_gpio_init,
785 .label = "exynos5250-gpio-ctrl3",
786 },
787};
diff --git a/drivers/pinctrl/pinctrl-samsung.c b/drivers/pinctrl/pinctrl-samsung.c
index f206df175656..3d5cf639aa46 100644
--- a/drivers/pinctrl/pinctrl-samsung.c
+++ b/drivers/pinctrl/pinctrl-samsung.c
@@ -948,6 +948,8 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = {
948 .data = (void *)exynos4210_pin_ctrl }, 948 .data = (void *)exynos4210_pin_ctrl },
949 { .compatible = "samsung,exynos4x12-pinctrl", 949 { .compatible = "samsung,exynos4x12-pinctrl",
950 .data = (void *)exynos4x12_pin_ctrl }, 950 .data = (void *)exynos4x12_pin_ctrl },
951 { .compatible = "samsung,exynos5250-pinctrl",
952 .data = (void *)exynos5250_pin_ctrl },
951 {}, 953 {},
952}; 954};
953MODULE_DEVICE_TABLE(of, samsung_pinctrl_dt_match); 955MODULE_DEVICE_TABLE(of, samsung_pinctrl_dt_match);
diff --git a/drivers/pinctrl/pinctrl-samsung.h b/drivers/pinctrl/pinctrl-samsung.h
index e2d4e67f7e88..ee964aadce0c 100644
--- a/drivers/pinctrl/pinctrl-samsung.h
+++ b/drivers/pinctrl/pinctrl-samsung.h
@@ -237,5 +237,6 @@ struct samsung_pmx_func {
237/* list of all exported SoC specific data */ 237/* list of all exported SoC specific data */
238extern struct samsung_pin_ctrl exynos4210_pin_ctrl[]; 238extern struct samsung_pin_ctrl exynos4210_pin_ctrl[];
239extern struct samsung_pin_ctrl exynos4x12_pin_ctrl[]; 239extern struct samsung_pin_ctrl exynos4x12_pin_ctrl[];
240extern struct samsung_pin_ctrl exynos5250_pin_ctrl[];
240 241
241#endif /* __PINCTRL_SAMSUNG_H */ 242#endif /* __PINCTRL_SAMSUNG_H */
generated by cgit v1.2.2 (git 2.25.0) at 2025-06-18 16:55:31 -0400