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-rw-r--r--drivers/gpu/drm/nouveau/core/core/event.c4
-rw-r--r--drivers/gpu/drm/nouveau/core/core/notify.c2
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/device/nve0.c33
-rw-r--r--drivers/gpu/drm/nouveau/core/subdev/bios/shadowramin.c6
-rw-r--r--drivers/gpu/drm/nouveau/core/subdev/fb/ramnvaa.c65
-rw-r--r--drivers/gpu/drm/nouveau/core/subdev/mc/nv4c.c8
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_bo.c4
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_gem.c35
8 files changed, 124 insertions, 33 deletions
diff --git a/drivers/gpu/drm/nouveau/core/core/event.c b/drivers/gpu/drm/nouveau/core/core/event.c
index ff2b434b3db4..760947e380c9 100644
--- a/drivers/gpu/drm/nouveau/core/core/event.c
+++ b/drivers/gpu/drm/nouveau/core/core/event.c
@@ -26,7 +26,7 @@
26void 26void
27nvkm_event_put(struct nvkm_event *event, u32 types, int index) 27nvkm_event_put(struct nvkm_event *event, u32 types, int index)
28{ 28{
29 BUG_ON(!spin_is_locked(&event->refs_lock)); 29 assert_spin_locked(&event->refs_lock);
30 while (types) { 30 while (types) {
31 int type = __ffs(types); types &= ~(1 << type); 31 int type = __ffs(types); types &= ~(1 << type);
32 if (--event->refs[index * event->types_nr + type] == 0) { 32 if (--event->refs[index * event->types_nr + type] == 0) {
@@ -39,7 +39,7 @@ nvkm_event_put(struct nvkm_event *event, u32 types, int index)
39void 39void
40nvkm_event_get(struct nvkm_event *event, u32 types, int index) 40nvkm_event_get(struct nvkm_event *event, u32 types, int index)
41{ 41{
42 BUG_ON(!spin_is_locked(&event->refs_lock)); 42 assert_spin_locked(&event->refs_lock);
43 while (types) { 43 while (types) {
44 int type = __ffs(types); types &= ~(1 << type); 44 int type = __ffs(types); types &= ~(1 << type);
45 if (++event->refs[index * event->types_nr + type] == 1) { 45 if (++event->refs[index * event->types_nr + type] == 1) {
diff --git a/drivers/gpu/drm/nouveau/core/core/notify.c b/drivers/gpu/drm/nouveau/core/core/notify.c
index d1bcde55e9d7..839a32577680 100644
--- a/drivers/gpu/drm/nouveau/core/core/notify.c
+++ b/drivers/gpu/drm/nouveau/core/core/notify.c
@@ -98,7 +98,7 @@ nvkm_notify_send(struct nvkm_notify *notify, void *data, u32 size)
98 struct nvkm_event *event = notify->event; 98 struct nvkm_event *event = notify->event;
99 unsigned long flags; 99 unsigned long flags;
100 100
101 BUG_ON(!spin_is_locked(&event->list_lock)); 101 assert_spin_locked(&event->list_lock);
102 BUG_ON(size != notify->size); 102 BUG_ON(size != notify->size);
103 103
104 spin_lock_irqsave(&event->refs_lock, flags); 104 spin_lock_irqsave(&event->refs_lock, flags);
diff --git a/drivers/gpu/drm/nouveau/core/engine/device/nve0.c b/drivers/gpu/drm/nouveau/core/engine/device/nve0.c
index 674da1f095b2..732922690653 100644
--- a/drivers/gpu/drm/nouveau/core/engine/device/nve0.c
+++ b/drivers/gpu/drm/nouveau/core/engine/device/nve0.c
@@ -249,6 +249,39 @@ nve0_identify(struct nouveau_device *device)
249 device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass; 249 device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
250 device->oclass[NVDEV_ENGINE_PERFMON] = &nvf0_perfmon_oclass; 250 device->oclass[NVDEV_ENGINE_PERFMON] = &nvf0_perfmon_oclass;
251 break; 251 break;
252 case 0x106:
253 device->cname = "GK208B";
254 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
255 device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
256 device->oclass[NVDEV_SUBDEV_I2C ] = nve0_i2c_oclass;
257 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
258 device->oclass[NVDEV_SUBDEV_CLOCK ] = &nve0_clock_oclass;
259 device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
260 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
261 device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass;
262 device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
263 device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass;
264 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
265 device->oclass[NVDEV_SUBDEV_FB ] = nve0_fb_oclass;
266 device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
267 device->oclass[NVDEV_SUBDEV_IBUS ] = &nve0_ibus_oclass;
268 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
269 device->oclass[NVDEV_SUBDEV_VM ] = &nvc0_vmmgr_oclass;
270 device->oclass[NVDEV_SUBDEV_BAR ] = &nvc0_bar_oclass;
271 device->oclass[NVDEV_SUBDEV_PWR ] = nv108_pwr_oclass;
272 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
273 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass;
274 device->oclass[NVDEV_ENGINE_FIFO ] = nv108_fifo_oclass;
275 device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass;
276 device->oclass[NVDEV_ENGINE_GR ] = nv108_graph_oclass;
277 device->oclass[NVDEV_ENGINE_DISP ] = nvf0_disp_oclass;
278 device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass;
279 device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass;
280 device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass;
281 device->oclass[NVDEV_ENGINE_BSP ] = &nve0_bsp_oclass;
282 device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass;
283 device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
284 break;
252 case 0x108: 285 case 0x108:
253 device->cname = "GK208"; 286 device->cname = "GK208";
254 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; 287 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
diff --git a/drivers/gpu/drm/nouveau/core/subdev/bios/shadowramin.c b/drivers/gpu/drm/nouveau/core/subdev/bios/shadowramin.c
index 5e58bba0dd5c..a7a890fad1e5 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/bios/shadowramin.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/bios/shadowramin.c
@@ -44,8 +44,10 @@ static void
44pramin_fini(void *data) 44pramin_fini(void *data)
45{ 45{
46 struct priv *priv = data; 46 struct priv *priv = data;
47 nv_wr32(priv->bios, 0x001700, priv->bar0); 47 if (priv) {
48 kfree(priv); 48 nv_wr32(priv->bios, 0x001700, priv->bar0);
49 kfree(priv);
50 }
49} 51}
50 52
51static void * 53static void *
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/ramnvaa.c b/drivers/gpu/drm/nouveau/core/subdev/fb/ramnvaa.c
index 00f2ca7e44a5..033a8e999497 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/fb/ramnvaa.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/fb/ramnvaa.c
@@ -24,34 +24,71 @@
24 24
25#include "nv50.h" 25#include "nv50.h"
26 26
27struct nvaa_ram_priv {
28 struct nouveau_ram base;
29 u64 poller_base;
30};
31
27static int 32static int
28nvaa_ram_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 33nvaa_ram_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
29 struct nouveau_oclass *oclass, void *data, u32 datasize, 34 struct nouveau_oclass *oclass, void *data, u32 datasize,
30 struct nouveau_object **pobject) 35 struct nouveau_object **pobject)
31{ 36{
32 const u32 rsvd_head = ( 256 * 1024) >> 12; /* vga memory */ 37 u32 rsvd_head = ( 256 * 1024); /* vga memory */
33 const u32 rsvd_tail = (1024 * 1024) >> 12; /* vbios etc */ 38 u32 rsvd_tail = (1024 * 1024); /* vbios etc */
34 struct nouveau_fb *pfb = nouveau_fb(parent); 39 struct nouveau_fb *pfb = nouveau_fb(parent);
35 struct nouveau_ram *ram; 40 struct nvaa_ram_priv *priv;
36 int ret; 41 int ret;
37 42
38 ret = nouveau_ram_create(parent, engine, oclass, &ram); 43 ret = nouveau_ram_create(parent, engine, oclass, &priv);
39 *pobject = nv_object(ram); 44 *pobject = nv_object(priv);
40 if (ret) 45 if (ret)
41 return ret; 46 return ret;
42 47
43 ram->size = nv_rd32(pfb, 0x10020c); 48 priv->base.type = NV_MEM_TYPE_STOLEN;
44 ram->size = (ram->size & 0xffffff00) | ((ram->size & 0x000000ff) << 32); 49 priv->base.stolen = (u64)nv_rd32(pfb, 0x100e10) << 12;
50 priv->base.size = (u64)nv_rd32(pfb, 0x100e14) << 12;
45 51
46 ret = nouveau_mm_init(&pfb->vram, rsvd_head, (ram->size >> 12) - 52 rsvd_tail += 0x1000;
47 (rsvd_head + rsvd_tail), 1); 53 priv->poller_base = priv->base.size - rsvd_tail;
54
55 ret = nouveau_mm_init(&pfb->vram, rsvd_head >> 12,
56 (priv->base.size - (rsvd_head + rsvd_tail)) >> 12,
57 1);
48 if (ret) 58 if (ret)
49 return ret; 59 return ret;
50 60
51 ram->type = NV_MEM_TYPE_STOLEN; 61 priv->base.get = nv50_ram_get;
52 ram->stolen = (u64)nv_rd32(pfb, 0x100e10) << 12; 62 priv->base.put = nv50_ram_put;
53 ram->get = nv50_ram_get; 63 return 0;
54 ram->put = nv50_ram_put; 64}
65
66static int
67nvaa_ram_init(struct nouveau_object *object)
68{