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| 1 | * Core Divider Clock bindings for Marvell MVEBU SoCs | ||
| 2 | |||
| 3 | The following is a list of provided IDs and clock names on Armada 370/XP: | ||
| 4 | 0 = nand (NAND clock) | ||
| 5 | |||
| 6 | Required properties: | ||
| 7 | - compatible : must be "marvell,armada-370-corediv-clock" | ||
| 8 | - reg : must be the register address of Core Divider control register | ||
| 9 | - #clock-cells : from common clock binding; shall be set to 1 | ||
| 10 | - clocks : must be set to the parent's phandle | ||
| 11 | |||
| 12 | Example: | ||
| 13 | |||
| 14 | corediv_clk: corediv-clocks@18740 { | ||
| 15 | compatible = "marvell,armada-370-corediv-clock"; | ||
| 16 | reg = <0x18740 0xc>; | ||
| 17 | #clock-cells = <1>; | ||
| 18 | clocks = <&pll>; | ||
| 19 | }; | ||
