3 files changed, 15 insertions, 8 deletions

diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c
index 5bf50cec017e..9e3af24e1b05 100644
--- a/drivers/gpu/drm/radeon/radeon_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_kms.c
@@ -470,6 +470,13 @@ static int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file
                         DRM_DEBUG_KMS("BACKEND_ENABLED_MASK is si+ only!\n");
                 }
                 break;
+        case RADEON_INFO_MAX_SCLK:
+                if ((rdev->pm.pm_method == PM_METHOD_DPM) &&
+                    rdev->pm.dpm_enabled)
+                        *value = rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk * 10;
+                else
+                        *value = rdev->pm.default_sclk * 10;
+                break;
         default:
                 DRM_DEBUG_KMS("Invalid request %d\n", info->request);
                 return -EINVAL;
diff --git a/drivers/gpu/drm/radeon/rv770_dpm.c b/drivers/gpu/drm/radeon/rv770_dpm.c
index b95267846ff2..cb730cddfb9a 100644
--- a/drivers/gpu/drm/radeon/rv770_dpm.c
+++ b/drivers/gpu/drm/radeon/rv770_dpm.c
@@ -2251,14 +2251,12 @@ static void rv7xx_parse_pplib_clock_info(struct radeon_device *rdev,
                 pl->vddci = vddci;
         }
 
-        if (rdev->family >= CHIP_BARTS) {
-                if ((rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) ==
-                    ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE) {
-                        rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk = pl->sclk;
-                        rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk = pl->mclk;
-                        rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc = pl->vddc;
-                        rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = pl->vddci;
-                }
+        if ((rps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK) ==
+            ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE) {
+                rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk = pl->sclk;
+                rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk = pl->mclk;
+                rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc = pl->vddc;
+                rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = pl->vddci;
         }
 }
 
diff --git a/include/uapi/drm/radeon_drm.h b/include/uapi/drm/radeon_drm.h
index fe421e8a431b..d9ea3a73afe2 100644
--- a/include/uapi/drm/radeon_drm.h
+++ b/include/uapi/drm/radeon_drm.h
@@ -985,6 +985,8 @@ struct drm_radeon_cs {
 #define RADEON_INFO_CIK_MACROTILE_MODE_ARRAY    0x18
 /* query the number of render backends */
 #define RADEON_INFO_SI_BACKEND_ENABLED_MASK     0x19
+/* max engine clock - needed for OpenCL */
+#define RADEON_INFO_MAX_SCLK            0x1a
 
 
 struct drm_radeon_info {