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-rw-r--r--arch/arm/mach-mmp/aspenite.c1
-rw-r--r--arch/arm/mach-mmp/brownstone.c1
-rw-r--r--arch/arm/mach-mmp/gplugd.c2
-rw-r--r--arch/arm/mach-mmp/include/mach/gpio-pxa.h30
-rw-r--r--arch/arm/mach-mmp/include/mach/gpio.h23
-rw-r--r--arch/arm/mach-mmp/jasper.c1
-rw-r--r--arch/arm/mach-mmp/mmp2.c2
-rw-r--r--arch/arm/mach-mmp/pxa168.c2
-rw-r--r--arch/arm/mach-mmp/pxa910.c2
-rw-r--r--arch/arm/mach-mmp/tavorevb.c1
-rw-r--r--arch/arm/mach-pxa/cm-x255.c1
-rw-r--r--arch/arm/mach-pxa/include/mach/gpio-pxa.h133
-rw-r--r--arch/arm/mach-pxa/include/mach/gpio.h110
-rw-r--r--arch/arm/mach-pxa/include/mach/littleton.h2
-rw-r--r--arch/arm/mach-pxa/irq.c2
-rw-r--r--arch/arm/mach-pxa/mfp-pxa2xx.c1
-rw-r--r--arch/arm/mach-pxa/pxa25x.c1
-rw-r--r--arch/arm/mach-pxa/pxa27x.c1
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c2
-rw-r--r--arch/arm/mach-pxa/pxa95x.c2
-rw-r--r--arch/arm/mach-pxa/saarb.c1
-rw-r--r--arch/arm/plat-pxa/include/plat/gpio-pxa.h44
-rw-r--r--arch/arm/plat-pxa/include/plat/gpio.h40
-rw-r--r--drivers/gpio/gpio-pxa.c2
24 files changed, 227 insertions, 180 deletions
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index cf875189132e..833c3a2784aa 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -17,6 +17,7 @@
17#include <linux/mtd/partitions.h> 17#include <linux/mtd/partitions.h>
18#include <linux/mtd/nand.h> 18#include <linux/mtd/nand.h>
19#include <linux/interrupt.h> 19#include <linux/interrupt.h>
20#include <linux/gpio.h>
20 21
21#include <asm/mach-types.h> 22#include <asm/mach-types.h>
22#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
diff --git a/arch/arm/mach-mmp/brownstone.c b/arch/arm/mach-mmp/brownstone.c
index c79162a50f28..e411252e3d39 100644
--- a/arch/arm/mach-mmp/brownstone.c
+++ b/arch/arm/mach-mmp/brownstone.c
@@ -14,7 +14,6 @@
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/gpio.h>
18#include <linux/regulator/machine.h> 17#include <linux/regulator/machine.h>
19#include <linux/regulator/max8649.h> 18#include <linux/regulator/max8649.h>
20#include <linux/regulator/fixed.h> 19#include <linux/regulator/fixed.h>
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index c070c24255f4..ef738deb20b5 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -9,11 +9,11 @@
9 */ 9 */
10 10
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/gpio.h>
12 13
13#include <asm/mach/arch.h> 14#include <asm/mach/arch.h>
14#include <asm/mach-types.h> 15#include <asm/mach-types.h>
15 16
16#include <mach/gpio.h>
17#include <mach/pxa168.h> 17#include <mach/pxa168.h>
18#include <mach/mfp-pxa168.h> 18#include <mach/mfp-pxa168.h>
19#include <mach/mfp-gplugd.h> 19#include <mach/mfp-gplugd.h>
diff --git a/arch/arm/mach-mmp/include/mach/gpio-pxa.h b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
new file mode 100644
index 000000000000..c017a983eced
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
@@ -0,0 +1,30 @@
1#ifndef __ASM_MACH_GPIO_PXA_H
2#define __ASM_MACH_GPIO_PXA_H
3
4#include <mach/addr-map.h>
5#include <mach/irqs.h>
6
7#define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000)
8
9#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
10#define GPIO_REG(x) (*((volatile u32 *)(GPIO_REGS_VIRT + (x))))
11
12#define NR_BUILTIN_GPIO IRQ_GPIO_NUM
13
14#define gpio_to_bank(gpio) ((gpio) >> 5)
15
16/* NOTE: these macros are defined here to make optimization of
17 * gpio_{get,set}_value() to work when 'gpio' is a constant.
18 * Usage of these macros otherwise is no longer recommended,
19 * use generic GPIO API whenever possible.
20 */
21#define GPIO_bit(gpio) (1 << ((gpio) & 0x1f))
22
23#define GPLR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x00)
24#define GPDR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x0c)
25#define GPSR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x18)
26#define GPCR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x24)
27
28#include <plat/gpio-pxa.h>
29
30#endif /* __ASM_MACH_GPIO_PXA_H */
diff --git a/arch/arm/mach-mmp/include/mach/gpio.h b/arch/arm/mach-mmp/include/mach/gpio.h
index 7bfb827f3fe3..681262359d1c 100644
--- a/arch/arm/mach-mmp/include/mach/gpio.h
+++ b/arch/arm/mach-mmp/include/mach/gpio.h
@@ -1,36 +1,13 @@
1#ifndef __ASM_MACH_GPIO_H 1#ifndef __ASM_MACH_GPIO_H
2#define __ASM_MACH_GPIO_H 2#define __ASM_MACH_GPIO_H
3 3
4#include <mach/addr-map.h>
5#include <mach/irqs.h>
6#include <asm-generic/gpio.h> 4#include <asm-generic/gpio.h>
7 5
8#define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000)
9
10#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
11#define GPIO_REG(x) (*((volatile u32 *)(GPIO_REGS_VIRT + (x))))
12
13#define NR_BUILTIN_GPIO IRQ_GPIO_NUM
14
15#define gpio_to_bank(gpio) ((gpio) >> 5)
16#define gpio_to_irq(gpio) (IRQ_GPIO_START + (gpio)) 6#define gpio_to_irq(gpio) (IRQ_GPIO_START + (gpio))
17#define irq_to_gpio(irq) ((irq) - IRQ_GPIO_START) 7#define irq_to_gpio(irq) ((irq) - IRQ_GPIO_START)
18 8
19
20#define __gpio_is_inverted(gpio) (0) 9#define __gpio_is_inverted(gpio) (0)
21#define __gpio_is_occupied(gpio) (0) 10#define __gpio_is_occupied(gpio) (0)
22 11
23/* NOTE: these macros are defined here to make optimization of
24 * gpio_{get,set}_value() to work when 'gpio' is a constant.
25 * Usage of these macros otherwise is no longer recommended,
26 * use generic GPIO API whenever possible.
27 */
28#define GPIO_bit(gpio) (1 << ((gpio) & 0x1f))
29
30#define GPLR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x00)
31#define GPDR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x0c)
32#define GPSR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x18)
33#define GPCR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x24)
34
35#include <plat/gpio.h> 12#include <plat/gpio.h>
36#endif /* __ASM_MACH_GPIO_H */ 13#endif /* __ASM_MACH_GPIO_H */
diff --git a/arch/arm/mach-mmp/jasper.c b/arch/arm/mach-mmp/jasper.c
index 5d6421d63254..8bfac6612623 100644
--- a/arch/arm/mach-mmp/jasper.c
+++ b/arch/arm/mach-mmp/jasper.c
@@ -14,7 +14,6 @@
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/gpio.h>
18#include <linux/regulator/machine.h> 17#include <linux/regulator/machine.h>
19#include <linux/regulator/max8649.h> 18#include <linux/regulator/max8649.h>
20#include <linux/mfd/max8925.h> 19#include <linux/mfd/max8925.h>
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index 19358344a4a4..65d8689e40c9 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -9,7 +9,6 @@
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 */ 11 */
12#include <linux/gpio.h>
13#include <linux/module.h> 12#include <linux/module.h>
14#include <linux/kernel.h> 13#include <linux/kernel.h>
15#include <linux/init.h> 14#include <linux/init.h>
@@ -25,6 +24,7 @@
25#include <mach/irqs.h> 24#include <mach/irqs.h>
26#include <mach/dma.h> 25#include <mach/dma.h>
27#include <mach/mfp.h> 26#include <mach/mfp.h>
27#include <mach/gpio-pxa.h>
28#include <mach/devices.h> 28#include <mach/devices.h>
29#include <mach/mmp2.h> 29#include <mach/mmp2.h>
30 30
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 958155167807..50c1763911ff 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -7,7 +7,6 @@
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#include <linux/gpio.h>
11#include <linux/module.h> 10#include <linux/module.h>
12#include <linux/kernel.h> 11#include <linux/kernel.h>
13#include <linux/init.h> 12#include <linux/init.h>
@@ -21,6 +20,7 @@
21#include <mach/regs-apbc.h> 20#include <mach/regs-apbc.h>
22#include <mach/regs-apmu.h> 21#include <mach/regs-apmu.h>
23#include <mach/irqs.h> 22#include <mach/irqs.h>
23#include <mach/gpio-pxa.h>
24#include <mach/dma.h> 24#include <mach/dma.h>
25#include <mach/devices.h> 25#include <mach/devices.h>
26#include <mach/mfp.h> 26#include <mach/mfp.h>
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index c70b4dd359f6..4ebbfbba39fc 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -7,7 +7,6 @@
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#include <linux/gpio.h>
11#include <linux/module.h> 10#include <linux/module.h>
12#include <linux/kernel.h> 11#include <linux/kernel.h>
13#include <linux/init.h> 12#include <linux/init.h>
@@ -20,6 +19,7 @@
20#include <mach/regs-apmu.h> 19#include <mach/regs-apmu.h>
21#include <mach/cputype.h> 20#include <mach/cputype.h>
22#include <mach/irqs.h> 21#include <mach/irqs.h>
22#include <mach/gpio-pxa.h>
23#include <mach/dma.h> 23#include <mach/dma.h>
24#include <mach/mfp.h> 24#include <mach/mfp.h>
25#include <mach/devices.h> 25#include <mach/devices.h>
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c
index 143e52ede8ef..eb5be879fd8c 100644
--- a/arch/arm/mach-mmp/tavorevb.c
+++ b/arch/arm/mach-mmp/tavorevb.c
@@ -12,6 +12,7 @@
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14#include <linux/smc91x.h> 14#include <linux/smc91x.h>
15#include <linux/gpio.h>
15 16
16#include <asm/mach-types.h> 17#include <asm/mach-types.h>
17#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
diff --git a/arch/arm/mach-pxa/cm-x255.c b/arch/arm/mach-pxa/cm-x255.c
index 93f59f877fc6..be751470d37b 100644
--- a/arch/arm/mach-pxa/cm-x255.c
+++ b/arch/arm/mach-pxa/cm-x255.c
@@ -11,7 +11,6 @@
11 11
12#include <linux/platform_device.h> 12#include <linux/platform_device.h>
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/gpio.h>
15#include <linux/mtd/partitions.h> 14#include <linux/mtd/partitions.h>
16#include <linux/mtd/physmap.h> 15#include <linux/mtd/physmap.h>
17#include <linux/mtd/nand-gpio.h> 16#include <linux/mtd/nand-gpio.h>
diff --git a/arch/arm/mach-pxa/include/mach/gpio-pxa.h b/arch/arm/mach-pxa/include/mach/gpio-pxa.h
new file mode 100644
index 000000000000..41b4c93a96c2
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/gpio-pxa.h
@@ -0,0 +1,133 @@
1/*
2 * Written by Philipp Zabel <philipp.zabel@gmail.com>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 *
18 */
19#ifndef __MACH_PXA_GPIO_PXA_H
20#define __MACH_PXA_GPIO_PXA_H
21
22#include <mach/irqs.h>
23#include <mach/hardware.h>
24
25#define GPIO_REGS_VIRT io_p2v(0x40E00000)
26
27#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
28#define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x)))
29
30/* GPIO Pin Level Registers */
31#define GPLR0 GPIO_REG(BANK_OFF(0) + 0x00)
32#define GPLR1 GPIO_REG(BANK_OFF(1) + 0x00)
33#define GPLR2 GPIO_REG(BANK_OFF(2) + 0x00)
34#define GPLR3 GPIO_REG(BANK_OFF(3) + 0x00)
35
36/* GPIO Pin Direction Registers */
37#define GPDR0 GPIO_REG(BANK_OFF(0) + 0x0c)
38#define GPDR1 GPIO_REG(BANK_OFF(1) + 0x0c)
39#define GPDR2 GPIO_REG(BANK_OFF(2) + 0x0c)
40#define GPDR3 GPIO_REG(BANK_OFF(3) + 0x0c)
41
42/* GPIO Pin Output Set Registers */
43#define GPSR0 GPIO_REG(BANK_OFF(0) + 0x18)
44#define GPSR1 GPIO_REG(BANK_OFF(1) + 0x18)
45#define GPSR2 GPIO_REG(BANK_OFF(2) + 0x18)
46#define GPSR3 GPIO_REG(BANK_OFF(3) + 0x18)
47
48/* GPIO Pin Output Clear Registers */
49#define GPCR0 GPIO_REG(BANK_OFF(0) + 0x24)
50#define GPCR1 GPIO_REG(BANK_OFF(1) + 0x24)
51#define GPCR2 GPIO_REG(BANK_OFF(2) + 0x24)
52#define GPCR3 GPIO_REG(BANK_OFF(3) + 0x24)
53
54/* GPIO Rising Edge Detect Registers */
55#define GRER0 GPIO_REG(BANK_OFF(0) + 0x30)
56#define GRER1 GPIO_REG(BANK_OFF(1) + 0x30)
57#define GRER2 GPIO_REG(BANK_OFF(2) + 0x30)
58#define GRER3 GPIO_REG(BANK_OFF(3) + 0x30)
59
60/* GPIO Falling Edge Detect Registers */
61#define GFER0 GPIO_REG(BANK_OFF(0) + 0x3c)
62#define GFER1 GPIO_REG(BANK_OFF(1) + 0x3c)
63#define GFER2 GPIO_REG(BANK_OFF(2) + 0x3c)
64#define GFER3 GPIO_REG(BANK_OFF(3) + 0x3c)
65
66/* GPIO Edge Detect Status Registers */
67#define GEDR0 GPIO_REG(BANK_OFF(0) + 0x48)
68#define GEDR1 GPIO_REG(BANK_OFF(1) + 0x48)
69#define GEDR2 GPIO_REG(BANK_OFF(2) + 0x48)
70#define GEDR3 GPIO_REG(BANK_OFF(3) + 0x48)
71
72/* GPIO Alternate Function Select Registers */
73#define GAFR0_L GPIO_REG(0x0054)
74#define GAFR0_U GPIO_REG(0x0058)
75#define GAFR1_L GPIO_REG(0x005C)
76#define GAFR1_U GPIO_REG(0x0060)
77#define GAFR2_L GPIO_REG(0x0064)
78#define GAFR2_U GPIO_REG(0x0068)
79#define GAFR3_L GPIO_REG(0x006C)
80#define GAFR3_U GPIO_REG(0x0070)
81
82/* More handy macros. The argument is a literal GPIO number. */
83
84#define GPIO_bit(x) (1 << ((x) & 0x1f))
85
86#define GPLR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x00)
87#define GPDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x0c)
88#define GPSR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x18)
89#define GPCR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x24)
90#define GRER(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x30)
91#define GFER(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x3c)
92#define GEDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x48)
93#define GAFR(x) GPIO_REG(0x54 + (((x) & 0x70) >> 2))
94
95
96#define NR_BUILTIN_GPIO PXA_GPIO_IRQ_NUM
97
98#define gpio_to_bank(gpio) ((gpio) >> 5)
99
100#ifdef CONFIG_CPU_PXA26x
101/* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted,
102 * as well as their Alternate Function value being '1' for GPIO in GAFRx.
103 */
104static inline int __gpio_is_inverted(unsigned gpio)
105{
106 return cpu_is_pxa25x() && gpio > 85;
107}
108#else
109static inline int __gpio_is_inverted(unsigned gpio) { return 0; }
110#endif
111
112/*
113 * On PXA25x and PXA27x, GAFRx and GPDRx together decide the alternate
114 * function of a GPIO, and GPDRx cannot be altered once configured. It
115 * is attributed as "occupied" here (I know this terminology isn't
116 * accurate, you are welcome to propose a better one :-)
117 */
118static inline int __gpio_is_occupied(unsigned gpio)
119{
120 if (cpu_is_pxa27x() || cpu_is_pxa25x()) {
121 int af = (GAFR(gpio) >> ((gpio & 0xf) * 2)) & 0x3;
122 int dir = GPDR(gpio) & GPIO_bit(gpio);
123
124 if (__gpio_is_inverted(gpio))
125 return af != 1 || dir == 0;
126 else
127 return af != 0 || dir != 0;
128 } else
129 return GPDR(gpio) & GPIO_bit(gpio);
130}
131
132#include <plat/gpio-pxa.h>
133#endif /* __MACH_PXA_GPIO_PXA_H */
diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h
index c4639502efca..004cade7bb13 100644
--- a/arch/arm/mach-pxa/include/mach/gpio.h
+++ b/arch/arm/mach-pxa/include/mach/gpio.h
@@ -24,84 +24,10 @@
24#ifndef __ASM_ARCH_PXA_GPIO_H 24#ifndef __ASM_ARCH_PXA_GPIO_H
25#define __ASM_ARCH_PXA_GPIO_H 25#define __ASM_ARCH_PXA_GPIO_H
26 26
27#include <mach/irqs.h>
28#include <mach/hardware.h>
29#include <asm-generic/gpio.h> 27#include <asm-generic/gpio.h>
28/* The defines for the driver are needed for the accelerated accessors */
29#include "gpio-pxa.h"
30 30
31#define GPIO_REGS_VIRT io_p2v(0x40E00000)
32
33#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
34#define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x)))
35
36/* GPIO Pin Level Registers */
37#define GPLR0 GPIO_REG(BANK_OFF(0) + 0x00)
38#define GPLR1 GPIO_REG(BANK_OFF(1) + 0x00)
39#define GPLR2 GPIO_REG(BANK_OFF(2) + 0x00)
40#define GPLR3 GPIO_REG(BANK_OFF(3) + 0x00)
41
42/* GPIO Pin Direction Registers */
43#define GPDR0 GPIO_REG(BANK_OFF(0) + 0x0c)
44#define GPDR1 GPIO_REG(BANK_OFF(1) + 0x0c)
45#define GPDR2 GPIO_REG(BANK_OFF(2) + 0x0c)
46#define GPDR3 GPIO_REG(BANK_OFF(3) + 0x0c)
47
48/* GPIO Pin Output Set Registers */
49#define GPSR0 GPIO_REG(BANK_OFF(0) + 0x18)
50#define GPSR1 GPIO_REG(BANK_OFF(1) + 0x18)
51#define GPSR2 GPIO_REG(BANK_OFF(2) + 0x18)
52#define GPSR3 GPIO_REG(BANK_OFF(3) + 0x18)
53
54/* GPIO Pin Output Clear Registers */
55#define GPCR0 GPIO_REG(BANK_OFF(0) + 0x24)
56#define GPCR1 GPIO_REG(BANK_OFF(1) + 0x24)
57#define GPCR2 GPIO_REG(BANK_OFF(2) + 0x24)
58#define GPCR3 GPIO_REG(BANK_OFF(3) + 0x24)
59
60/* GPIO Rising Edge Detect Registers */
61#define GRER0 GPIO_REG(BANK_OFF(0) + 0x30)
62#define GRER1 GPIO_REG(BANK_OFF(1) + 0x30)
63#define GRER2 GPIO_REG(BANK_OFF(2) + 0x30)
64#define GRER3 GPIO_REG(BANK_OFF(3) + 0x30)
65
66/* GPIO Falling Edge Detect Registers */
67#define GFER0 GPIO_REG(BANK_OFF(0) + 0x3c)
68#define GFER1 GPIO_REG(BANK_OFF(1) + 0x3c)
69#define GFER2 GPIO_REG(BANK_OFF(2) + 0x3c)
70#define GFER3 GPIO_REG(BANK_OFF(3) + 0x3c)
71
72/* GPIO Edge Detect Status Registers */
73#define GEDR0 GPIO_REG(BANK_OFF(0) + 0x48)
74#define GEDR1 GPIO_REG(BANK_OFF(1) + 0x48)
75#define GEDR2 GPIO_REG(BANK_OFF(2) + 0x48)
76#define GEDR3 GPIO_REG(BANK_OFF(3) + 0x48)
77
78/* GPIO Alternate Function Select Registers */
79#define GAFR0_L GPIO_REG(0x0054)
80#define GAFR0_U GPIO_REG(0x0058)
81#define GAFR1_L GPIO_REG(0x005C)
82#define GAFR1_U GPIO_REG(0x0060)
83#define GAFR2_L GPIO_REG(0x0064)
84#define GAFR2_U GPIO_REG(0x0068)
85#define GAFR3_L GPIO_REG(0x006C)
86#define GAFR3_U GPIO_REG(0x0070)
87
88/* More handy macros. The argument is a literal GPIO number. */
89
90#define GPIO_bit(x) (1 << ((x) & 0x1f))
91
92#define GPLR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x00)
93#define GPDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x0c)
94#define GPSR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x18)
95#define GPCR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x24)
96#define GRER(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x30)
97#define GFER(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x3c)
98#define GEDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x48)
99#define GAFR(x) GPIO_REG(0x54 + (((x) & 0x70) >> 2))
100
101
102#define NR_BUILTIN_GPIO PXA_GPIO_IRQ_NUM
103
104#define gpio_to_bank(gpio) ((gpio) >> 5)
105#define gpio_to_irq(gpio) IRQ_GPIO(gpio) 31#define gpio_to_irq(gpio) IRQ_GPIO(gpio)
106 32
107static inline int irq_to_gpio(unsigned int irq) 33static inline int irq_to_gpio(unsigned int irq)
@@ -118,37 +44,5 @@ static inline int irq_to_gpio(unsigned int irq)
118 return -1; 44 return -1;
119} 45}
120 46
121#ifdef CONFIG_CPU_PXA26x
122/* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted,
123 * as well as their Alternate Function value being '1' for GPIO in GAFRx.
124 */
125static inline int __gpio_is_inverted(unsigned gpio)
126{
127 return cpu_is_pxa25x() && gpio > 85;
128}
129#else
130static inline int __gpio_is_inverted(unsigned gpio) { return 0; }
131#endif
132
133/*
134 * On PXA25x and PXA27x, GAFRx and GPDRx together decide the alternate
135 * function of a GPIO, and GPDRx cannot be altered once configured. It
136 * is attributed as "occupied" here (I know this terminology isn't
137 * accurate, you are welcome to propose a better one :-)
138 */
139static inline int __gpio_is_occupied(unsigned gpio)
140{
141 if (cpu_is_pxa27x() || cpu_is_pxa25x()) {
142 int af = (GAFR(gpio) >> ((gpio & 0xf) * 2)) & 0x3;
143 int dir = GPDR(gpio) & GPIO_bit(gpio);
144
145 if (__gpio_is_inverted(gpio))
146 return af != 1 || dir == 0;
147 else
148 return af != 0 || dir != 0;
149 } else
150 return GPDR(gpio) & GPIO_bit(gpio);
151}
152
153#include <plat/gpio.h> 47#include <plat/gpio.h>
154#endif 48#endif
diff --git a/arch/arm/mach-pxa/include/mach/littleton.h b/arch/arm/mach-pxa/include/mach/littleton.h
index 1c585a79a1c1..b6238cbd8aea 100644
--- a/arch/arm/mach-pxa/include/mach/littleton.h
+++ b/arch/arm/mach-pxa/include/mach/littleton.h
@@ -1,7 +1,7 @@
1#ifndef __ASM_ARCH_LITTLETON_H 1#ifndef __ASM_ARCH_LITTLETON_H
2#define __ASM_ARCH_LITTLETON_H 2#define __ASM_ARCH_LITTLETON_H
3 3
4#include <asm/gpio.h> 4#include <mach/gpio-pxa.h>
5 5
6#define LITTLETON_ETH_PHYS 0x30000000 6#define LITTLETON_ETH_PHYS 0x30000000
7 7
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index dafb4bf6349e..d493a230addf 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -11,7 +11,6 @@
11 * it under the terms of the GNU General Public License version 2 as 11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 */ 13 */
14#include <linux/gpio.h>
15#include <linux/init.h> 14#include <linux/init.h>
16#include <linux/module.h> 15#include <linux/module.h>
17#include <linux/interrupt.h> 16#include <linux/interrupt.h>
@@ -21,6 +20,7 @@
21 20
22#include <mach/hardware.h> 21#include <mach/hardware.h>
23#include <mach/irqs.h> 22#include <mach/irqs.h>
23#include <mach/gpio-pxa.h>
24 24
25#include "generic.h" 25#include "generic.h"
26 26
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index b129527832cb..43a5f6861ca3 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -20,6 +20,7 @@
20 20
21#include <mach/pxa2xx-regs.h> 21#include <mach/pxa2xx-regs.h>
22#include <mach/mfp-pxa2xx.h> 22#include <mach/mfp-pxa2xx.h>
23#include <mach/gpio-pxa.h>
23 24
24#include "generic.h" 25#include "generic.h"
25 26
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index 6bb3fa5d85ee..8746e1090b6e 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -24,6 +24,7 @@
24#include <linux/suspend.h> 24#include <linux/suspend.h>
25#include <linux/syscore_ops.h> 25#include <linux/syscore_ops.h>
26#include <linux/irq.h> 26#include <linux/irq.h>
27#include <linux/gpio.h>
27 28
28#include <asm/mach/map.h> 29#include <asm/mach/map.h>
29#include <asm/suspend.h> 30#include <asm/suspend.h>
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index d2cdcd6ead25..2bb5cf8ba6ec 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -21,6 +21,7 @@
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/irq.h> 22#include <linux/irq.h>
23#include <linux/i2c/pxa-i2c.h> 23#include <linux/i2c/pxa-i2c.h>
24#include <linux/gpio.h>
24 25
25#include <asm/mach/map.h> 26#include <asm/mach/map.h>
26#include <mach/hardware.h> 27#include <mach/hardware.h>
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 3ab9e8471e60..f940a1345531 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -12,7 +12,6 @@
12 * it under the terms of the GNU General Public License version 2 as 12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation. 13 * published by the Free Software Foundation.
14 */ 14 */
15#include <linux/gpio.h>
16#include <linux/module.h> 15#include <linux/module.h>
17#include <linux/kernel.h> 16#include <linux/kernel.h>
18#include <linux/init.h> 17#include <linux/init.h>
@@ -26,6 +25,7 @@
26#include <asm/mach/map.h> 25#include <asm/mach/map.h>
27#include <asm/suspend.h> 26#include <asm/suspend.h>
28#include <mach/hardware.h> 27#include <mach/hardware.h>
28#include <mach/gpio-pxa.h>
29#include <mach/pxa3xx-regs.h> 29#include <mach/pxa3xx-regs.h>
30#include <mach/reset.h> 30#include <mach/reset.h>
31#include <mach/ohci.h> 31#include <mach/ohci.h>
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
index de25cebf78aa..51371b39d2a3 100644
--- a/arch/arm/mach-pxa/pxa95x.c
+++ b/arch/arm/mach-pxa/pxa95x.c
@@ -9,7 +9,6 @@
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 */ 11 */
12#include <linux/gpio.h>
13#include <linux/module.h> 12#include <linux/module.h>
14#include <linux/kernel.h> 13#include <linux/kernel.h>
15#include <linux/init.h> 14#include <linux/init.h>
@@ -21,6 +20,7 @@
21#include <linux/syscore_ops.h> 20#include <linux/syscore_ops.h>
22 21
23#include <mach/hardware.h> 22#include <mach/hardware.h>
23#include <mach/gpio-pxa.h>
24#include <mach/pxa3xx-regs.h> 24#include <mach/pxa3xx-regs.h>
25#include <mach/pxa930.h> 25#include <mach/pxa930.h>
26#include <mach/reset.h> 26#include <mach/reset.h>
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c
index 87e9b757ef34..eb6a10d85b03 100644
--- a/arch/arm/mach-pxa/saarb.c
+++ b/arch/arm/mach-pxa/saarb.c
@@ -15,6 +15,7 @@
15#include <linux/i2c.h> 15#include <linux/i2c.h>
16#include <linux/i2c/pxa-i2c.h> 16#include <linux/i2c/pxa-i2c.h>
17#include <linux/mfd/88pm860x.h> 17#include <linux/mfd/88pm860x.h>
18#include <linux/gpio.h>
18 19
19#include <asm/mach-types.h> 20#include <asm/mach-types.h>
20#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
diff --git a/arch/arm/plat-pxa/include/plat/gpio-pxa.h b/arch/arm/plat-pxa/include/plat/gpio-pxa.h
new file mode 100644
index 000000000000..b6390beff323
--- /dev/null
+++ b/arch/arm/plat-pxa/include/plat/gpio-pxa.h
@@ -0,0 +1,44 @@
1#ifndef __PLAT_PXA_GPIO_H
2#define __PLAT_PXA_GPIO_H
3
4struct irq_data;
5
6/*
7 * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with
8 * one set of registers. The register offsets are organized below:
9 *
10 * GPLR GPDR GPSR GPCR GRER GFER GEDR
11 * BANK 0 - 0x0000 0x000C 0x0018 0x0024 0x0030 0x003C 0x0048
12 * BANK 1 - 0x0004 0x0010 0x001C 0x0028 0x0034 0x0040 0x004C
13 * BANK 2 - 0x0008 0x0014 0x0020 0x002C 0x0038 0x0044 0x0050
14 *
15 * BANK 3 - 0x0100 0x010C 0x0118 0x0124 0x0130 0x013C 0x0148
16 * BANK 4 - 0x0104 0x0110 0x011C 0x0128 0x0134 0x0140 0x014C
17 * BANK 5 - 0x0108 0x0114 0x0120 0x012C 0x0138 0x0144 0x0150
18 *
19 * NOTE:
20 * BANK 3 is only available on PXA27x and later processors.
21 * BANK 4 and 5 are only available on PXA935
22 */
23
24#define GPIO_BANK(n) (GPIO_REGS_VIRT + BANK_OFF(n))
25
26#define GPLR_OFFSET 0x00
27#define GPDR_OFFSET 0x0C
28#define GPSR_OFFSET 0x18
29#define GPCR_OFFSET 0x24
30#define GRER_OFFSET 0x30
31#define GFER_OFFSET 0x3C
32#define GEDR_OFFSET 0x48
33
34/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
35 * Those cases currently cause holes in the GPIO number space, the
36 * actual number of the last GPIO is recorded by 'pxa_last_gpio'.
37 */
38extern int pxa_last_gpio;
39
40typedef int (*set_wake_t)(struct irq_data *d, unsigned int on);
41
42extern void pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn);
43
44#endif /* __PLAT_PXA_GPIO_H */
diff --git a/arch/arm/plat-pxa/include/plat/gpio.h b/arch/arm/plat-pxa/include/plat/gpio.h
index 6fc41db93e1c..258f77210b02 100644
--- a/arch/arm/plat-pxa/include/plat/gpio.h
+++ b/arch/arm/plat-pxa/include/plat/gpio.h
@@ -3,35 +3,8 @@
3 3
4#define __ARM_GPIOLIB_COMPLEX 4#define __ARM_GPIOLIB_COMPLEX
5 5
6struct irq_data; 6/* The individual machine provides register offsets and NR_BUILTIN_GPIO */
7 7#include <mach/gpio-pxa.h>
8/*
9 * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with
10 * one set of registers. The register offsets are organized below:
11 *
12 * GPLR GPDR GPSR GPCR GRER GFER GEDR
13 * BANK 0 - 0x0000 0x000C 0x0018 0x0024 0x0030 0x003C 0x0048
14 * BANK 1 - 0x0004 0x0010 0x001C 0x0028 0x0034 0x0040 0x004C
15 * BANK 2 - 0x0008 0x0014 0x0020 0x002C 0x0038 0x0044 0x0050
16 *
17 * BANK 3 - 0x0100 0x010C 0x0118 0x0124 0x0130 0x013C 0x0148
18 * BANK 4 - 0x0104 0x0110 0x011C 0x0128 0x0134 0x0140 0x014C
19 * BANK 5 - 0x0108 0x0114 0x0120 0x012C 0x0138 0x0144 0x0150
20 *
21 * NOTE:
22 * BANK 3 is only available on PXA27x and later processors.
23 * BANK 4 and 5 are only available on PXA935
24 */
25
26#define GPIO_BANK(n) (GPIO_REGS_VIRT + BANK_OFF(n))
27
28#define GPLR_OFFSET 0x00
29#define GPDR_OFFSET 0x0C
30#define GPSR_OFFSET 0x18
31#define GPCR_OFFSET 0x24
32#define GRER_OFFSET 0x30
33#define GFER_OFFSET 0x3C
34#define GEDR_OFFSET 0x48
35 8
36static inline int gpio_get_value(unsigned gpio) 9static inline int gpio_get_value(unsigned gpio)
37{ 10{
@@ -54,13 +27,4 @@ static inline void gpio_set_value(unsigned gpio, int value)
54 27
55#define gpio_cansleep __gpio_cansleep 28#define gpio_cansleep __gpio_cansleep
56 29
57/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
58 * Those cases currently cause holes in the GPIO number space, the
59 * actual number of the last GPIO is recorded by 'pxa_last_gpio'.
60 */
61extern int pxa_last_gpio;
62
63typedef int (*set_wake_t)(struct irq_data *d, unsigned int on);
64
65extern void pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn);
66#endif /* __PLAT_GPIO_H */ 30#endif /* __PLAT_GPIO_H */
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
index 5d6a86bfc68d..9052925c6fa2 100644
--- a/drivers/gpio/gpio-pxa.c
+++ b/drivers/gpio/gpio-pxa.c
@@ -18,6 +18,8 @@
18#include <linux/syscore_ops.h> 18#include <linux/syscore_ops.h>
19#include <linux/slab.h> 19#include <linux/slab.h>
20 20
21#include <mach/gpio-pxa.h>
22
21int pxa_last_gpio; 23int pxa_last_gpio;
22 24
23struct pxa_gpio_chip { 25struct pxa_gpio_chip {
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-30 08:11:13 -0400