1 files changed, 143 insertions, 59 deletions

diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 32ba3555f8b9..eb53df27e7ea 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -39,6 +39,7 @@
 #endif
 
 #define MAX_SPI_PORTS           3
+#define S3C64XX_SPI_QUIRK_POLL          (1 << 0)
 
 /* Registers and bit-fields */
 
@@ -130,6 +131,7 @@
 #define S3C64XX_SPI_TRAILCNT            S3C64XX_SPI_MAX_TRAILCNT
 
 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
+#define is_polling(x)   (x->port_conf->quirks & S3C64XX_SPI_QUIRK_POLL)
 
 #define RXBUSY    (1<<2)
 #define TXBUSY    (1<<3)
@@ -158,6 +160,7 @@ struct s3c64xx_spi_port_config {
         int     fifo_lvl_mask[MAX_SPI_PORTS];
         int     rx_lvl_offset;
         int     tx_st_done;
+        int     quirks;
         bool    high_speed;
         bool    clk_from_cmu;
 };
@@ -205,6 +208,7 @@ struct s3c64xx_spi_driver_data {
         struct s3c64xx_spi_port_config  *port_conf;
         unsigned int                    port_id;
         unsigned long                   gpios[4];
+        bool                            cs_gpio;
 };
 
 static void flush_fifo(struct s3c64xx_spi_driver_data *sdd)
@@ -344,8 +348,12 @@ static int s3c64xx_spi_prepare_transfer(struct spi_master *spi)
 {
         struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(spi);
 
-        /* Acquire DMA channels */
-        while (!acquire_dma(sdd))
+        /*
+         * If DMA resource was not available during
+         * probe, no need to continue with dma requests
+         * else Acquire DMA channels
+         */
+        while (!is_polling(sdd) && !acquire_dma(sdd))
                 usleep_range(10000, 11000);
 
         pm_runtime_get_sync(&sdd->pdev->dev);
@@ -358,9 +366,12 @@ static int s3c64xx_spi_unprepare_transfer(struct spi_master *spi)
         struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(spi);
 
         /* Free DMA channels */
-        sdd->ops->release((enum dma_ch)sdd->rx_dma.ch, &s3c64xx_spi_dma_client);
-        sdd->ops->release((enum dma_ch)sdd->tx_dma.ch, &s3c64xx_spi_dma_client);
-
+        if (!is_polling(sdd)) {
+                sdd->ops->release((enum dma_ch)sdd->rx_dma.ch,
+                                        &s3c64xx_spi_dma_client);
+                sdd->ops->release((enum dma_ch)sdd->tx_dma.ch,
+                                        &s3c64xx_spi_dma_client);
+        }
         pm_runtime_put(&sdd->pdev->dev);
 
         return 0;
@@ -464,8 +475,10 @@ static int s3c64xx_spi_unprepare_transfer(struct spi_master *spi)
         struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(spi);
 
         /* Free DMA channels */
-        dma_release_channel(sdd->rx_dma.ch);
-        dma_release_channel(sdd->tx_dma.ch);
+        if (!is_polling(sdd)) {
+                dma_release_channel(sdd->rx_dma.ch);
+                dma_release_channel(sdd->tx_dma.ch);
+        }
 
         pm_runtime_put(&sdd->pdev->dev);
         return 0;
@@ -558,14 +571,40 @@ static inline void enable_cs(struct s3c64xx_spi_driver_data *sdd,
                 if (sdd->tgl_spi != spi) { /* if last mssg on diff device */
                         /* Deselect the last toggled device */
                         cs = sdd->tgl_spi->controller_data;
-                        gpio_set_value(cs->line,
-                                spi->mode & SPI_CS_HIGH ? 0 : 1);
+                        if (sdd->cs_gpio)
+                                gpio_set_value(cs->line,
+                                        spi->mode & SPI_CS_HIGH ? 0 : 1);
                 }
                 sdd->tgl_spi = NULL;
         }
 
         cs = spi->controller_data;
-        gpio_set_value(cs->line, spi->mode & SPI_CS_HIGH ? 1 : 0);
+        if (sdd->cs_gpio)
+                gpio_set_value(cs->line, spi->mode & SPI_CS_HIGH ? 1 : 0);
+
+        /* Start the signals */
+        writel(0, sdd->regs + S3C64XX_SPI_SLAVE_SEL);
+}
+
+static u32 s3c64xx_spi_wait_for_timeout(struct s3c64xx_spi_driver_data *sdd,
+                                        int timeout_ms)
+{
+        void __iomem *regs = sdd->regs;
+        unsigned long val = 1;
+        u32 status;
+
+        /* max fifo depth available */
+        u32 max_fifo = (FIFO_LVL_MASK(sdd) >> 1) + 1;
+
+        if (timeout_ms)
+                val = msecs_to_loops(timeout_ms);
+
+        do {
+                status = readl(regs + S3C64XX_SPI_STATUS);
+        } while (RX_FIFO_LVL(status, sdd) < max_fifo && --val);
+
+        /* return the actual received data length */
+        return RX_FIFO_LVL(status, sdd);
 }
 
 static int wait_for_xfer(struct s3c64xx_spi_driver_data *sdd,
@@ -590,20 +629,19 @@ static int wait_for_xfer(struct s3c64xx_spi_driver_data *sdd,
                 } while (RX_FIFO_LVL(status, sdd) < xfer->len && --val);
         }
 
-        if (!val)
-                return -EIO;
-
         if (dma_mode) {
                 u32 status;
 
                 /*
+                 * If the previous xfer was completed within timeout, then
+                 * proceed further else return -EIO.
                  * DmaTx returns after simply writing data in the FIFO,
                  * w/o waiting for real transmission on the bus to finish.
                  * DmaRx returns only after Dma read data from FIFO which
                  * needs bus transmission to finish, so we don't worry if
                  * Xfer involved Rx(with or without Tx).
                  */
-                if (xfer->rx_buf == NULL) {
+                if (val && !xfer->rx_buf) {
                         val = msecs_to_loops(10);
                         status = readl(regs + S3C64XX_SPI_STATUS);
                         while ((TX_FIFO_LVL(status, sdd)
@@ -613,30 +651,54 @@ static int wait_for_xfer(struct s3c64xx_spi_driver_data *sdd,
                                 status = readl(regs + S3C64XX_SPI_STATUS);
                         }
 
-                        if (!val)
-                                return -EIO;
                 }
+
+                /* If timed out while checking rx/tx status return error */
+                if (!val)
+                        return -EIO;
         } else {
+                int loops;
+                u32 cpy_len;
+                u8 *buf;
+
                 /* If it was only Tx */
-                if (xfer->rx_buf == NULL) {
+                if (!xfer->rx_buf) {
                         sdd->state &= ~TXBUSY;
                         return 0;
                 }