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-rw-r--r--arch/openrisc/Kconfig1
-rw-r--r--arch/openrisc/include/asm/Kbuild3
-rw-r--r--arch/openrisc/include/asm/dma-mapping.h147
-rw-r--r--arch/openrisc/include/asm/elf.h12
-rw-r--r--arch/openrisc/include/asm/ptrace.h6
-rw-r--r--arch/openrisc/kernel/dma.c109
-rw-r--r--arch/openrisc/kernel/entry.S8
-rw-r--r--arch/openrisc/kernel/irq.c83
-rw-r--r--arch/openrisc/mm/fault.c32
9 files changed, 199 insertions, 202 deletions
diff --git a/arch/openrisc/Kconfig b/arch/openrisc/Kconfig
index a4787197d8fe..7589051e79e0 100644
--- a/arch/openrisc/Kconfig
+++ b/arch/openrisc/Kconfig
@@ -7,6 +7,7 @@ config OPENRISC
7 def_bool y 7 def_bool y
8 select OF 8 select OF
9 select OF_EARLY_FLATTREE 9 select OF_EARLY_FLATTREE
10 select IRQ_DOMAIN
10 select HAVE_MEMBLOCK 11 select HAVE_MEMBLOCK
11 select ARCH_WANT_OPTIONAL_GPIOLIB 12 select ARCH_WANT_OPTIONAL_GPIOLIB
12 select HAVE_ARCH_TRACEHOOK 13 select HAVE_ARCH_TRACEHOOK
diff --git a/arch/openrisc/include/asm/Kbuild b/arch/openrisc/include/asm/Kbuild
index dcea5a0308ae..c936483bc8e2 100644
--- a/arch/openrisc/include/asm/Kbuild
+++ b/arch/openrisc/include/asm/Kbuild
@@ -1,6 +1,7 @@
1include include/asm-generic/Kbuild.asm 1include include/asm-generic/Kbuild.asm
2 2
3header-y += spr_defs.h 3header-y += elf.h
4header-y += ucontext.h
4 5
5generic-y += atomic.h 6generic-y += atomic.h
6generic-y += auxvec.h 7generic-y += auxvec.h
diff --git a/arch/openrisc/include/asm/dma-mapping.h b/arch/openrisc/include/asm/dma-mapping.h
index b206ba4608b2..fab8628e1b6e 100644
--- a/arch/openrisc/include/asm/dma-mapping.h
+++ b/arch/openrisc/include/asm/dma-mapping.h
@@ -20,150 +20,71 @@
20/* 20/*
21 * See Documentation/DMA-API-HOWTO.txt and 21 * See Documentation/DMA-API-HOWTO.txt and
22 * Documentation/DMA-API.txt for documentation. 22 * Documentation/DMA-API.txt for documentation.
23 *
24 * This file is written with the intention of eventually moving over
25 * to largely using asm-generic/dma-mapping-common.h in its place.
26 */ 23 */
27 24
28#include <linux/dma-debug.h> 25#include <linux/dma-debug.h>
29#include <asm-generic/dma-coherent.h> 26#include <asm-generic/dma-coherent.h>
30#include <linux/kmemcheck.h> 27#include <linux/kmemcheck.h>
28#include <linux/dma-mapping.h>
31 29
32#define DMA_ERROR_CODE (~(dma_addr_t)0x0) 30#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
33 31
32extern struct dma_map_ops or1k_dma_map_ops;
34 33
35#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) 34static inline struct dma_map_ops *get_dma_ops(struct device *dev)
36#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
37
38void *or1k_dma_alloc_coherent(struct device *dev, size_t size,
39 dma_addr_t *dma_handle, gfp_t flag);
40void or1k_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
41 dma_addr_t dma_handle);
42dma_addr_t or1k_map_page(struct device *dev, struct page *page,
43 unsigned long offset, size_t size,
44 enum dma_data_direction dir,
45 struct dma_attrs *attrs);
46void or1k_unmap_page(struct device *dev, dma_addr_t dma_handle,
47 size_t size, enum dma_data_direction dir,
48 struct dma_attrs *attrs);
49int or1k_map_sg(struct device *dev, struct scatterlist *sg,
50 int nents, enum dma_data_direction dir,
51 struct dma_attrs *attrs);
52void or1k_unmap_sg(struct device *dev, struct scatterlist *sg,
53 int nents, enum dma_data_direction dir,
54 struct dma_attrs *attrs);
55void or1k_sync_single_for_cpu(struct device *dev,
56 dma_addr_t dma_handle, size_t size,
57 enum dma_data_direction dir);
58void or1k_sync_single_for_device(struct device *dev,
59 dma_addr_t dma_handle, size_t size,
60 enum dma_data_direction dir);
61
62static inline void *dma_alloc_coherent(struct device *dev, size_t size,
63 dma_addr_t *dma_handle, gfp_t flag)
64{ 35{
65 void *memory; 36 return &or1k_dma_map_ops;
66
67 memory = or1k_dma_alloc_coherent(dev, size, dma_handle, flag);
68
69 debug_dma_alloc_coherent(dev, size, *dma_handle, memory);
70 return memory;
71} 37}
72 38
73static inline void dma_free_coherent(struct device *dev, size_t size, 39#include <asm-generic/dma-mapping-common.h>
74 void *cpu_addr, dma_addr_t dma_handle)
75{
76 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
77 or1k_dma_free_coherent(dev, size, cpu_addr, dma_handle);
78}
79 40
80static inline dma_addr_t dma_map_single(struct device *dev, void *ptr, 41#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL)
81 size_t size,
82 enum dma_data_direction dir)
83{
84 dma_addr_t addr;
85
86 kmemcheck_mark_initialized(ptr, size);
87 BUG_ON(!valid_dma_direction(dir));
88 addr = or1k_map_page(dev, virt_to_page(ptr),
89 (unsigned long)ptr & ~PAGE_MASK, size,
90 dir, NULL);
91 debug_dma_map_page(dev, virt_to_page(ptr),
92 (unsigned long)ptr & ~PAGE_MASK, size,
93 dir, addr, true);
94 return addr;
95}
96 42
97static inline void dma_unmap_single(struct device *dev, dma_addr_t addr, 43static inline void *dma_alloc_attrs(struct device *dev, size_t size,
98 size_t size, 44 dma_addr_t *dma_handle, gfp_t gfp,
99 enum dma_data_direction dir) 45 struct dma_attrs *attrs)
100{ 46{
101 BUG_ON(!valid_dma_direction(dir)); 47 struct dma_map_ops *ops = get_dma_ops(dev);
102 or1k_unmap_page(dev, addr, size, dir, NULL); 48 void *memory;
103 debug_dma_unmap_page(dev, addr, size, dir, true);
104}
105 49
106static inline int dma_map_sg(struct device *dev, struct scatterlist *sg, 50 memory = ops->alloc(dev, size, dma_handle, gfp, attrs);
107 int nents, enum dma_data_direction dir)
108{
109 int i, ents;
110 struct scatterlist *s;
111 51
112 for_each_sg(sg, s, nents, i) 52 debug_dma_alloc_coherent(dev, size, *dma_handle, memory);
113 kmemcheck_mark_initialized(sg_virt(s), s->length);
114 BUG_ON(!valid_dma_direction(dir));
115 ents = or1k_map_sg(dev, sg, nents, dir, NULL);
116 debug_dma_map_sg(dev, sg, nents, ents, dir);
117 53
118 return ents; 54 return memory;
119} 55}
120 56
121static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg, 57#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)
122 int nents, enum dma_data_direction dir)
123{
124 BUG_ON(!valid_dma_direction(dir));
125 debug_dma_unmap_sg(dev, sg, nents, dir);
126 or1k_unmap_sg(dev, sg, nents, dir, NULL);
127}
128 58
129static inline dma_addr_t dma_map_page(struct device *dev, struct page *page, 59static inline void dma_free_attrs(struct device *dev, size_t size,
130 size_t offset, size_t size, 60 void *cpu_addr, dma_addr_t dma_handle,
131 enum dma_data_direction dir) 61 struct dma_attrs *attrs)
132{ 62{
133 dma_addr_t addr; 63 struct dma_map_ops *ops = get_dma_ops(dev);
134 64
135 kmemcheck_mark_initialized(page_address(page) + offset, size); 65 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
136 BUG_ON(!valid_dma_direction(dir));
137 addr = or1k_map_page(dev, page, offset, size, dir, NULL);
138 debug_dma_map_page(dev, page, offset, size, dir, addr, false);
139 66
140 return addr; 67 ops->free(dev, size, cpu_addr, dma_handle, attrs);
141} 68}
142 69
143static inline void dma_unmap_page(struct device *dev, dma_addr_t addr, 70static inline void *dma_alloc_noncoherent(struct device *dev, size_t size,
144 size_t size, enum dma_data_direction dir) 71 dma_addr_t *dma_handle, gfp_t gfp)
145{ 72{
146 BUG_ON(!valid_dma_direction(dir)); 73 struct dma_attrs attrs;
147 or1k_unmap_page(dev, addr, size, dir, NULL);
148 debug_dma_unmap_page(dev, addr, size, dir, true);
149}
150 74
151static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, 75 dma_set_attr(DMA_ATTR_NON_CONSISTENT, &attrs);
152 size_t size, 76
153 enum dma_data_direction dir) 77 return dma_alloc_attrs(dev, size, dma_handle, gfp, &attrs);
154{
155 BUG_ON(!valid_dma_direction(dir));
156 or1k_sync_single_for_cpu(dev, addr, size, dir);
157 debug_dma_sync_single_for_cpu(dev, addr, size, dir);
158} 78}
159 79
160static inline void dma_sync_single_for_device(struct device *dev, 80static inline void dma_free_noncoherent(struct device *dev, size_t size,
161 dma_addr_t addr, size_t size, 81 void *cpu_addr, dma_addr_t dma_handle)
162 enum dma_data_direction dir)
163{ 82{
164 BUG_ON(!valid_dma_direction(dir)); 83 struct dma_attrs attrs;
165 or1k_sync_single_for_device(dev, addr, size, dir); 84
166 debug_dma_sync_single_for_device(dev, addr, size, dir); 85 dma_set_attr(DMA_ATTR_NON_CONSISTENT, &attrs);
86
87 dma_free_attrs(dev, size, cpu_addr, dma_handle, &attrs);
167} 88}
168 89
169static inline int dma_supported(struct device *dev, u64 dma_mask) 90static inline int dma_supported(struct device *dev, u64 dma_mask)
diff --git a/arch/openrisc/include/asm/elf.h b/arch/openrisc/include/asm/elf.h
index 2ce603bbfdd3..a8fe2c513070 100644
--- a/arch/openrisc/include/asm/elf.h
+++ b/arch/openrisc/include/asm/elf.h
@@ -20,11 +20,17 @@
20#define __ASM_OPENRISC_ELF_H 20#define __ASM_OPENRISC_ELF_H
21 21
22/* 22/*
23 * This files is partially exported to userspace. This allows us to keep
24 * the ELF bits in one place which should assist in keeping the kernel and
25 * userspace in sync.
26 */
27
28/*
23 * ELF register definitions.. 29 * ELF register definitions..
24 */ 30 */
25#include <linux/types.h>
26#include <linux/ptrace.h>
27 31
32/* for struct user_regs_struct definition */
33#include <asm/ptrace.h>
28 34
29/* The OR1K relocation types... not all relevant for module loader */ 35/* The OR1K relocation types... not all relevant for module loader */
30#define R_OR32_NONE 0 36#define R_OR32_NONE 0
@@ -62,6 +68,8 @@ typedef unsigned long elf_fpregset_t;
62 68
63#ifdef __KERNEL__ 69#ifdef __KERNEL__
64 70
71#include <linux/types.h>
72
65/* 73/*
66 * This is used to ensure we don't load something for the wrong architecture. 74 * This is used to ensure we don't load something for the wrong architecture.
67 */ 75 */
diff --git a/arch/openrisc/include/asm/ptrace.h b/arch/openrisc/include/asm/ptrace.h
index 4651a737591d..8555c0c3d4d7 100644
--- a/arch/openrisc/include/asm/ptrace.h
+++ b/arch/openrisc/include/asm/ptrace.h
@@ -19,8 +19,6 @@
19#ifndef __ASM_OPENRISC_PTRACE_H 19#ifndef __ASM_OPENRISC_PTRACE_H
20#define __ASM_OPENRISC_PTRACE_H 20#define __ASM_OPENRISC_PTRACE_H
21 21
22#include <asm/spr_defs.h>
23
24#ifndef __ASSEMBLY__ 22#ifndef __ASSEMBLY__
25/* 23/*
26 * This is the layout of the regset returned by the GETREGSET ptrace call 24 * This is the layout of the regset returned by the GETREGSET ptrace call
@@ -30,13 +28,13 @@ struct user_regs_struct {
30 unsigned long gpr[32]; 28 unsigned long gpr[32];
31 unsigned long pc; 29 unsigned long pc;
32 unsigned long sr; 30 unsigned long sr;
33 unsigned long pad1;
34 unsigned long pad2;
35}; 31};
36#endif 32#endif
37 33
38#ifdef __KERNEL__ 34#ifdef __KERNEL__
39 35
36#include <asm/spr_defs.h>
37
40/* 38/*
41 * Make kernel PTrace/register structures opaque to userspace... userspace can 39 * Make kernel PTrace/register structures opaque to userspace... userspace can
42 * access thread state via the regset mechanism. This allows us a bit of 40 * access thread state via the regset mechanism. This allows us a bit of
diff --git a/arch/openrisc/kernel/dma.c b/arch/openrisc/kernel/dma.c
index f1c8ee2895d0..0b77ddb1ee07 100644
--- a/arch/openrisc/kernel/dma.c
+++ b/arch/openrisc/kernel/dma.c
@@ -21,13 +21,16 @@
21 21
22#include <linux/dma-mapping.h> 22#include <linux/dma-mapping.h>
23#include <linux/dma-debug.h> 23#include <linux/dma-debug.h>
24#include <linux/export.h>
25#include <linux/dma-attrs.h>
24 26
25#include <asm/cpuinfo.h> 27#include <asm/cpuinfo.h>
26#include <asm/spr_defs.h> 28#include <asm/spr_defs.h>
27#include <asm/tlbflush.h> 29#include <asm/tlbflush.h>
28 30
29static int page_set_nocache(pte_t *pte, unsigned long addr, 31static int
30 unsigned long next, struct mm_walk *walk) 32page_set_nocache(pte_t *pte, unsigned long addr,
33 unsigned long next, struct mm_walk *walk)
31{ 34{
32 unsigned long cl; 35 unsigned long cl;
33 36
@@ -46,8 +49,9 @@ static int page_set_nocache(pte_t *pte, unsigned long addr,
46 return 0; 49 return 0;
47} 50}
48 51
49static int page_clear_nocache(pte_t *pte, unsigned long addr, 52static int
50 unsigned long next, struct mm_walk *walk) 53page_clear_nocache(pte_t *pte, unsigned long addr,
54 unsigned long next, struct mm_walk *walk)
51{ 55{
52 pte_val(*pte) &= ~_PAGE_CI; 56 pte_val(*pte) &= ~_PAGE_CI;
53 57
@@ -67,9 +71,19 @@ static int page_clear_nocache(pte_t *pte, unsigned long addr,
67 * cache-inhibit bit on those pages, and makes sure that the pages are 71 * cache-inhibit bit on those pages, and makes sure that the pages are
68 * flushed out of the cache before they are used. 72 * flushed out of the cache before they are used.
69 * 73 *
74 * If the NON_CONSISTENT attribute is set, then this function just
75 * returns "normal", cachable memory.
76 *
77 * There are additional flags WEAK_ORDERING and WRITE_COMBINE to take
78 * into consideration here, too. All current known implementations of
79 * the OR1K support only strongly ordered memory accesses, so that flag
80 * is being ignored for now; uncached but write-combined memory is a
81 * missing feature of the OR1K.
70 */ 82 */
71void *or1k_dma_alloc_coherent(struct device *dev, size_t size, 83static void *
72 dma_addr_t *dma_handle, gfp_t gfp) 84or1k_dma_alloc(struct device *dev, size_t size,
85 dma_addr_t *dma_handle, gfp_t gfp,
86 struct dma_attrs *attrs)
73{ 87{
74 unsigned long va; 88 unsigned long va;
75 void *page; 89 void *page;
@@ -87,20 +101,23 @@ void *or1k_dma_alloc_coherent(struct device *dev, size_t size,
87 101
88 va = (unsigned long)page; 102 va = (unsigned long)page;
89 103
90 /* 104 if (!dma_get_attr(DMA_ATTR_NON_CONSISTENT, attrs)) {
91 * We need to iterate through the pages, clearing the dcache for 105 /*
92 * them and setting the cache-inhibit bit. 106 * We need to iterate through the pages, clearing the dcache for
93 */ 107 * them and setting the cache-inhibit bit.
94 if (walk_page_range(va, va + size, &walk)) { 108 */
95 free_pages_exact(page, size); 109 if (walk_page_range(va, va + size, &walk)) {
96 return NULL; 110 free_pages_exact(page, size);
111 return NULL;
112 }
97 } 113 }
98 114
99 return (void *)va; 115 return (void *)va;
100} 116}
101 117
102void or1k_dma_free_coherent(struct device *dev, size_t size, void *vaddr, 118static void
103 dma_addr_t dma_handle) 119or1k_dma_free(struct device *dev, size_t size, void *vaddr,
120 dma_addr_t dma_handle, struct dma_attrs *attrs)
104{ 121{
105 unsigned long va = (unsigned long)vaddr; 122 unsigned long va = (unsigned long)vaddr;
106 struct mm_walk walk = { 123 struct mm_walk walk = {
@@ -108,16 +125,19 @@ void or1k_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
108 .mm = &init_mm 125 .mm = &init_mm
109 }; 126 };
110 127
111 /* walk_page_range shouldn't be able to fail here */ 128 if (!dma_get_attr(DMA_ATTR_NON_CONSISTENT, attrs)) {
112 WARN_ON(walk_page_range(va, va + size, &walk)); 129 /* walk_page_range shouldn't be able to fail here */
130 WARN_ON(walk_page_range(va, va + size, &walk));
131 }
113 132
114 free_pages_exact(vaddr, size); 133 free_pages_exact(vaddr, size);
115} 134}
116 135
117dma_addr_t or1k_map_page(struct device *dev, struct page *page, 136static dma_addr_t
118 unsigned long offset, size_t size, 137or1k_map_page(struct device *dev, struct page *page,
119 enum dma_data_direction dir, 138 unsigned long offset, size_t size,
120 struct dma_attrs *attrs) 139 enum dma_data_direction dir,
140 struct dma_attrs *attrs)
121{ 141{
122 unsigned long cl; 142 unsigned long cl;
123 dma_addr_t addr = page_to_phys(page) + offset; 143 dma_addr_t addr = page_to_phys(page) + offset;
@@ -147,16 +167,18 @@ dma_addr_t or1k_map_page(struct device *dev, struct page *page,
147 return addr; 167 return addr;
148} 168}
149 169
150void or1k_unmap_page(struct device *dev, dma_addr_t dma_handle, 170static void
151 size_t size, enum dma_data_direction dir, 171or1k_unmap_page(struct device *dev, dma_addr_t dma_handle,
152 struct dma_attrs *attrs) 172 size_t size, enum dma_data_direction dir,
173 struct dma_attrs *attrs)
153{ 174{
154 /* Nothing special to do here... */ 175 /* Nothing special to do here... */
155} 176}
156 177
157int or1k_map_sg(struct device *dev, struct scatterlist *sg, 178static int
158 int nents, enum dma_data_direction dir, 179or1k_map_sg(struct device *dev, struct scatterlist *sg,
159 struct dma_attrs *attrs) 180 int nents, enum dma_data_direction dir,
181 struct dma_attrs *attrs)
160{ 182{
161 struct scatterlist *s; 183 struct scatterlist *s;
162 int i; 184 int i;
@@ -169,9 +191,10 @@ int or1k_map_sg(struct device *dev, struct scatterlist *sg,
169 return nents; 191 return nents;
170} 192}
171 193
172void or1k_unmap_sg(struct device *dev, struct scatterlist *sg, 194static void
173 int nents, enum dma_data_direction dir, 195or1k_unmap_sg(struct device *dev, struct scatterlist *sg,
174 struct dma_attrs *attrs) 196 int nents, enum dma_data_direction dir,
197 struct dma_attrs *attrs)
175{ 198{
176 struct scatterlist *s; 199 struct scatterlist *s;
177 int i; 200 int i;
@@ -181,9 +204,10 @@ void or1k_unmap_sg(struct device *dev, struct scatterlist *sg,
181 } 204 }
182} 205}
183 206
184void or1k_sync_single_for_cpu(struct device *dev, 207static void
185 dma_addr_t dma_handle, size_t size, 208or1k_sync_single_for_cpu(struct device *dev,
186 enum dma_data_direction dir) 209 dma_addr_t dma_handle, size_t size,
210 enum dma_data_direction dir)
187{ 211{
188 unsigned long cl; 212 unsigned long cl;
189 dma_addr_t addr = dma_handle; 213 dma_addr_t addr = dma_handle;
@@ -193,9 +217,10 @@ void or1k_sync_single_for_cpu(struct device *dev,
193 mtspr(SPR_DCBIR, cl); 217 mtspr(SPR_DCBIR, cl);
194} 218}
195 219
196void or1k_sync_single_for_device(struct device *dev, 220static void
197 dma_addr_t dma_handle, size_t size, 221or1k_sync_single_for_device(struct device *dev,
198 enum dma_data_direction dir) 222 dma_addr_t dma_handle, size_t size,
223 enum dma_data_direction dir)
199{ 224{
200 unsigned long cl; 225 unsigned long cl;
201 dma_addr_t addr = dma_handle; 226 dma_addr_t addr = dma_handle;
@@ -205,6 +230,18 @@ void or1k_sync_single_for_device(struct device *dev,
205 mtspr(SPR_DCBFR, cl); 230 mtspr(SPR_DCBFR, cl);
206} 231}
207 232
233struct dma_map_ops or1k_dma_map_ops = {
234 .alloc = or1k_dma_alloc,
235 .free = or1k_dma_free,
236 .map_page = or1k_map_page,
237 .unmap_page = or1k_unmap_page,
238 .map_sg = or1k_map_sg,
239 .unmap_sg = or1k_unmap_sg,
240 .sync_single_for_cpu = or1k_sync_single_for_cpu,
241 .sync_single_for_device = or1k_sync_single_for_device,
242};
243EXPORT_SYMBOL(or1k_dma_map_ops);
244
208/* Number of entries preallocated for DMA-API debugging */ 245/* Number of entries preallocated for DMA-API debugging */
209#define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16) 246#define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16)
210 247
diff --git a/arch/openrisc/kernel/entry.S b/arch/openrisc/kernel/entry.S
index 6e61af8682b8..ddfcaa828b0e 100644
--- a/arch/openrisc/kernel/entry.S
+++ b/arch/openrisc/kernel/entry.S
@@ -1117,10 +1117,10 @@ ENTRY(sys_rt_sigreturn)
1117ENTRY(sys_or1k_atomic) 1117ENTRY(sys_or1k_atomic)
1118 /* FIXME: This ignores r3 and always does an XCHG */ 1118 /* FIXME: This ignores r3 and always does an XCHG */
1119 DISABLE_INTERRUPTS(r17,r19) 1119 DISABLE_INTERRUPTS(r17,r19)
1120 l.lwz r30,0(r4) 1120 l.lwz r29,0(r4)
1121 l.lwz r28,0(r5) 1121 l.lwz r27,0(r5)
1122 l.sw 0(r4),r28 1122 l.sw 0(r4),r27
1123 l.sw 0(r5),r30 1123 l.sw 0(r5),r29
1124 ENABLE_INTERRUPTS(r17) 1124 ENABLE_INTERRUPTS(r17)
1125 l.jr r9 1125 l.jr r9
1126 l.or r11,r0,r0 1126 l.or r11,r0,r0
diff --git a/arch/openrisc/kernel/irq.c b/arch/openrisc/kernel/irq.c
index 4bfead220956..e935b9d8eee1 100644
--- a/arch/openrisc/kernel/irq.c
+++ b/arch/openrisc/kernel/irq.c
@@ -14,17 +14,13 @@
14 * 2 of the License, or (at your option) any later version. 14 * 2 of the License, or (at your option) any later version.
15 */ 15 */
16 16
17#include <linux/ptrace.h>
18#include <linux/errno.h>
19#include <linux/interrupt.h> 17#include <linux/interrupt.h>
20#include <linux/init.h> 18#include <linux/init.h>
21#include <linux/of.h> 19#include <linux/of.h>
22#include <linux/ftrace.h> 20#include <linux/ftrace.h>
23#include <linux/irq.h> 21#include <linux/irq.h>
24#include <linux/seq_file.h>
25#include <linux/kernel_stat.h>
26#include <linux/export.h> 22#include <linux/export.h>
27 23#include <linux/irqdomain.h>
28#include <linux/irqflags.h> 24#include <linux/irqflags.h>
29 25
30/* read interrupt enabled status */ 26/* read interrupt enabled status */
@@ -98,6 +94,7 @@ static void or1k_pic_mask_ack(struct irq_data *data)
98#endif 94#endif
99} 95}
100 96
97#if 0
101static int or1k_pic_set_type(struct irq_data *data, unsigned int flow_type) 98static int or1k_pic_set_type(struct irq_data *data, unsigned int flow_type)
102{ 99{
103 /* There's nothing to do in the PIC configuration when changing 100 /* There's nothing to do in the PIC configuration when changing
@@ -107,43 +104,64 @@ static int or1k_pic_set_type(struct irq_data *data, unsigned int flow_type)
107 104
108 return irq_setup_alt_chip(data, flow_type); 105 return irq_setup_alt_chip(data, flow_type);
109} 106}
107#endif
108
109static struct irq_chip or1k_dev = {
110 .name = "or1k-PIC",
111 .irq_unmask = or1k_pic_unmask,
112 .irq_mask = or1k_pic_mask,
113 .irq_ack = or1k_pic_ack,
114 .irq_mask_ack = or1k_pic_mask_ack,
115};
116
117static struct irq_domain *root_domain;
110 118
111static inline int pic_get_irq(int first) 119static inline int pic_get_irq(int first)
112{ 120{
113 int irq; 121 int hwirq;
114 122
115 irq = ffs(mfspr(SPR_PICSR) >> first); 123 hwirq = ffs(mfspr(SPR_PICSR) >> first);
124 if (!hwirq)
125 return NO_IRQ;
126 else
127 hwirq = hwirq + first -1;
116 128
117 return irq ? irq + first - 1 : NO_IRQ; 129 return irq_find_mapping(root_domain, hwirq);
118} 130}
119 131
120static void __init or1k_irq_init(void) 132
133static int or1k_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
121{ 134{
122 struct irq_chip_generic *gc; 135 irq_set_chip_and_handler_name(irq, &or1k_dev,
123 struct irq_chip_type *ct; 136 handle_level_irq, "level");
137 irq_set_status_flags(irq, IRQ_LEVEL | IRQ_NOPROBE);
124 138
125 /* Disable all interrupts until explicitly requested */ 139 return 0;
126 mtspr(SPR_PICMR, (0UL)); 140}
127 141
128 gc = irq_alloc_generic_chip("or1k-PIC", 1, 0, 0, handle_level_irq); 142static const struct irq_domain_ops or1k_irq_domain_ops = {
129 ct = gc->chip_types; 143 .xlate = irq_domain_xlate_onecell,
144 .map = or1k_map,
145};
130 146
131 ct->chip.irq_unmask = or1k_pic_unmask; 147/*
132 ct->chip.irq_mask = or1k_pic_mask; 148 * This sets up the IRQ domain for the PIC built in to the OpenRISC
133 ct->chip.irq_ack = or1k_pic_ack; 149 * 1000 CPU. This is the "root" domain as these are the interrupts
134 ct->chip.irq_mask_ack = or1k_pic_mask_ack; 150 * that directly trigger an exception in the CPU.
135 ct->chip.irq_set_type = or1k_pic_set_type; 151 */
152static void __init or1k_irq_init(void)
153{
154 struct device_node *intc = NULL;
136 155
137 /* The OR1K PIC can handle both level and edge trigged 156 /* The interrupt controller device node is mandatory */
138 * interrupts in roughly the same manner 157 intc = of_find_compatible_node(NULL, NULL, "opencores,or1k-pic");
139 */ 158 BUG_ON(!intc);
140#if 0
141 /* FIXME: chip.type??? */
142 ct->chip.type = IRQ_TYPE_EDGE_BOTH | IRQ_TYPE_LEVEL_MASK;
143#endif
144 159
145 irq_setup_generic_chip(gc, IRQ_MSK(NR_IRQS), 0, 160 /* Disable all interrupts until explicitly requested */
146 IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE); 161 mtspr(SPR_PICMR, (0UL));
162
163 root_domain = irq_domain_add_linear(intc, 32,
164 &or1k_irq_domain_ops, NULL);
147} 165}
148 166
149void __init init_IRQ(void) 167void __init init_IRQ(void)
@@ -164,10 +182,3 @@ void __irq_entry do_IRQ(struct pt_regs *regs)
164 irq_exit(); 182 irq_exit();
165 set_irq_regs(old_regs); 183 set_irq_regs(old_regs);
166} 184}
167
168unsigned int irq_create_of_mapping(struct device_node *controller,
169 const u32 *intspec, unsigned int intsize)
170{
171 return intspec[0];
172}
173EXPORT_SYMBOL_GPL(irq_create_of_mapping);
diff --git a/arch/openrisc/mm/fault.c b/arch/openrisc/mm/fault.c
index a5dce82f864b..40f850e9766c 100644
--- a/arch/openrisc/mm/fault.c
+++ b/arch/openrisc/mm/fault.c
@@ -54,6 +54,7 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long address,
54 struct vm_area_struct *vma; 54 struct vm_area_struct *vma;
55 siginfo_t info; 55 siginfo_t info;
56 int fault; 56 int fault;
57 unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
57 58
58 tsk = current; 59 tsk = current;
59 60
@@ -105,6 +106,7 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long address,
105 if (in_interrupt() || !mm) 106 if (in_interrupt() || !mm)
106 goto no_context; 107 goto no_context;
107 108
109retry:
108 down_read(&mm->mmap_sem); 110 down_read(&mm->mmap_sem);
109 vma = find_vma(mm, address); 111 vma = find_vma(mm, address);
110 112
@@ -143,6 +145,7 @@ good_area:
143 if (write_acc) { 145 if (write_acc) {
144 if (!(vma->vm_flags & VM_WRITE)) 146 if (!(vma->vm_flags & VM_WRITE))
145 goto bad_area; 147 goto bad_area;
148 flags |= FAULT_FLAG_WRITE;
146 } else { 149 } else {
147 /* not present */ 150 /* not present */
148 if (!(vma->vm_flags & (VM_READ | VM_EXEC))) 151 if (!(vma->vm_flags & (VM_READ | VM_EXEC)))
@@ -159,7 +162,11 @@ good_area:
159 * the fault. 162 * the fault.
160 */ 163 */
161 164
162 fault = handle_mm_fault(mm, vma, address, write_acc); 165 fault = handle_mm_fault(mm, vma, address, flags);
166
167 if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
168 return;
169
163 if (unlikely(fault & VM_FAULT_ERROR)) { 170 if (unlikely(fault & VM_FAULT_ERROR)) {
164 if (fault & VM_FAULT_OOM) 171 if (fault & VM_FAULT_OOM)
165 goto out_of_memory; 172 goto out_of_memory;
@@ -167,11 +174,24 @@ good_area:
167 goto do_sigbus; 174 goto do_sigbus;
168 BUG(); 175 BUG();
169 } 176 }
170 /*RGD modeled on Cris */ 177
171 if (fault & VM_FAULT_MAJOR) 178 if (flags & FAULT_FLAG_ALLOW_RETRY) {
172 tsk->maj_flt++; 179 /*RGD modeled on Cris */
173 else 180 if (fault & VM_FAULT_MAJOR)
174 tsk->min_flt++; 181 tsk->maj_flt++;
182 else
183 tsk->min_flt++;
184 if (fault & VM_FAULT_RETRY) {
185 flags &= ~FAULT_FLAG_ALLOW_RETRY;
186
187 /* No need to up_read(&mm->mmap_sem) as we would
188 * have already released it in __lock_page_or_retry
189 * in mm/filemap.c.
190 */
191
192 goto retry;
193 }
194 }
175 195
176 up_read(&mm->mmap_sem); 196 up_read(&mm->mmap_sem);
177 return; 197 return;
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-13 11:29:11 -0400