2 files changed, 5 insertions, 2 deletions

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index ba86dc330547..b051a238baf9 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -295,8 +295,10 @@ void gen6_enable_rps_interrupts(struct drm_device *dev)
 u32 gen6_sanitize_rps_pm_mask(struct drm_i915_private *dev_priv, u32 mask)
 {
         /*
-         * IVB and SNB hard hangs on looping batchbuffer
+         * SNB,IVB can while VLV,CHV may hard hang on looping batchbuffer
          * if GEN6_PM_UP_EI_EXPIRED is masked.
+         *
+         * TODO: verify if this can be reproduced on VLV,CHV.
          */
         if (INTEL_INFO(dev_priv)->gen <= 7 && !IS_HASWELL(dev_priv))
                 mask &= ~GEN6_PM_RP_UP_EI_EXPIRED;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 3801ff59595f..bf814a64582a 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4432,7 +4432,8 @@ static void vlv_set_rps_idle(struct drm_i915_private *dev_priv)
                 return;
 
         /* Mask turbo interrupt so that they will not come in between */
-        I915_WRITE(GEN6_PMINTRMSK, 0xffffffff);
+        I915_WRITE(GEN6_PMINTRMSK,
+                   gen6_sanitize_rps_pm_mask(dev_priv, ~0));
 
         vlv_force_gfx_clock(dev_priv, true);