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-rw-r--r--drivers/mmc/core/core.c32
-rw-r--r--drivers/mmc/core/core.h1
-rw-r--r--drivers/mmc/core/sd.c36
-rw-r--r--drivers/mmc/host/sdhci.c192
-rw-r--r--drivers/mmc/host/sdhci.h18
-rw-r--r--include/linux/mmc/host.h15
-rw-r--r--include/linux/mmc/sd.h7
7 files changed, 284 insertions, 17 deletions
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 1dbc18576219..5005a6323165 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -942,6 +942,38 @@ u32 mmc_select_voltage(struct mmc_host *host, u32 ocr)
942 return ocr; 942 return ocr;
943} 943}
944 944
945int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage)
946{
947 struct mmc_command cmd = {0};
948 int err = 0;
949
950 BUG_ON(!host);
951
952 /*
953 * Send CMD11 only if the request is to switch the card to
954 * 1.8V signalling.
955 */
956 if (signal_voltage == MMC_SIGNAL_VOLTAGE_180) {
957 cmd.opcode = SD_SWITCH_VOLTAGE;
958 cmd.arg = 0;
959 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
960
961 err = mmc_wait_for_cmd(host, &cmd, 0);
962 if (err)
963 return err;
964
965 if (!mmc_host_is_spi(host) && (cmd.resp[0] & R1_ERROR))
966 return -EIO;
967 }
968
969 host->ios.signal_voltage = signal_voltage;
970
971 if (host->ops->start_signal_voltage_switch)
972 err = host->ops->start_signal_voltage_switch(host, &host->ios);
973
974 return err;
975}
976
945/* 977/*
946 * Select timing parameters for host. 978 * Select timing parameters for host.
947 */ 979 */
diff --git a/drivers/mmc/core/core.h b/drivers/mmc/core/core.h
index ca1fdde29df6..7745dea430b8 100644
--- a/drivers/mmc/core/core.h
+++ b/drivers/mmc/core/core.h
@@ -41,6 +41,7 @@ void mmc_set_bus_width(struct mmc_host *host, unsigned int width);
41void mmc_set_bus_width_ddr(struct mmc_host *host, unsigned int width, 41void mmc_set_bus_width_ddr(struct mmc_host *host, unsigned int width,
42 unsigned int ddr); 42 unsigned int ddr);
43u32 mmc_select_voltage(struct mmc_host *host, u32 ocr); 43u32 mmc_select_voltage(struct mmc_host *host, u32 ocr);
44int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage);
44void mmc_set_timing(struct mmc_host *host, unsigned int timing); 45void mmc_set_timing(struct mmc_host *host, unsigned int timing);
45 46
46static inline void mmc_delay(unsigned int ms) 47static inline void mmc_delay(unsigned int ms)
diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c
index 6dac89fe0535..b0cd285d272a 100644
--- a/drivers/mmc/core/sd.c
+++ b/drivers/mmc/core/sd.c
@@ -403,6 +403,7 @@ struct device_type sd_type = {
403int mmc_sd_get_cid(struct mmc_host *host, u32 ocr, u32 *cid) 403int mmc_sd_get_cid(struct mmc_host *host, u32 ocr, u32 *cid)
404{ 404{
405 int err; 405 int err;
406 u32 rocr;
406 407
407 /* 408 /*
408 * Since we're changing the OCR value, we seem to 409 * Since we're changing the OCR value, we seem to
@@ -420,12 +421,38 @@ int mmc_sd_get_cid(struct mmc_host *host, u32 ocr, u32 *cid)
420 */ 421 */
421 err = mmc_send_if_cond(host, ocr); 422 err = mmc_send_if_cond(host, ocr);
422 if (!err) 423 if (!err)
423 ocr |= 1 << 30; 424 ocr |= SD_OCR_CCS;
424 425
425 err = mmc_send_app_op_cond(host, ocr, NULL); 426 /*
427 * If the host supports one of UHS-I modes, request the card
428 * to switch to 1.8V signaling level.
429 */
430 if (host->caps & (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 |
431 MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | MMC_CAP_UHS_DDR50))
432 ocr |= SD_OCR_S18R;
433
434 /* If the host can supply more than 150mA, XPC should be set to 1. */
435 if (host->caps & (MMC_CAP_SET_XPC_330 | MMC_CAP_SET_XPC_300 |
436 MMC_CAP_SET_XPC_180))
437 ocr |= SD_OCR_XPC;
438
439try_again:
440 err = mmc_send_app_op_cond(host, ocr, &rocr);
426 if (err) 441 if (err)
427 return err; 442 return err;
428 443
444 /*
445 * In case CCS and S18A in the response is set, start Signal Voltage
446 * Switch procedure. SPI mode doesn't support CMD11.
447 */
448 if (!mmc_host_is_spi(host) && ((rocr & 0x41000000) == 0x41000000)) {
449 err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180);
450 if (err) {
451 ocr &= ~SD_OCR_S18R;
452 goto try_again;
453 }
454 }
455
429 if (mmc_host_is_spi(host)) 456 if (mmc_host_is_spi(host))
430 err = mmc_send_cid(host, cid); 457 err = mmc_send_cid(host, cid);
431 else 458 else
@@ -773,6 +800,11 @@ int mmc_attach_sd(struct mmc_host *host)
773 BUG_ON(!host); 800 BUG_ON(!host);
774 WARN_ON(!host->claimed); 801 WARN_ON(!host->claimed);
775 802
803 /* Make sure we are at 3.3V signalling voltage */
804 err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330);
805 if (err)
806 return err;
807
776 err = mmc_send_app_op_cond(host, 0, &ocr); 808 err = mmc_send_app_op_cond(host, 0, &ocr);
777 if (err) 809 if (err)
778 return err; 810 return err;
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index e5cfe70dc23b..4e2031449a23 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -83,6 +83,8 @@ static void sdhci_dumpregs(struct sdhci_host *host)
83 printk(KERN_DEBUG DRIVER_NAME ": Cmd: 0x%08x | Max curr: 0x%08x\n", 83 printk(KERN_DEBUG DRIVER_NAME ": Cmd: 0x%08x | Max curr: 0x%08x\n",
84 sdhci_readw(host, SDHCI_COMMAND), 84 sdhci_readw(host, SDHCI_COMMAND),
85 sdhci_readl(host, SDHCI_MAX_CURRENT)); 85 sdhci_readl(host, SDHCI_MAX_CURRENT));
86 printk(KERN_DEBUG DRIVER_NAME ": Host ctl2: 0x%08x\n",
87 sdhci_readw(host, SDHCI_HOST_CONTROL2));
86 88
87 if (host->flags & SDHCI_USE_ADMA) 89 if (host->flags & SDHCI_USE_ADMA)
88 printk(KERN_DEBUG DRIVER_NAME ": ADMA Err: 0x%08x | ADMA Ptr: 0x%08x\n", 90 printk(KERN_DEBUG DRIVER_NAME ": ADMA Err: 0x%08x | ADMA Ptr: 0x%08x\n",
@@ -1323,11 +1325,114 @@ out:
1323 spin_unlock_irqrestore(&host->lock, flags); 1325 spin_unlock_irqrestore(&host->lock, flags);
1324} 1326}
1325 1327
1328static int sdhci_start_signal_voltage_switch(struct mmc_host *mmc,
1329 struct mmc_ios *ios)
1330{
1331 struct sdhci_host *host;
1332 u8 pwr;
1333 u16 clk, ctrl;
1334 u32 present_state;
1335
1336 host = mmc_priv(mmc);
1337
1338 /*
1339 * Signal Voltage Switching is only applicable for Host Controllers
1340 * v3.00 and above.
1341 */
1342 if (host->version < SDHCI_SPEC_300)
1343 return 0;
1344
1345 /*
1346 * We first check whether the request is to set signalling voltage
1347 * to 3.3V. If so, we change the voltage to 3.3V and return quickly.
1348 */
1349 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
1350 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) {
1351 /* Set 1.8V Signal Enable in the Host Control2 register to 0 */
1352 ctrl &= ~SDHCI_CTRL_VDD_180;
1353 sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2);
1354
1355 /* Wait for 5ms */
1356 usleep_range(5000, 5500);
1357
1358 /* 3.3V regulator output should be stable within 5 ms */
1359 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
1360 if (!(ctrl & SDHCI_CTRL_VDD_180))
1361 return 0;
1362 else {
1363 printk(KERN_INFO DRIVER_NAME ": Switching to 3.3V "
1364 "signalling voltage failed\n");
1365 return -EIO;
1366 }
1367 } else if (!(ctrl & SDHCI_CTRL_VDD_180) &&
1368 (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_180)) {
1369 /* Stop SDCLK */
1370 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
1371 clk &= ~SDHCI_CLOCK_CARD_EN;
1372 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
1373
1374 /* Check whether DAT[3:0] is 0000 */
1375 present_state = sdhci_readl(host, SDHCI_PRESENT_STATE);
1376 if (!((present_state & SDHCI_DATA_LVL_MASK) >>
1377 SDHCI_DATA_LVL_SHIFT)) {
1378 /*
1379 * Enable 1.8V Signal Enable in the Host Control2
1380 * register
1381 */
1382 ctrl |= SDHCI_CTRL_VDD_180;
1383 sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2);
1384
1385 /* Wait for 5ms */
1386 usleep_range(5000, 5500);
1387
1388 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
1389 if (ctrl & SDHCI_CTRL_VDD_180) {
1390 /* Provide SDCLK again and wait for 1ms*/
1391 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
1392 clk |= SDHCI_CLOCK_CARD_EN;
1393 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
1394 usleep_range(1000, 1500);
1395
1396 /*
1397 * If DAT[3:0] level is 1111b, then the card
1398 * was successfully switched to 1.8V signaling.
1399 */
1400 present_state = sdhci_readl(host,
1401 SDHCI_PRESENT_STATE);
1402 if ((present_state & SDHCI_DATA_LVL_MASK) ==
1403 SDHCI_DATA_LVL_MASK)
1404 return 0;
1405 }
1406 }
1407
1408 /*
1409 * If we are here, that means the switch to 1.8V signaling
1410 * failed. We power cycle the card, and retry initialization
1411 * sequence by setting S18R to 0.
1412 */
1413 pwr = sdhci_readb(host, SDHCI_POWER_CONTROL);
1414 pwr &= ~SDHCI_POWER_ON;
1415 sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
1416
1417 /* Wait for 1ms as per the spec */
1418 usleep_range(1000, 1500);
1419 pwr |= SDHCI_POWER_ON;
1420 sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
1421
1422 printk(KERN_INFO DRIVER_NAME ": Switching to 1.8V signalling "
1423 "voltage failed, retrying with S18R set to 0\n");
1424 return -EAGAIN;
1425 } else
1426 /* No signal voltage switch required */
1427 return 0;
1428}
1429
1326static const struct mmc_host_ops sdhci_ops = { 1430static const struct mmc_host_ops sdhci_ops = {
1327 .request = sdhci_request, 1431 .request = sdhci_request,
1328 .set_ios = sdhci_set_ios, 1432 .set_ios = sdhci_set_ios,
1329 .get_ro = sdhci_get_ro, 1433 .get_ro = sdhci_get_ro,
1330 .enable_sdio_irq = sdhci_enable_sdio_irq, 1434 .enable_sdio_irq = sdhci_enable_sdio_irq,
1435 .start_signal_voltage_switch = sdhci_start_signal_voltage_switch,
1331}; 1436};
1332 1437
1333/*****************************************************************************\ 1438/*****************************************************************************\
@@ -1808,7 +1913,9 @@ EXPORT_SYMBOL_GPL(sdhci_alloc_host);
1808int sdhci_add_host(struct sdhci_host *host) 1913int sdhci_add_host(struct sdhci_host *host)
1809{ 1914{
1810 struct mmc_host *mmc; 1915 struct mmc_host *mmc;
1811 unsigned int caps, ocr_avail; 1916 u32 caps[2];
1917 u32 max_current_caps;
1918 unsigned int ocr_avail;
1812 int ret; 1919 int ret;
1813 1920
1814 WARN_ON(host == NULL); 1921 WARN_ON(host == NULL);
@@ -1831,12 +1938,15 @@ int sdhci_add_host(struct sdhci_host *host)
1831 host->version); 1938 host->version);
1832 } 1939 }
1833 1940
1834 caps = (host->quirks & SDHCI_QUIRK_MISSING_CAPS) ? host->caps : 1941 caps[0] = (host->quirks & SDHCI_QUIRK_MISSING_CAPS) ? host->caps :
1835 sdhci_readl(host, SDHCI_CAPABILITIES); 1942 sdhci_readl(host, SDHCI_CAPABILITIES);
1836 1943
1944 caps[1] = (host->version >= SDHCI_SPEC_300) ?
1945 sdhci_readl(host, SDHCI_CAPABILITIES_1) : 0;
1946
1837 if (host->quirks & SDHCI_QUIRK_FORCE_DMA) 1947 if (host->quirks & SDHCI_QUIRK_FORCE_DMA)
1838 host->flags |= SDHCI_USE_SDMA; 1948 host->flags |= SDHCI_USE_SDMA;
1839 else if (!(caps & SDHCI_CAN_DO_SDMA)) 1949 else if (!(caps[0] & SDHCI_CAN_DO_SDMA))
1840 DBG("Controller doesn't have SDMA capability\n"); 1950 DBG("Controller doesn't have SDMA capability\n");
1841 else 1951 else
1842 host->flags |= SDHCI_USE_SDMA; 1952 host->flags |= SDHCI_USE_SDMA;
@@ -1847,7 +1957,8 @@ int sdhci_add_host(struct sdhci_host *host)
1847 host->flags &= ~SDHCI_USE_SDMA; 1957 host->flags &= ~SDHCI_USE_SDMA;
1848 } 1958 }
1849 1959
1850 if ((host->version >= SDHCI_SPEC_200) && (caps & SDHCI_CAN_DO_ADMA2)) 1960 if ((host->version >= SDHCI_SPEC_200) &&
1961 (caps[0] & SDHCI_CAN_DO_ADMA2))
1851 host->flags |= SDHCI_USE_ADMA; 1962 host->flags |= SDHCI_USE_ADMA;
1852 1963
1853 if ((host->quirks & SDHCI_QUIRK_BROKEN_ADMA) && 1964 if ((host->quirks & SDHCI_QUIRK_BROKEN_ADMA) &&
@@ -1897,10 +2008,10 @@ int sdhci_add_host(struct sdhci_host *host)
1897 } 2008 }
1898 2009
1899 if (host->version >= SDHCI_SPEC_300) 2010 if (host->version >= SDHCI_SPEC_300)
1900 host->max_clk = (caps & SDHCI_CLOCK_V3_BASE_MASK) 2011 host->max_clk = (caps[0] & SDHCI_CLOCK_V3_BASE_MASK)
1901 >> SDHCI_CLOCK_BASE_SHIFT; 2012 >> SDHCI_CLOCK_BASE_SHIFT;
1902 else 2013 else
1903 host->max_clk = (caps & SDHCI_CLOCK_BASE_MASK) 2014 host->max_clk = (caps[0] & SDHCI_CLOCK_BASE_MASK)
1904 >> SDHCI_CLOCK_BASE_SHIFT; 2015 >> SDHCI_CLOCK_BASE_SHIFT;
1905 2016
1906 host->max_clk *= 1000000; 2017 host->max_clk *= 1000000;
@@ -1916,7 +2027,7 @@ int sdhci_add_host(struct sdhci_host *host)
1916 } 2027 }
1917 2028
1918 host->timeout_clk = 2029 host->timeout_clk =
1919 (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT; 2030 (caps[0] & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
1920 if (host->timeout_clk == 0) { 2031 if (host->timeout_clk == 0) {
1921 if (host->ops->get_timeout_clock) { 2032 if (host->ops->get_timeout_clock) {
1922 host->timeout_clk = host->ops->get_timeout_clock(host); 2033 host->timeout_clk = host->ops->get_timeout_clock(host);
@@ -1928,7 +2039,7 @@ int sdhci_add_host(struct sdhci_host *host)
1928 return -ENODEV; 2039 return -ENODEV;
1929 } 2040 }
1930 } 2041 }
1931 if (caps & SDHCI_TIMEOUT_CLK_UNIT) 2042 if (caps[0] & SDHCI_TIMEOUT_CLK_UNIT)
1932 host->timeout_clk *= 1000; 2043 host->timeout_clk *= 1000;
1933 2044
1934 /* 2045 /*
@@ -1955,21 +2066,76 @@ int sdhci_add_host(struct sdhci_host *host)
1955 if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA)) 2066 if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA))
1956 mmc->caps |= MMC_CAP_4_BIT_DATA; 2067 mmc->caps |= MMC_CAP_4_BIT_DATA;
1957 2068
1958 if (caps & SDHCI_CAN_DO_HISPD) 2069 if (caps[0] & SDHCI_CAN_DO_HISPD)
1959 mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; 2070 mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED;
1960 2071
1961 if ((host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) && 2072 if ((host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) &&
1962 mmc_card_is_removable(mmc)) 2073 mmc_card_is_removable(mmc))
1963 mmc->caps |= MMC_CAP_NEEDS_POLL; 2074 mmc->caps |= MMC_CAP_NEEDS_POLL;
1964 2075
2076 /* UHS-I mode(s) supported by the host controller. */
2077 if (host->version >= SDHCI_SPEC_300)
2078 mmc->caps |= MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25;
2079
2080 /* SDR104 supports also implies SDR50 support */
2081 if (caps[1] & SDHCI_SUPPORT_SDR104)
2082 mmc->caps |= MMC_CAP_UHS_SDR104 | MMC_CAP_UHS_SDR50;
2083 else if (caps[1] & SDHCI_SUPPORT_SDR50)
2084 mmc->caps |= MMC_CAP_UHS_SDR50;
2085
2086 if (caps[1] & SDHCI_SUPPORT_DDR50)
2087 mmc->caps |= MMC_CAP_UHS_DDR50;
2088
1965 ocr_avail = 0; 2089 ocr_avail = 0;
1966 if (caps & SDHCI_CAN_VDD_330) 2090 /*
2091 * According to SD Host Controller spec v3.00, if the Host System
2092 * can afford more than 150mA, Host Driver should set XPC to 1. Also
2093 * the value is meaningful only if Voltage Support in the Capabilities
2094 * register is set. The actual current value is 4 times the register
2095 * value.
2096 */
2097 max_current_caps = sdhci_readl(host, SDHCI_MAX_CURRENT);
2098
2099 if (caps[0] & SDHCI_CAN_VDD_330) {
2100 int max_current_330;
2101
1967 ocr_avail |= MMC_VDD_32_33 | MMC_VDD_33_34; 2102 ocr_avail |= MMC_VDD_32_33 | MMC_VDD_33_34;
1968 if (caps & SDHCI_CAN_VDD_300) 2103
2104 max_current_330 = ((max_current_caps &
2105 SDHCI_MAX_CURRENT_330_MASK) >>
2106 SDHCI_MAX_CURRENT_330_SHIFT) *
2107 SDHCI_MAX_CURRENT_MULTIPLIER;
2108
2109 if (max_current_330 > 150)
2110 mmc->caps |= MMC_CAP_SET_XPC_330;
2111 }
2112 if (caps[0] & SDHCI_CAN_VDD_300) {
2113 int max_current_300;
2114
1969 ocr_avail |= MMC_VDD_29_30 | MMC_VDD_30_31; 2115 ocr_avail |= MMC_VDD_29_30 | MMC_VDD_30_31;
1970 if (caps & SDHCI_CAN_VDD_180) 2116
2117 max_current_300 = ((max_current_caps &
2118 SDHCI_MAX_CURRENT_300_MASK) >>
2119 SDHCI_MAX_CURRENT_300_SHIFT) *
2120 SDHCI_MAX_CURRENT_MULTIPLIER;
2121
2122 if (max_current_300 > 150)
2123 mmc->caps |= MMC_CAP_SET_XPC_300;
2124 }
2125 if (caps[0] & SDHCI_CAN_VDD_180) {
2126 int max_current_180;
2127
1971 ocr_avail |= MMC_VDD_165_195; 2128 ocr_avail |= MMC_VDD_165_195;
1972 2129
2130 max_current_180 = ((max_current_caps &
2131 SDHCI_MAX_CURRENT_180_MASK) >>
2132 SDHCI_MAX_CURRENT_180_SHIFT) *
2133 SDHCI_MAX_CURRENT_MULTIPLIER;
2134
2135 if (max_current_180 > 150)
2136 mmc->caps |= MMC_CAP_SET_XPC_180;
2137 }
2138
1973 mmc->ocr_avail = ocr_avail; 2139 mmc->ocr_avail = ocr_avail;
1974 mmc->ocr_avail_sdio = ocr_avail; 2140 mmc->ocr_avail_sdio = ocr_avail;
1975 if (host->ocr_avail_sdio) 2141 if (host->ocr_avail_sdio)
@@ -2029,7 +2195,7 @@ int sdhci_add_host(struct sdhci_host *host)
2029 if (host->quirks & SDHCI_QUIRK_FORCE_BLK_SZ_2048) { 2195 if (host->quirks & SDHCI_QUIRK_FORCE_BLK_SZ_2048) {
2030 mmc->max_blk_size = 2; 2196 mmc->max_blk_size = 2;
2031 } else { 2197 } else {
2032 mmc->max_blk_size = (caps & SDHCI_MAX_BLOCK_MASK) >> 2198 mmc->max_blk_size = (caps[0] & SDHCI_MAX_BLOCK_MASK) >>
2033 SDHCI_MAX_BLOCK_SHIFT; 2199 SDHCI_MAX_BLOCK_SHIFT;
2034 if (mmc->max_blk_size >= 3) { 2200 if (mmc->max_blk_size >= 3) {
2035 printk(KERN_WARNING "%s: Invalid maximum block size, " 2201 printk(KERN_WARNING "%s: Invalid maximum block size, "
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index c6e25a76d269..5cba2fea46e0 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -68,6 +68,8 @@
68#define SDHCI_DATA_AVAILABLE 0x00000800 68#define SDHCI_DATA_AVAILABLE 0x00000800
69#define SDHCI_CARD_PRESENT 0x00010000 69#define SDHCI_CARD_PRESENT 0x00010000
70#define SDHCI_WRITE_PROTECT 0x00080000 70#define SDHCI_WRITE_PROTECT 0x00080000
71#define SDHCI_DATA_LVL_MASK 0x00F00000
72#define SDHCI_DATA_LVL_SHIFT 20
71 73
72#define SDHCI_HOST_CONTROL 0x28 74#define SDHCI_HOST_CONTROL 0x28
73#define SDHCI_CTRL_LED 0x01 75#define SDHCI_CTRL_LED 0x01
@@ -146,7 +148,8 @@
146 148
147#define SDHCI_ACMD12_ERR 0x3C 149#define SDHCI_ACMD12_ERR 0x3C
148 150
149/* 3E-3F reserved */ 151#define SDHCI_HOST_CONTROL2 0x3E
152#define SDHCI_CTRL_VDD_180 0x0008
150 153
151#define SDHCI_CAPABILITIES 0x40 154#define SDHCI_CAPABILITIES 0x40
152#define SDHCI_TIMEOUT_CLK_MASK 0x0000003F 155#define SDHCI_TIMEOUT_CLK_MASK 0x0000003F
@@ -167,9 +170,20 @@
167#define SDHCI_CAN_VDD_180 0x04000000 170#define SDHCI_CAN_VDD_180 0x04000000
168#define SDHCI_CAN_64BIT 0x10000000 171#define SDHCI_CAN_64BIT 0x10000000
169 172
173#define SDHCI_SUPPORT_SDR50 0x00000001
174#define SDHCI_SUPPORT_SDR104 0x00000002
175#define SDHCI_SUPPORT_DDR50 0x00000004
176
170#define SDHCI_CAPABILITIES_1 0x44 177#define SDHCI_CAPABILITIES_1 0x44
171 178
172#define SDHCI_MAX_CURRENT 0x48 179#define SDHCI_MAX_CURRENT 0x48
180#define SDHCI_MAX_CURRENT_330_MASK 0x0000FF
181#define SDHCI_MAX_CURRENT_330_SHIFT 0
182#define SDHCI_MAX_CURRENT_300_MASK 0x00FF00
183#define SDHCI_MAX_CURRENT_300_SHIFT 8
184#define SDHCI_MAX_CURRENT_180_MASK 0xFF0000
185#define SDHCI_MAX_CURRENT_180_SHIFT 16
186#define SDHCI_MAX_CURRENT_MULTIPLIER 4
173 187
174/* 4C-4F reserved for more max current */ 188/* 4C-4F reserved for more max current */
175 189
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index 0fffa5cdc183..bde5a0b1c47e 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -56,6 +56,11 @@ struct mmc_ios {
56#define MMC_SDR_MODE 0 56#define MMC_SDR_MODE 0
57#define MMC_1_2V_DDR_MODE 1 57#define MMC_1_2V_DDR_MODE 1
58#define MMC_1_8V_DDR_MODE 2 58#define MMC_1_8V_DDR_MODE 2
59
60 unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */
61
62#define MMC_SIGNAL_VOLTAGE_330 0
63#define MMC_SIGNAL_VOLTAGE_180 1
59}; 64};
60 65
61struct mmc_host_ops { 66struct mmc_host_ops {
@@ -117,6 +122,8 @@ struct mmc_host_ops {
117 122
118 /* optional callback for HC quirks */ 123 /* optional callback for HC quirks */
119 void (*init_card)(struct mmc_host *host, struct mmc_card *card); 124 void (*init_card)(struct mmc_host *host, struct mmc_card *card);
125
126 int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
120}; 127};
121 128
122struct mmc_card; 129struct mmc_card;
@@ -173,6 +180,14 @@ struct mmc_host {
173 /* DDR mode at 1.2V */ 180 /* DDR mode at 1.2V */
174#define MMC_CAP_POWER_OFF_CARD (1 << 13) /* Can power off after boot */ 181#define MMC_CAP_POWER_OFF_CARD (1 << 13) /* Can power off after boot */
175#define MMC_CAP_BUS_WIDTH_TEST (1 << 14) /* CMD14/CMD19 bus width ok */ 182#define MMC_CAP_BUS_WIDTH_TEST (1 << 14) /* CMD14/CMD19 bus width ok */
183#define MMC_CAP_UHS_SDR12 (1 << 15) /* Host supports UHS SDR12 mode */
184#define MMC_CAP_UHS_SDR25 (1 << 16) /* Host supports UHS SDR25 mode */
185#define MMC_CAP_UHS_SDR50 (1 << 17) /* Host supports UHS SDR50 mode */
186#define MMC_CAP_UHS_SDR104 (1 << 18) /* Host supports UHS SDR104 mode */
187#define MMC_CAP_UHS_DDR50 (1 << 19) /* Host supports UHS DDR50 mode */
188#define MMC_CAP_SET_XPC_330 (1 << 20) /* Host supports >150mA current at 3.3V */
189#define MMC_CAP_SET_XPC_300 (1 << 21) /* Host supports >150mA current at 3.0V */
190#define MMC_CAP_SET_XPC_180 (1 << 22) /* Host supports >150mA current at 1.8V */
176 191
177 mmc_pm_flag_t pm_caps; /* supported pm features */ 192 mmc_pm_flag_t pm_caps; /* supported pm features */
178 193
diff --git a/include/linux/mmc/sd.h b/include/linux/mmc/sd.h
index 3fd85e088cc3..c648878f6734 100644
--- a/include/linux/mmc/sd.h
+++ b/include/linux/mmc/sd.h
@@ -17,6 +17,7 @@
17/* This is basically the same command as for MMC with some quirks. */ 17/* This is basically the same command as for MMC with some quirks. */
18#define SD_SEND_RELATIVE_ADDR 3 /* bcr R6 */ 18#define SD_SEND_RELATIVE_ADDR 3 /* bcr R6 */
19#define SD_SEND_IF_COND 8 /* bcr [11:0] See below R7 */ 19#define SD_SEND_IF_COND 8 /* bcr [11:0] See below R7 */
20#define SD_SWITCH_VOLTAGE 11 /* ac R1 */
20 21
21 /* class 10 */ 22 /* class 10 */
22#define SD_SWITCH 6 /* adtc [31:0] See below R1 */ 23#define SD_SWITCH 6 /* adtc [31:0] See below R1 */
@@ -32,6 +33,12 @@
32#define SD_APP_OP_COND 41 /* bcr [31:0] OCR R3 */ 33#define SD_APP_OP_COND 41 /* bcr [31:0] OCR R3 */
33#define SD_APP_SEND_SCR 51 /* adtc R1 */ 34#define SD_APP_SEND_SCR 51 /* adtc R1 */
34 35
36/* OCR bit definitions */
37#define SD_OCR_S18R (1 << 24) /* 1.8V switching request */
38#define SD_ROCR_S18A SD_OCR_S18R /* 1.8V switching accepted by card */
39#define SD_OCR_XPC (1 << 28) /* SDXC power control */
40#define SD_OCR_CCS (1 << 30) /* Card Capacity Status */
41
35/* 42/*
36 * SD_SWITCH argument format: 43 * SD_SWITCH argument format:
37 * 44 *