diff options
-rw-r--r-- | arch/mips/sni/pcimt.c | 4 | ||||
-rw-r--r-- | arch/mips/sni/pcit.c | 12 | ||||
-rw-r--r-- | arch/mips/sni/rm200.c | 2 | ||||
-rw-r--r-- | include/asm-mips/sni.h | 9 |
4 files changed, 13 insertions, 14 deletions
diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c index 6c0dad7cbf4e..39e5b4abc555 100644 --- a/arch/mips/sni/pcimt.c +++ b/arch/mips/sni/pcimt.c | |||
@@ -336,9 +336,9 @@ static void sni_pcimt_hwint(void) | |||
336 | u32 pending = (read_c0_cause() & read_c0_status()); | 336 | u32 pending = (read_c0_cause() & read_c0_status()); |
337 | 337 | ||
338 | if (pending & C_IRQ5) | 338 | if (pending & C_IRQ5) |
339 | do_IRQ (SNI_MIPS_IRQ_CPU_BASE + 7); | 339 | do_IRQ (MIPS_CPU_IRQ_BASE + 7); |
340 | else if (pending & C_IRQ4) | 340 | else if (pending & C_IRQ4) |
341 | do_IRQ (SNI_MIPS_IRQ_CPU_BASE + 6); | 341 | do_IRQ (MIPS_CPU_IRQ_BASE + 6); |
342 | else if (pending & C_IRQ3) | 342 | else if (pending & C_IRQ3) |
343 | pcimt_hwint3(); | 343 | pcimt_hwint3(); |
344 | else if (pending & C_IRQ1) | 344 | else if (pending & C_IRQ1) |
diff --git a/arch/mips/sni/pcit.c b/arch/mips/sni/pcit.c index 3921096023c3..8d6b3d5b13a1 100644 --- a/arch/mips/sni/pcit.c +++ b/arch/mips/sni/pcit.c | |||
@@ -276,11 +276,11 @@ static void sni_pcit_hwint(void) | |||
276 | if (pending & C_IRQ1) | 276 | if (pending & C_IRQ1) |
277 | pcit_hwint1(); | 277 | pcit_hwint1(); |
278 | else if (pending & C_IRQ2) | 278 | else if (pending & C_IRQ2) |
279 | do_IRQ (SNI_MIPS_IRQ_CPU_BASE + 4); | 279 | do_IRQ (MIPS_CPU_IRQ_BASE + 4); |
280 | else if (pending & C_IRQ3) | 280 | else if (pending & C_IRQ3) |
281 | do_IRQ (SNI_MIPS_IRQ_CPU_BASE + 5); | 281 | do_IRQ (MIPS_CPU_IRQ_BASE + 5); |
282 | else if (pending & C_IRQ5) | 282 | else if (pending & C_IRQ5) |
283 | do_IRQ (SNI_MIPS_IRQ_CPU_BASE + 7); | 283 | do_IRQ (MIPS_CPU_IRQ_BASE + 7); |
284 | } | 284 | } |
285 | 285 | ||
286 | static void sni_pcit_hwint_cplus(void) | 286 | static void sni_pcit_hwint_cplus(void) |
@@ -290,11 +290,11 @@ static void sni_pcit_hwint_cplus(void) | |||
290 | if (pending & C_IRQ0) | 290 | if (pending & C_IRQ0) |
291 | pcit_hwint0(); | 291 | pcit_hwint0(); |
292 | else if (pending & C_IRQ2) | 292 | else if (pending & C_IRQ2) |
293 | do_IRQ (SNI_MIPS_IRQ_CPU_BASE + 4); | 293 | do_IRQ (MIPS_CPU_IRQ_BASE + 4); |
294 | else if (pending & C_IRQ3) | 294 | else if (pending & C_IRQ3) |
295 | do_IRQ (SNI_MIPS_IRQ_CPU_BASE + 5); | 295 | do_IRQ (MIPS_CPU_IRQ_BASE + 5); |
296 | else if (pending & C_IRQ5) | 296 | else if (pending & C_IRQ5) |
297 | do_IRQ (SNI_MIPS_IRQ_CPU_BASE + 7); | 297 | do_IRQ (MIPS_CPU_IRQ_BASE + 7); |
298 | } | 298 | } |
299 | 299 | ||
300 | void __init sni_pcit_irq_init(void) | 300 | void __init sni_pcit_irq_init(void) |
diff --git a/arch/mips/sni/rm200.c b/arch/mips/sni/rm200.c index 517dc698c083..b82ff129f5ea 100644 --- a/arch/mips/sni/rm200.c +++ b/arch/mips/sni/rm200.c | |||
@@ -148,7 +148,7 @@ static void sni_rm200_hwint(void) | |||
148 | int irq; | 148 | int irq; |
149 | 149 | ||
150 | if (pending & C_IRQ5) | 150 | if (pending & C_IRQ5) |
151 | do_IRQ (SNI_MIPS_IRQ_CPU_BASE + 7); | 151 | do_IRQ (MIPS_CPU_IRQ_BASE + 7); |
152 | else if (pending & C_IRQ0) { | 152 | else if (pending & C_IRQ0) { |
153 | clear_c0_status (IE_IRQ0); | 153 | clear_c0_status (IE_IRQ0); |
154 | mask = *(volatile u8 *)SNI_RM200_INT_ENA_REG ^ 0x1f; | 154 | mask = *(volatile u8 *)SNI_RM200_INT_ENA_REG ^ 0x1f; |
diff --git a/include/asm-mips/sni.h b/include/asm-mips/sni.h index 62f9be6f7320..f257509b914f 100644 --- a/include/asm-mips/sni.h +++ b/include/asm-mips/sni.h | |||
@@ -141,10 +141,9 @@ extern unsigned int sni_brd_type; | |||
141 | #define A20R_PT_TIM0_ACK 0xbc050000 | 141 | #define A20R_PT_TIM0_ACK 0xbc050000 |
142 | #define A20R_PT_TIM1_ACK 0xbc060000 | 142 | #define A20R_PT_TIM1_ACK 0xbc060000 |
143 | 143 | ||
144 | #define SNI_MIPS_IRQ_CPU_BASE 16 | 144 | #define SNI_MIPS_IRQ_CPU_TIMER (MIPS_CPU_IRQ_BASE+7) |
145 | #define SNI_MIPS_IRQ_CPU_TIMER (SNI_MIPS_IRQ_CPU_BASE+7) | ||
146 | 145 | ||
147 | #define SNI_A20R_IRQ_BASE SNI_MIPS_IRQ_CPU_BASE | 146 | #define SNI_A20R_IRQ_BASE MIPS_CPU_IRQ_BASE |
148 | #define SNI_A20R_IRQ_TIMER (SNI_A20R_IRQ_BASE+5) | 147 | #define SNI_A20R_IRQ_TIMER (SNI_A20R_IRQ_BASE+5) |
149 | 148 | ||
150 | #define SNI_DS1216_A20R_BASE 0xbc081ffc | 149 | #define SNI_DS1216_A20R_BASE 0xbc081ffc |
@@ -155,7 +154,7 @@ extern unsigned int sni_brd_type; | |||
155 | #define SNI_PCIT_INT_START 24 | 154 | #define SNI_PCIT_INT_START 24 |
156 | #define SNI_PCIT_INT_END 30 | 155 | #define SNI_PCIT_INT_END 30 |
157 | 156 | ||
158 | #define PCIT_IRQ_ETHERNET (SNI_MIPS_IRQ_CPU_BASE + 5) | 157 | #define PCIT_IRQ_ETHERNET (MIPS_CPU_IRQ_BASE + 5) |
159 | #define PCIT_IRQ_INTA (SNI_PCIT_INT_START + 0) | 158 | #define PCIT_IRQ_INTA (SNI_PCIT_INT_START + 0) |
160 | #define PCIT_IRQ_INTB (SNI_PCIT_INT_START + 1) | 159 | #define PCIT_IRQ_INTB (SNI_PCIT_INT_START + 1) |
161 | #define PCIT_IRQ_INTC (SNI_PCIT_INT_START + 2) | 160 | #define PCIT_IRQ_INTC (SNI_PCIT_INT_START + 2) |
@@ -180,7 +179,7 @@ extern unsigned int sni_brd_type; | |||
180 | #define PCIMT_IRQ_EISA 29 | 179 | #define PCIMT_IRQ_EISA 29 |
181 | #define PCIMT_IRQ_SCSI 30 | 180 | #define PCIMT_IRQ_SCSI 30 |
182 | 181 | ||
183 | #define PCIMT_IRQ_ETHERNET (SNI_MIPS_IRQ_CPU_BASE+6) | 182 | #define PCIMT_IRQ_ETHERNET (MIPS_CPU_IRQ_BASE+6) |
184 | 183 | ||
185 | #if 0 | 184 | #if 0 |
186 | #define PCIMT_IRQ_TEMPERATURE 24 | 185 | #define PCIMT_IRQ_TEMPERATURE 24 |