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-rw-r--r--arch/arm/mach-davinci/clock.c10
-rw-r--r--arch/arm/mach-davinci/clock.h2
2 files changed, 9 insertions, 3 deletions
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index 83d54d50b5ea..f8c4ef08fbc2 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -123,8 +123,12 @@ int clk_register(struct clk *clk)
123 clk->name, clk->parent->name)) 123 clk->name, clk->parent->name))
124 return -EINVAL; 124 return -EINVAL;
125 125
126 INIT_LIST_HEAD(&clk->children);
127
126 mutex_lock(&clocks_mutex); 128 mutex_lock(&clocks_mutex);
127 list_add_tail(&clk->node, &clocks); 129 list_add_tail(&clk->node, &clocks);
130 if (clk->parent)
131 list_add_tail(&clk->childnode, &clk->parent->children);
128 mutex_unlock(&clocks_mutex); 132 mutex_unlock(&clocks_mutex);
129 133
130 /* If rate is already set, use it */ 134 /* If rate is already set, use it */
@@ -146,6 +150,7 @@ void clk_unregister(struct clk *clk)
146 150
147 mutex_lock(&clocks_mutex); 151 mutex_lock(&clocks_mutex);
148 list_del(&clk->node); 152 list_del(&clk->node);
153 list_del(&clk->childnode);
149 mutex_unlock(&clocks_mutex); 154 mutex_unlock(&clocks_mutex);
150} 155}
151EXPORT_SYMBOL(clk_unregister); 156EXPORT_SYMBOL(clk_unregister);
@@ -352,9 +357,8 @@ dump_clock(struct seq_file *s, unsigned nest, struct clk *parent)
352 /* REVISIT show device associations too */ 357 /* REVISIT show device associations too */
353 358
354 /* cost is now small, but not linear... */ 359 /* cost is now small, but not linear... */
355 list_for_each_entry(clk, &clocks, node) { 360 list_for_each_entry(clk, &parent->children, childnode) {
356 if (clk->parent == parent) 361 dump_clock(s, nest + NEST_DELTA, clk);
357 dump_clock(s, nest + NEST_DELTA, clk);
358 } 362 }
359} 363}
360 364
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index 27233cb4a2fb..f88794d7446e 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -69,6 +69,8 @@ struct clk {
69 u8 lpsc; 69 u8 lpsc;
70 u8 psc_ctlr; 70 u8 psc_ctlr;
71 struct clk *parent; 71 struct clk *parent;
72 struct list_head children; /* list of children */
73 struct list_head childnode; /* parent's child list node */
72 struct pll_data *pll_data; 74 struct pll_data *pll_data;
73 u32 div_reg; 75 u32 div_reg;
74}; 76};