diff options
-rw-r--r-- | drivers/net/ethernet/freescale/gianfar.c | 60 |
1 files changed, 30 insertions, 30 deletions
diff --git a/drivers/net/ethernet/freescale/gianfar.c b/drivers/net/ethernet/freescale/gianfar.c index 987f3234d23b..385de8064371 100644 --- a/drivers/net/ethernet/freescale/gianfar.c +++ b/drivers/net/ethernet/freescale/gianfar.c | |||
@@ -448,6 +448,29 @@ static const struct net_device_ops gfar_netdev_ops = { | |||
448 | #endif | 448 | #endif |
449 | }; | 449 | }; |
450 | 450 | ||
451 | static void gfar_ints_disable(struct gfar_private *priv) | ||
452 | { | ||
453 | int i; | ||
454 | for (i = 0; i < priv->num_grps; i++) { | ||
455 | struct gfar __iomem *regs = priv->gfargrp[i].regs; | ||
456 | /* Clear IEVENT */ | ||
457 | gfar_write(®s->ievent, IEVENT_INIT_CLEAR); | ||
458 | |||
459 | /* Initialize IMASK */ | ||
460 | gfar_write(®s->imask, IMASK_INIT_CLEAR); | ||
461 | } | ||
462 | } | ||
463 | |||
464 | static void gfar_ints_enable(struct gfar_private *priv) | ||
465 | { | ||
466 | int i; | ||
467 | for (i = 0; i < priv->num_grps; i++) { | ||
468 | struct gfar __iomem *regs = priv->gfargrp[i].regs; | ||
469 | /* Unmask the interrupts we look for */ | ||
470 | gfar_write(®s->imask, IMASK_DEFAULT); | ||
471 | } | ||
472 | } | ||
473 | |||
451 | void lock_rx_qs(struct gfar_private *priv) | 474 | void lock_rx_qs(struct gfar_private *priv) |
452 | { | 475 | { |
453 | int i; | 476 | int i; |
@@ -1548,19 +1571,10 @@ static void gfar_configure_serdes(struct net_device *dev) | |||
1548 | static void init_registers(struct net_device *dev) | 1571 | static void init_registers(struct net_device *dev) |
1549 | { | 1572 | { |
1550 | struct gfar_private *priv = netdev_priv(dev); | 1573 | struct gfar_private *priv = netdev_priv(dev); |
1551 | struct gfar __iomem *regs = NULL; | 1574 | struct gfar __iomem *regs = priv->gfargrp[0].regs; |
1552 | int i; | ||
1553 | |||
1554 | for (i = 0; i < priv->num_grps; i++) { | ||
1555 | regs = priv->gfargrp[i].regs; | ||
1556 | /* Clear IEVENT */ | ||
1557 | gfar_write(®s->ievent, IEVENT_INIT_CLEAR); | ||
1558 | 1575 | ||
1559 | /* Initialize IMASK */ | 1576 | gfar_ints_disable(priv); |
1560 | gfar_write(®s->imask, IMASK_INIT_CLEAR); | ||
1561 | } | ||
1562 | 1577 | ||
1563 | regs = priv->gfargrp[0].regs; | ||
1564 | /* Init hash registers to zero */ | 1578 | /* Init hash registers to zero */ |
1565 | gfar_write(®s->igaddr0, 0); | 1579 | gfar_write(®s->igaddr0, 0); |
1566 | gfar_write(®s->igaddr1, 0); | 1580 | gfar_write(®s->igaddr1, 0); |
@@ -1622,20 +1636,11 @@ static int __gfar_is_rx_idle(struct gfar_private *priv) | |||
1622 | static void gfar_halt_nodisable(struct net_device *dev) | 1636 | static void gfar_halt_nodisable(struct net_device *dev) |
1623 | { | 1637 | { |
1624 | struct gfar_private *priv = netdev_priv(dev); | 1638 | struct gfar_private *priv = netdev_priv(dev); |
1625 | struct gfar __iomem *regs = NULL; | 1639 | struct gfar __iomem *regs = priv->gfargrp[0].regs; |
1626 | u32 tempval; | 1640 | u32 tempval; |
1627 | int i; | ||
1628 | |||
1629 | for (i = 0; i < priv->num_grps; i++) { | ||
1630 | regs = priv->gfargrp[i].regs; | ||
1631 | /* Mask all interrupts */ | ||
1632 | gfar_write(®s->imask, IMASK_INIT_CLEAR); | ||
1633 | 1641 | ||
1634 | /* Clear all interrupts */ | 1642 | gfar_ints_disable(priv); |
1635 | gfar_write(®s->ievent, IEVENT_INIT_CLEAR); | ||
1636 | } | ||
1637 | 1643 | ||
1638 | regs = priv->gfargrp[0].regs; | ||
1639 | /* Stop the DMA, and wait for it to stop */ | 1644 | /* Stop the DMA, and wait for it to stop */ |
1640 | tempval = gfar_read(®s->dmactrl); | 1645 | tempval = gfar_read(®s->dmactrl); |
1641 | if ((tempval & (DMACTRL_GRS | DMACTRL_GTS)) != | 1646 | if ((tempval & (DMACTRL_GRS | DMACTRL_GTS)) != |
@@ -1823,10 +1828,10 @@ void gfar_start(struct net_device *dev) | |||
1823 | /* Clear THLT/RHLT, so that the DMA starts polling now */ | 1828 | /* Clear THLT/RHLT, so that the DMA starts polling now */ |
1824 | gfar_write(®s->tstat, priv->gfargrp[i].tstat); | 1829 | gfar_write(®s->tstat, priv->gfargrp[i].tstat); |
1825 | gfar_write(®s->rstat, priv->gfargrp[i].rstat); | 1830 | gfar_write(®s->rstat, priv->gfargrp[i].rstat); |
1826 | /* Unmask the interrupts we look for */ | ||
1827 | gfar_write(®s->imask, IMASK_DEFAULT); | ||
1828 | } | 1831 | } |
1829 | 1832 | ||
1833 | gfar_ints_enable(priv); | ||
1834 | |||
1830 | dev->trans_start = jiffies; /* prevent tx timeout */ | 1835 | dev->trans_start = jiffies; /* prevent tx timeout */ |
1831 | } | 1836 | } |
1832 | 1837 | ||
@@ -1931,15 +1936,10 @@ err_irq_fail: | |||
1931 | int startup_gfar(struct net_device *ndev) | 1936 | int startup_gfar(struct net_device *ndev) |
1932 | { | 1937 | { |
1933 | struct gfar_private *priv = netdev_priv(ndev); | 1938 | struct gfar_private *priv = netdev_priv(ndev); |
1934 | struct gfar __iomem *regs = NULL; | ||
1935 | int err, i, j; | 1939 | int err, i, j; |
1936 | 1940 | ||
1937 | for (i = 0; i < priv->num_grps; i++) { | 1941 | gfar_ints_disable(priv); |
1938 | regs= priv->gfargrp[i].regs; | ||
1939 | gfar_write(®s->imask, IMASK_INIT_CLEAR); | ||
1940 | } | ||
1941 | 1942 | ||
1942 | regs= priv->gfargrp[0].regs; | ||
1943 | err = gfar_alloc_skb_resources(ndev); | 1943 | err = gfar_alloc_skb_resources(ndev); |
1944 | if (err) | 1944 | if (err) |
1945 | return err; | 1945 | return err; |