diff options
| -rw-r--r-- | arch/arm/mach-exynos/Kconfig | 3 | ||||
| -rw-r--r-- | arch/arm/mach-exynos/dma.c | 95 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/dma-pl330.h | 8 |
3 files changed, 98 insertions, 8 deletions
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 5d602f68a0e8..5e0a45605a22 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig | |||
| @@ -41,6 +41,7 @@ config SOC_EXYNOS4212 | |||
| 41 | bool "SAMSUNG EXYNOS4212" | 41 | bool "SAMSUNG EXYNOS4212" |
| 42 | default y | 42 | default y |
| 43 | depends on ARCH_EXYNOS4 | 43 | depends on ARCH_EXYNOS4 |
| 44 | select SAMSUNG_DMADEV | ||
| 44 | select S5P_PM if PM | 45 | select S5P_PM if PM |
| 45 | select S5P_SLEEP if PM | 46 | select S5P_SLEEP if PM |
| 46 | help | 47 | help |
| @@ -50,6 +51,7 @@ config SOC_EXYNOS4412 | |||
| 50 | bool "SAMSUNG EXYNOS4412" | 51 | bool "SAMSUNG EXYNOS4412" |
| 51 | default y | 52 | default y |
| 52 | depends on ARCH_EXYNOS4 | 53 | depends on ARCH_EXYNOS4 |
| 54 | select SAMSUNG_DMADEV | ||
| 53 | help | 55 | help |
| 54 | Enable EXYNOS4412 SoC support | 56 | Enable EXYNOS4412 SoC support |
| 55 | 57 | ||
| @@ -333,6 +335,7 @@ config MACH_SMDK4212 | |||
| 333 | select SAMSUNG_DEV_BACKLIGHT | 335 | select SAMSUNG_DEV_BACKLIGHT |
| 334 | select SAMSUNG_DEV_KEYPAD | 336 | select SAMSUNG_DEV_KEYPAD |
| 335 | select SAMSUNG_DEV_PWM | 337 | select SAMSUNG_DEV_PWM |
| 338 | select EXYNOS4_DEV_DMA | ||
| 336 | select EXYNOS4_SETUP_I2C1 | 339 | select EXYNOS4_SETUP_I2C1 |
| 337 | select EXYNOS4_SETUP_I2C3 | 340 | select EXYNOS4_SETUP_I2C3 |
| 338 | select EXYNOS4_SETUP_I2C7 | 341 | select EXYNOS4_SETUP_I2C7 |
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c index 17a2f9086310..13607c4328b3 100644 --- a/arch/arm/mach-exynos/dma.c +++ b/arch/arm/mach-exynos/dma.c | |||
| @@ -29,6 +29,7 @@ | |||
| 29 | #include <asm/irq.h> | 29 | #include <asm/irq.h> |
| 30 | #include <plat/devs.h> | 30 | #include <plat/devs.h> |
| 31 | #include <plat/irqs.h> | 31 | #include <plat/irqs.h> |
| 32 | #include <plat/cpu.h> | ||
| 32 | 33 | ||
| 33 | #include <mach/map.h> | 34 | #include <mach/map.h> |
| 34 | #include <mach/irqs.h> | 35 | #include <mach/irqs.h> |
| @@ -36,7 +37,7 @@ | |||
| 36 | 37 | ||
| 37 | static u64 dma_dmamask = DMA_BIT_MASK(32); | 38 | static u64 dma_dmamask = DMA_BIT_MASK(32); |
| 38 | 39 | ||
| 39 | static u8 pdma0_peri[] = { | 40 | static u8 exynos4210_pdma0_peri[] = { |
| 40 | DMACH_PCM0_RX, | 41 | DMACH_PCM0_RX, |
| 41 | DMACH_PCM0_TX, | 42 | DMACH_PCM0_TX, |
| 42 | DMACH_PCM2_RX, | 43 | DMACH_PCM2_RX, |
| @@ -69,15 +70,47 @@ static u8 pdma0_peri[] = { | |||
| 69 | DMACH_AC97_PCMOUT, | 70 | DMACH_AC97_PCMOUT, |
| 70 | }; | 71 | }; |
| 71 | 72 | ||
| 72 | static struct dma_pl330_platdata exynos4_pdma0_pdata = { | 73 | static u8 exynos4212_pdma0_peri[] = { |
| 73 | .nr_valid_peri = ARRAY_SIZE(pdma0_peri), | 74 | DMACH_PCM0_RX, |
| 74 | .peri_id = pdma0_peri, | 75 | DMACH_PCM0_TX, |
| 76 | DMACH_PCM2_RX, | ||
| 77 | DMACH_PCM2_TX, | ||
| 78 | DMACH_MIPI_HSI0, | ||
| 79 | DMACH_MIPI_HSI1, | ||
| 80 | DMACH_SPI0_RX, | ||
| 81 | DMACH_SPI0_TX, | ||
| 82 | DMACH_SPI2_RX, | ||
| 83 | DMACH_SPI2_TX, | ||
| 84 | DMACH_I2S0S_TX, | ||
| 85 | DMACH_I2S0_RX, | ||
| 86 | DMACH_I2S0_TX, | ||
| 87 | DMACH_I2S2_RX, | ||
| 88 | DMACH_I2S2_TX, | ||
| 89 | DMACH_UART0_RX, | ||
| 90 | DMACH_UART0_TX, | ||
| 91 | DMACH_UART2_RX, | ||
| 92 | DMACH_UART2_TX, | ||
| 93 | DMACH_UART4_RX, | ||
| 94 | DMACH_UART4_TX, | ||
| 95 | DMACH_SLIMBUS0_RX, | ||
| 96 | DMACH_SLIMBUS0_TX, | ||
| 97 | DMACH_SLIMBUS2_RX, | ||
| 98 | DMACH_SLIMBUS2_TX, | ||
| 99 | DMACH_SLIMBUS4_RX, | ||
| 100 | DMACH_SLIMBUS4_TX, | ||
| 101 | DMACH_AC97_MICIN, | ||
| 102 | DMACH_AC97_PCMIN, | ||
| 103 | DMACH_AC97_PCMOUT, | ||
| 104 | DMACH_MIPI_HSI4, | ||
| 105 | DMACH_MIPI_HSI5, | ||
| 75 | }; | 106 | }; |
| 76 | 107 | ||
| 108 | struct dma_pl330_platdata exynos4_pdma0_pdata; | ||
| 109 | |||
| 77 | static AMBA_AHB_DEVICE(exynos4_pdma0, "dma-pl330.0", 0x00041330, | 110 | static AMBA_AHB_DEVICE(exynos4_pdma0, "dma-pl330.0", 0x00041330, |
| 78 | EXYNOS4_PA_PDMA0, {IRQ_PDMA0}, &exynos4_pdma0_pdata); | 111 | EXYNOS4_PA_PDMA0, {IRQ_PDMA0}, &exynos4_pdma0_pdata); |
| 79 | 112 | ||
| 80 | static u8 pdma1_peri[] = { | 113 | static u8 exynos4210_pdma1_peri[] = { |
| 81 | DMACH_PCM0_RX, | 114 | DMACH_PCM0_RX, |
| 82 | DMACH_PCM0_TX, | 115 | DMACH_PCM0_TX, |
| 83 | DMACH_PCM1_RX, | 116 | DMACH_PCM1_RX, |
| @@ -105,11 +138,41 @@ static u8 pdma1_peri[] = { | |||
| 105 | DMACH_SLIMBUS5_TX, | 138 | DMACH_SLIMBUS5_TX, |
| 106 | }; | 139 | }; |
| 107 | 140 | ||
| 108 | static struct dma_pl330_platdata exynos4_pdma1_pdata = { | 141 | static u8 exynos4212_pdma1_peri[] = { |
| 109 | .nr_valid_peri = ARRAY_SIZE(pdma1_peri), | 142 | DMACH_PCM0_RX, |
| 110 | .peri_id = pdma1_peri, | 143 | DMACH_PCM0_TX, |
| 144 | DMACH_PCM1_RX, | ||
| 145 | DMACH_PCM1_TX, | ||
| 146 | DMACH_MIPI_HSI2, | ||
| 147 | DMACH_MIPI_HSI3, | ||
| 148 | DMACH_SPI1_RX, | ||
| 149 | DMACH_SPI1_TX, | ||
| 150 | DMACH_I2S0S_TX, | ||
| 151 | DMACH_I2S0_RX, | ||
| 152 | DMACH_I2S0_TX, | ||
| 153 | DMACH_I2S1_RX, | ||
| 154 | DMACH_I2S1_TX, | ||
| 155 | DMACH_UART0_RX, | ||
| 156 | DMACH_UART0_TX, | ||
| 157 | DMACH_UART1_RX, | ||
| 158 | DMACH_UART1_TX, | ||
| 159 | DMACH_UART3_RX, | ||
| 160 | DMACH_UART3_TX, | ||
| 161 | DMACH_SLIMBUS1_RX, | ||
| 162 | DMACH_SLIMBUS1_TX, | ||
| 163 | DMACH_SLIMBUS3_RX, | ||
| 164 | DMACH_SLIMBUS3_TX, | ||
| 165 | DMACH_SLIMBUS5_RX, | ||
| 166 | DMACH_SLIMBUS5_TX, | ||
| 167 | DMACH_SLIMBUS0AUX_RX, | ||
| 168 | DMACH_SLIMBUS0AUX_TX, | ||
| 169 | DMACH_SPDIF, | ||
| 170 | DMACH_MIPI_HSI6, | ||
| 171 | DMACH_MIPI_HSI7, | ||
| 111 | }; | 172 | }; |
| 112 | 173 | ||
| 174 | static struct dma_pl330_platdata exynos4_pdma1_pdata; | ||
| 175 | |||
| 113 | static AMBA_AHB_DEVICE(exynos4_pdma1, "dma-pl330.1", 0x00041330, | 176 | static AMBA_AHB_DEVICE(exynos4_pdma1, "dma-pl330.1", 0x00041330, |
| 114 | EXYNOS4_PA_PDMA1, {IRQ_PDMA1}, &exynos4_pdma1_pdata); | 177 | EXYNOS4_PA_PDMA1, {IRQ_PDMA1}, &exynos4_pdma1_pdata); |
| 115 | 178 | ||
| @@ -137,6 +200,22 @@ static int __init exynos4_dma_init(void) | |||
| 137 | if (of_have_populated_dt()) | 200 | if (of_have_populated_dt()) |
| 138 | return 0; | 201 | return 0; |
| 139 | 202 | ||
| 203 | if (soc_is_exynos4210()) { | ||
| 204 | exynos4_pdma0_pdata.nr_valid_peri = | ||
| 205 | ARRAY_SIZE(exynos4210_pdma0_peri); | ||
| 206 | exynos4_pdma0_pdata.peri_id = exynos4210_pdma0_peri; | ||
| 207 | exynos4_pdma1_pdata.nr_valid_peri = | ||
| 208 | ARRAY_SIZE(exynos4210_pdma1_peri); | ||
| 209 | exynos4_pdma1_pdata.peri_id = exynos4210_pdma1_peri; | ||
| 210 | } else if (soc_is_exynos4212() || soc_is_exynos4412()) { | ||
| 211 | exynos4_pdma0_pdata.nr_valid_peri = | ||
| 212 | ARRAY_SIZE(exynos4212_pdma0_peri); | ||
| 213 | exynos4_pdma0_pdata.peri_id = exynos4212_pdma0_peri; | ||
| 214 | exynos4_pdma1_pdata.nr_valid_peri = | ||
| 215 | ARRAY_SIZE(exynos4212_pdma1_peri); | ||
| 216 | exynos4_pdma1_pdata.peri_id = exynos4212_pdma1_peri; | ||
| 217 | } | ||
| 218 | |||
| 140 | dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask); | 219 | dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask); |
| 141 | dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask); | 220 | dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask); |
| 142 | amba_device_register(&exynos4_pdma0_device, &iomem_resource); | 221 | amba_device_register(&exynos4_pdma0_device, &iomem_resource); |
diff --git a/arch/arm/plat-samsung/include/plat/dma-pl330.h b/arch/arm/plat-samsung/include/plat/dma-pl330.h index ecf23a830e73..0670f37aaaed 100644 --- a/arch/arm/plat-samsung/include/plat/dma-pl330.h +++ b/arch/arm/plat-samsung/include/plat/dma-pl330.h | |||
| @@ -82,6 +82,14 @@ enum dma_ch { | |||
| 82 | DMACH_SLIMBUS4_TX, | 82 | DMACH_SLIMBUS4_TX, |
| 83 | DMACH_SLIMBUS5_RX, | 83 | DMACH_SLIMBUS5_RX, |
| 84 | DMACH_SLIMBUS5_TX, | 84 | DMACH_SLIMBUS5_TX, |
| 85 | DMACH_MIPI_HSI0, | ||
| 86 | DMACH_MIPI_HSI1, | ||
| 87 | DMACH_MIPI_HSI2, | ||
| 88 | DMACH_MIPI_HSI3, | ||
| 89 | DMACH_MIPI_HSI4, | ||
| 90 | DMACH_MIPI_HSI5, | ||
| 91 | DMACH_MIPI_HSI6, | ||
| 92 | DMACH_MIPI_HSI7, | ||
| 85 | DMACH_MTOM_0, | 93 | DMACH_MTOM_0, |
| 86 | DMACH_MTOM_1, | 94 | DMACH_MTOM_1, |
| 87 | DMACH_MTOM_2, | 95 | DMACH_MTOM_2, |
