diff options
-rw-r--r-- | drivers/gpu/drm/nouveau/core/engine/graph/ctxnv50.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_chan.c | 12 |
2 files changed, 17 insertions, 5 deletions
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnv50.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnv50.c index 552fdbd45ebe..1d0e33fb5f61 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnv50.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnv50.c | |||
@@ -113,6 +113,8 @@ | |||
113 | #define IS_NVA3F(x) (((x) > 0xa0 && (x) < 0xaa) || (x) == 0xaf) | 113 | #define IS_NVA3F(x) (((x) > 0xa0 && (x) < 0xaa) || (x) == 0xaf) |
114 | #define IS_NVAAF(x) ((x) >= 0xaa && (x) <= 0xac) | 114 | #define IS_NVAAF(x) ((x) >= 0xaa && (x) <= 0xac) |
115 | 115 | ||
116 | #include <subdev/fb.h> | ||
117 | |||
116 | /* | 118 | /* |
117 | * This code deals with PGRAPH contexts on NV50 family cards. Like NV40, it's | 119 | * This code deals with PGRAPH contexts on NV50 family cards. Like NV40, it's |
118 | * the GPU itself that does context-switching, but it needs a special | 120 | * the GPU itself that does context-switching, but it needs a special |
@@ -569,8 +571,12 @@ nv50_graph_construct_mmio(struct nouveau_grctx *ctx) | |||
569 | gr_def(ctx, 0x407d08, 0x00010040); | 571 | gr_def(ctx, 0x407d08, 0x00010040); |
570 | else if (device->chipset < 0xa0) | 572 | else if (device->chipset < 0xa0) |
571 | gr_def(ctx, 0x407d08, 0x00390040); | 573 | gr_def(ctx, 0x407d08, 0x00390040); |
572 | else | 574 | else { |
573 | gr_def(ctx, 0x407d08, 0x003d0040); | 575 | if (nouveau_fb(device)->ram->type != NV_MEM_TYPE_GDDR5) |
576 | gr_def(ctx, 0x407d08, 0x003d0040); | ||
577 | else | ||
578 | gr_def(ctx, 0x407d08, 0x003c0040); | ||
579 | } | ||
574 | gr_def(ctx, 0x407d0c, 0x00000022); | 580 | gr_def(ctx, 0x407d0c, 0x00000022); |
575 | } | 581 | } |
576 | 582 | ||
diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.c b/drivers/gpu/drm/nouveau/nouveau_chan.c index 589dbb582da2..fd3dbd59d73e 100644 --- a/drivers/gpu/drm/nouveau/nouveau_chan.c +++ b/drivers/gpu/drm/nouveau/nouveau_chan.c | |||
@@ -400,15 +400,20 @@ nouveau_channel_new(struct nouveau_drm *drm, struct nvif_device *device, | |||
400 | struct nouveau_channel **pchan) | 400 | struct nouveau_channel **pchan) |
401 | { | 401 | { |
402 | struct nouveau_cli *cli = (void *)nvif_client(&device->base); | 402 | struct nouveau_cli *cli = (void *)nvif_client(&device->base); |
403 | bool super; | ||
403 | int ret; | 404 | int ret; |
404 | 405 | ||
406 | /* hack until fencenv50 is fixed, and agp access relaxed */ | ||
407 | super = cli->base.super; | ||
408 | cli->base.super = true; | ||
409 | |||
405 | ret = nouveau_channel_ind(drm, device, handle, arg0, pchan); | 410 | ret = nouveau_channel_ind(drm, device, handle, arg0, pchan); |
406 | if (ret) { | 411 | if (ret) { |
407 | NV_PRINTK(debug, cli, "ib channel create, %d\n", ret); | 412 | NV_PRINTK(debug, cli, "ib channel create, %d\n", ret); |
408 | ret = nouveau_channel_dma(drm, device, handle, pchan); | 413 | ret = nouveau_channel_dma(drm, device, handle, pchan); |
409 | if (ret) { | 414 | if (ret) { |
410 | NV_PRINTK(debug, cli, "dma channel create, %d\n", ret); | 415 | NV_PRINTK(debug, cli, "dma channel create, %d\n", ret); |
411 | return ret; | 416 | goto done; |
412 | } | 417 | } |
413 | } | 418 | } |
414 | 419 | ||
@@ -416,8 +421,9 @@ nouveau_channel_new(struct nouveau_drm *drm, struct nvif_device *device, | |||
416 | if (ret) { | 421 | if (ret) { |
417 | NV_PRINTK(error, cli, "channel failed to initialise, %d\n", ret); | 422 | NV_PRINTK(error, cli, "channel failed to initialise, %d\n", ret); |
418 | nouveau_channel_del(pchan); | 423 | nouveau_channel_del(pchan); |
419 | return ret; | ||
420 | } | 424 | } |
421 | 425 | ||
422 | return 0; | 426 | done: |
427 | cli->base.super = super; | ||
428 | return ret; | ||
423 | } | 429 | } |