diff options
-rw-r--r-- | arch/x86/kernel/cpu/perf_event_intel_rapl.c | 33 |
1 files changed, 30 insertions, 3 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel_rapl.c b/arch/x86/kernel/cpu/perf_event_intel_rapl.c index 5ad35ad94d0f..3cec947e3b98 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_rapl.c +++ b/arch/x86/kernel/cpu/perf_event_intel_rapl.c | |||
@@ -59,7 +59,7 @@ | |||
59 | #define INTEL_RAPL_PKG 0x2 /* pseudo-encoding */ | 59 | #define INTEL_RAPL_PKG 0x2 /* pseudo-encoding */ |
60 | #define RAPL_IDX_RAM_NRG_STAT 2 /* DRAM */ | 60 | #define RAPL_IDX_RAM_NRG_STAT 2 /* DRAM */ |
61 | #define INTEL_RAPL_RAM 0x3 /* pseudo-encoding */ | 61 | #define INTEL_RAPL_RAM 0x3 /* pseudo-encoding */ |
62 | #define RAPL_IDX_PP1_NRG_STAT 3 /* DRAM */ | 62 | #define RAPL_IDX_PP1_NRG_STAT 3 /* gpu */ |
63 | #define INTEL_RAPL_PP1 0x4 /* pseudo-encoding */ | 63 | #define INTEL_RAPL_PP1 0x4 /* pseudo-encoding */ |
64 | 64 | ||
65 | /* Clients have PP0, PKG */ | 65 | /* Clients have PP0, PKG */ |
@@ -72,6 +72,12 @@ | |||
72 | 1<<RAPL_IDX_PKG_NRG_STAT|\ | 72 | 1<<RAPL_IDX_PKG_NRG_STAT|\ |
73 | 1<<RAPL_IDX_RAM_NRG_STAT) | 73 | 1<<RAPL_IDX_RAM_NRG_STAT) |
74 | 74 | ||
75 | /* Servers have PP0, PKG, RAM, PP1 */ | ||
76 | #define RAPL_IDX_HSW (1<<RAPL_IDX_PP0_NRG_STAT|\ | ||
77 | 1<<RAPL_IDX_PKG_NRG_STAT|\ | ||
78 | 1<<RAPL_IDX_RAM_NRG_STAT|\ | ||
79 | 1<<RAPL_IDX_PP1_NRG_STAT) | ||
80 | |||
75 | /* | 81 | /* |
76 | * event code: LSB 8 bits, passed in attr->config | 82 | * event code: LSB 8 bits, passed in attr->config |
77 | * any other bit is reserved | 83 | * any other bit is reserved |
@@ -425,6 +431,24 @@ static struct attribute *rapl_events_cln_attr[] = { | |||
425 | NULL, | 431 | NULL, |
426 | }; | 432 | }; |
427 | 433 | ||
434 | static struct attribute *rapl_events_hsw_attr[] = { | ||
435 | EVENT_PTR(rapl_cores), | ||
436 | EVENT_PTR(rapl_pkg), | ||
437 | EVENT_PTR(rapl_gpu), | ||
438 | EVENT_PTR(rapl_ram), | ||
439 | |||
440 | EVENT_PTR(rapl_cores_unit), | ||
441 | EVENT_PTR(rapl_pkg_unit), | ||
442 | EVENT_PTR(rapl_gpu_unit), | ||
443 | EVENT_PTR(rapl_ram_unit), | ||
444 | |||
445 | EVENT_PTR(rapl_cores_scale), | ||
446 | EVENT_PTR(rapl_pkg_scale), | ||
447 | EVENT_PTR(rapl_gpu_scale), | ||
448 | EVENT_PTR(rapl_ram_scale), | ||
449 | NULL, | ||
450 | }; | ||
451 | |||
428 | static struct attribute_group rapl_pmu_events_group = { | 452 | static struct attribute_group rapl_pmu_events_group = { |
429 | .name = "events", | 453 | .name = "events", |
430 | .attrs = NULL, /* patched at runtime */ | 454 | .attrs = NULL, /* patched at runtime */ |
@@ -631,11 +655,14 @@ static int __init rapl_pmu_init(void) | |||
631 | switch (boot_cpu_data.x86_model) { | 655 | switch (boot_cpu_data.x86_model) { |
632 | case 42: /* Sandy Bridge */ | 656 | case 42: /* Sandy Bridge */ |
633 | case 58: /* Ivy Bridge */ | 657 | case 58: /* Ivy Bridge */ |
634 | case 60: /* Haswell */ | ||
635 | case 69: /* Haswell-Celeron */ | ||
636 | rapl_cntr_mask = RAPL_IDX_CLN; | 658 | rapl_cntr_mask = RAPL_IDX_CLN; |
637 | rapl_pmu_events_group.attrs = rapl_events_cln_attr; | 659 | rapl_pmu_events_group.attrs = rapl_events_cln_attr; |
638 | break; | 660 | break; |
661 | case 60: /* Haswell */ | ||
662 | case 69: /* Haswell-Celeron */ | ||
663 | rapl_cntr_mask = RAPL_IDX_HSW; | ||
664 | rapl_pmu_events_group.attrs = rapl_events_hsw_attr; | ||
665 | break; | ||
639 | case 45: /* Sandy Bridge-EP */ | 666 | case 45: /* Sandy Bridge-EP */ |
640 | case 62: /* IvyTown */ | 667 | case 62: /* IvyTown */ |
641 | rapl_cntr_mask = RAPL_IDX_SRV; | 668 | rapl_cntr_mask = RAPL_IDX_SRV; |