diff options
-rw-r--r-- | arch/arm/mach-s3c2410/include/mach/irqs.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-s3c2410/include/mach/map.h | 1 | ||||
-rw-r--r-- | arch/arm/plat-samsung/devs.c | 697 |
3 files changed, 120 insertions, 582 deletions
diff --git a/arch/arm/mach-s3c2410/include/mach/irqs.h b/arch/arm/mach-s3c2410/include/mach/irqs.h index e5a68ea13113..e53b2177319e 100644 --- a/arch/arm/mach-s3c2410/include/mach/irqs.h +++ b/arch/arm/mach-s3c2410/include/mach/irqs.h | |||
@@ -191,9 +191,9 @@ | |||
191 | #define IRQ_LCD_SYSTEM IRQ_S3C2443_LCD2 | 191 | #define IRQ_LCD_SYSTEM IRQ_S3C2443_LCD2 |
192 | 192 | ||
193 | #ifdef CONFIG_CPU_S3C2440 | 193 | #ifdef CONFIG_CPU_S3C2440 |
194 | #define IRQ_S3C244x_AC97 IRQ_S3C2440_AC97 | 194 | #define IRQ_S3C244X_AC97 IRQ_S3C2440_AC97 |
195 | #else | 195 | #else |
196 | #define IRQ_S3C244x_AC97 IRQ_S3C2443_AC97 | 196 | #define IRQ_S3C244X_AC97 IRQ_S3C2443_AC97 |
197 | #endif | 197 | #endif |
198 | 198 | ||
199 | /* Our FIQs are routable from IRQ_EINT0 to IRQ_ADCPARENT */ | 199 | /* Our FIQs are routable from IRQ_EINT0 to IRQ_ADCPARENT */ |
diff --git a/arch/arm/mach-s3c2410/include/mach/map.h b/arch/arm/mach-s3c2410/include/mach/map.h index 4cf495f813a7..78ae807f1281 100644 --- a/arch/arm/mach-s3c2410/include/mach/map.h +++ b/arch/arm/mach-s3c2410/include/mach/map.h | |||
@@ -149,6 +149,7 @@ | |||
149 | #define S3C24XX_PA_RTC S3C2410_PA_RTC | 149 | #define S3C24XX_PA_RTC S3C2410_PA_RTC |
150 | #define S3C24XX_PA_ADC S3C2410_PA_ADC | 150 | #define S3C24XX_PA_ADC S3C2410_PA_ADC |
151 | #define S3C24XX_PA_SPI S3C2410_PA_SPI | 151 | #define S3C24XX_PA_SPI S3C2410_PA_SPI |
152 | #define S3C24XX_PA_SPI1 (S3C2410_PA_SPI + S3C2410_SPI1) | ||
152 | #define S3C24XX_PA_SDI S3C2410_PA_SDI | 153 | #define S3C24XX_PA_SDI S3C2410_PA_SDI |
153 | #define S3C24XX_PA_NAND S3C2410_PA_NAND | 154 | #define S3C24XX_PA_NAND S3C2410_PA_NAND |
154 | 155 | ||
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c index a2112aa88c1f..cb6fd9e2eb09 100644 --- a/arch/arm/plat-samsung/devs.c +++ b/arch/arm/plat-samsung/devs.c | |||
@@ -67,34 +67,11 @@ static u64 samsung_device_dma_mask = DMA_BIT_MASK(32); | |||
67 | /* AC97 */ | 67 | /* AC97 */ |
68 | #ifdef CONFIG_CPU_S3C2440 | 68 | #ifdef CONFIG_CPU_S3C2440 |
69 | static struct resource s3c_ac97_resource[] = { | 69 | static struct resource s3c_ac97_resource[] = { |
70 | [0] = { | 70 | [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97), |
71 | .start = S3C2440_PA_AC97, | 71 | [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97), |
72 | .end = S3C2440_PA_AC97 + S3C2440_SZ_AC97 - 1, | 72 | [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"), |
73 | .flags = IORESOURCE_MEM, | 73 | [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"), |
74 | }, | 74 | [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"), |
75 | [1] = { | ||
76 | .start = IRQ_S3C244x_AC97, | ||
77 | .end = IRQ_S3C244x_AC97, | ||
78 | .flags = IORESOURCE_IRQ, | ||
79 | }, | ||
80 | [2] = { | ||
81 | .name = "PCM out", | ||
82 | .start = DMACH_PCM_OUT, | ||
83 | .end = DMACH_PCM_OUT, | ||
84 | .flags = IORESOURCE_DMA, | ||
85 | }, | ||
86 | [3] = { | ||
87 | .name = "PCM in", | ||
88 | .start = DMACH_PCM_IN, | ||
89 | .end = DMACH_PCM_IN, | ||
90 | .flags = IORESOURCE_DMA, | ||
91 | }, | ||
92 | [4] = { | ||
93 | .name = "Mic in", | ||
94 | .start = DMACH_MIC_IN, | ||
95 | .end = DMACH_MIC_IN, | ||
96 | .flags = IORESOURCE_DMA, | ||
97 | }, | ||
98 | }; | 75 | }; |
99 | 76 | ||
100 | struct platform_device s3c_device_ac97 = { | 77 | struct platform_device s3c_device_ac97 = { |
@@ -113,21 +90,9 @@ struct platform_device s3c_device_ac97 = { | |||
113 | 90 | ||
114 | #ifdef CONFIG_PLAT_S3C24XX | 91 | #ifdef CONFIG_PLAT_S3C24XX |
115 | static struct resource s3c_adc_resource[] = { | 92 | static struct resource s3c_adc_resource[] = { |
116 | [0] = { | 93 | [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC), |
117 | .start = S3C24XX_PA_ADC, | 94 | [1] = DEFINE_RES_IRQ(IRQ_TC), |
118 | .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1, | 95 | [2] = DEFINE_RES_IRQ(IRQ_ADC), |
119 | .flags = IORESOURCE_MEM, | ||
120 | }, | ||
121 | [1] = { | ||
122 | .start = IRQ_TC, | ||
123 | .end = IRQ_TC, | ||
124 | .flags = IORESOURCE_IRQ, | ||
125 | }, | ||
126 | [2] = { | ||
127 | .start = IRQ_ADC, | ||
128 | .end = IRQ_ADC, | ||
129 | .flags = IORESOURCE_IRQ, | ||
130 | } | ||
131 | }; | 96 | }; |
132 | 97 | ||
133 | struct platform_device s3c_device_adc = { | 98 | struct platform_device s3c_device_adc = { |
@@ -140,21 +105,9 @@ struct platform_device s3c_device_adc = { | |||
140 | 105 | ||
141 | #if defined(CONFIG_SAMSUNG_DEV_ADC) | 106 | #if defined(CONFIG_SAMSUNG_DEV_ADC) |
142 | static struct resource s3c_adc_resource[] = { | 107 | static struct resource s3c_adc_resource[] = { |
143 | [0] = { | 108 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256), |
144 | .start = SAMSUNG_PA_ADC, | 109 | [1] = DEFINE_RES_IRQ(IRQ_TC), |
145 | .end = SAMSUNG_PA_ADC + SZ_256 - 1, | 110 | [2] = DEFINE_RES_IRQ(IRQ_ADC), |
146 | .flags = IORESOURCE_MEM, | ||
147 | }, | ||
148 | [1] = { | ||
149 | .start = IRQ_TC, | ||
150 | .end = IRQ_TC, | ||
151 | .flags = IORESOURCE_IRQ, | ||
152 | }, | ||
153 | [2] = { | ||
154 | .start = IRQ_ADC, | ||
155 | .end = IRQ_ADC, | ||
156 | .flags = IORESOURCE_IRQ, | ||
157 | }, | ||
158 | }; | 111 | }; |
159 | 112 | ||
160 | struct platform_device s3c_device_adc = { | 113 | struct platform_device s3c_device_adc = { |
@@ -169,16 +122,8 @@ struct platform_device s3c_device_adc = { | |||
169 | 122 | ||
170 | #ifdef CONFIG_CPU_S3C2440 | 123 | #ifdef CONFIG_CPU_S3C2440 |
171 | static struct resource s3c_camif_resource[] = { | 124 | static struct resource s3c_camif_resource[] = { |
172 | [0] = { | 125 | [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF), |
173 | .start = S3C2440_PA_CAMIF, | 126 | [1] = DEFINE_RES_IRQ(IRQ_CAM), |
174 | .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1, | ||
175 | .flags = IORESOURCE_MEM, | ||
176 | }, | ||
177 | [1] = { | ||
178 | .start = IRQ_CAM, | ||
179 | .end = IRQ_CAM, | ||
180 | .flags = IORESOURCE_IRQ, | ||
181 | } | ||
182 | }; | 127 | }; |
183 | 128 | ||
184 | struct platform_device s3c_device_camif = { | 129 | struct platform_device s3c_device_camif = { |
@@ -217,26 +162,10 @@ struct platform_device samsung_asoc_idma = { | |||
217 | 162 | ||
218 | #ifdef CONFIG_S3C_DEV_FB | 163 | #ifdef CONFIG_S3C_DEV_FB |
219 | static struct resource s3c_fb_resource[] = { | 164 | static struct resource s3c_fb_resource[] = { |
220 | [0] = { | 165 | [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K), |
221 | .start = S3C_PA_FB, | 166 | [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC), |
222 | .end = S3C_PA_FB + SZ_16K - 1, | 167 | [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO), |
223 | .flags = IORESOURCE_MEM, | 168 | [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM), |
224 | }, | ||
225 | [1] = { | ||
226 | .start = IRQ_LCD_VSYNC, | ||
227 | .end = IRQ_LCD_VSYNC, | ||
228 | .flags = IORESOURCE_IRQ, | ||
229 | }, | ||
230 | [2] = { | ||
231 | .start = IRQ_LCD_FIFO, | ||
232 | .end = IRQ_LCD_FIFO, | ||
233 | .flags = IORESOURCE_IRQ, | ||
234 | }, | ||
235 | [3] = { | ||
236 | .start = IRQ_LCD_SYSTEM, | ||
237 | .end = IRQ_LCD_SYSTEM, | ||
238 | .flags = IORESOURCE_IRQ, | ||
239 | }, | ||
240 | }; | 169 | }; |
241 | 170 | ||
242 | struct platform_device s3c_device_fb = { | 171 | struct platform_device s3c_device_fb = { |
@@ -261,16 +190,8 @@ void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd) | |||
261 | 190 | ||
262 | #ifdef CONFIG_S5P_DEV_FIMC0 | 191 | #ifdef CONFIG_S5P_DEV_FIMC0 |
263 | static struct resource s5p_fimc0_resource[] = { | 192 | static struct resource s5p_fimc0_resource[] = { |
264 | [0] = { | 193 | [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K), |
265 | .start = S5P_PA_FIMC0, | 194 | [1] = DEFINE_RES_IRQ(IRQ_FIMC0), |
266 | .end = S5P_PA_FIMC0 + SZ_4K - 1, | ||
267 | .flags = IORESOURCE_MEM, | ||
268 | }, | ||
269 | [1] = { | ||
270 | .start = IRQ_FIMC0, | ||
271 | .end = IRQ_FIMC0, | ||
272 | .flags = IORESOURCE_IRQ, | ||
273 | }, | ||
274 | }; | 195 | }; |
275 | 196 | ||
276 | struct platform_device s5p_device_fimc0 = { | 197 | struct platform_device s5p_device_fimc0 = { |
@@ -287,16 +208,8 @@ struct platform_device s5p_device_fimc0 = { | |||
287 | 208 | ||
288 | #ifdef CONFIG_S5P_DEV_FIMC1 | 209 | #ifdef CONFIG_S5P_DEV_FIMC1 |
289 | static struct resource s5p_fimc1_resource[] = { | 210 | static struct resource s5p_fimc1_resource[] = { |
290 | [0] = { | 211 | [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K), |
291 | .start = S5P_PA_FIMC1, | 212 | [1] = DEFINE_RES_IRQ(IRQ_FIMC1), |
292 | .end = S5P_PA_FIMC1 + SZ_4K - 1, | ||
293 | .flags = IORESOURCE_MEM, | ||
294 | }, | ||
295 | [1] = { | ||
296 | .start = IRQ_FIMC1, | ||
297 | .end = IRQ_FIMC1, | ||
298 | .flags = IORESOURCE_IRQ, | ||
299 | }, | ||
300 | }; | 213 | }; |
301 | 214 | ||
302 | struct platform_device s5p_device_fimc1 = { | 215 | struct platform_device s5p_device_fimc1 = { |
@@ -313,16 +226,8 @@ struct platform_device s5p_device_fimc1 = { | |||
313 | 226 | ||
314 | #ifdef CONFIG_S5P_DEV_FIMC2 | 227 | #ifdef CONFIG_S5P_DEV_FIMC2 |
315 | static struct resource s5p_fimc2_resource[] = { | 228 | static struct resource s5p_fimc2_resource[] = { |
316 | [0] = { | 229 | [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K), |
317 | .start = S5P_PA_FIMC2, | 230 | [1] = DEFINE_RES_IRQ(IRQ_FIMC2), |
318 | .end = S5P_PA_FIMC2 + SZ_4K - 1, | ||
319 | .flags = IORESOURCE_MEM, | ||
320 | }, | ||
321 | [1] = { | ||
322 | .start = IRQ_FIMC2, | ||
323 | .end = IRQ_FIMC2, | ||
324 | .flags = IORESOURCE_IRQ, | ||
325 | }, | ||
326 | }; | 231 | }; |
327 | 232 | ||
328 | struct platform_device s5p_device_fimc2 = { | 233 | struct platform_device s5p_device_fimc2 = { |
@@ -339,16 +244,8 @@ struct platform_device s5p_device_fimc2 = { | |||
339 | 244 | ||
340 | #ifdef CONFIG_S5P_DEV_FIMC3 | 245 | #ifdef CONFIG_S5P_DEV_FIMC3 |
341 | static struct resource s5p_fimc3_resource[] = { | 246 | static struct resource s5p_fimc3_resource[] = { |
342 | [0] = { | 247 | [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K), |
343 | .start = S5P_PA_FIMC3, | 248 | [1] = DEFINE_RES_IRQ(IRQ_FIMC3), |
344 | .end = S5P_PA_FIMC3 + SZ_4K - 1, | ||
345 | .flags = IORESOURCE_MEM, | ||
346 | }, | ||
347 | [1] = { | ||
348 | .start = IRQ_FIMC3, | ||
349 | .end = IRQ_FIMC3, | ||
350 | .flags = IORESOURCE_IRQ, | ||
351 | }, | ||
352 | }; | 249 | }; |
353 | 250 | ||
354 | struct platform_device s5p_device_fimc3 = { | 251 | struct platform_device s5p_device_fimc3 = { |
@@ -367,26 +264,10 @@ struct platform_device s5p_device_fimc3 = { | |||
367 | 264 | ||
368 | #ifdef CONFIG_S5P_DEV_FIMD0 | 265 | #ifdef CONFIG_S5P_DEV_FIMD0 |
369 | static struct resource s5p_fimd0_resource[] = { | 266 | static struct resource s5p_fimd0_resource[] = { |
370 | [0] = { | 267 | [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K), |
371 | .start = S5P_PA_FIMD0, | 268 | [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC), |
372 | .end = S5P_PA_FIMD0 + SZ_32K - 1, | 269 | [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO), |
373 | .flags = IORESOURCE_MEM, | 270 | [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM), |
374 | }, | ||
375 | [1] = { | ||
376 | .start = IRQ_FIMD0_VSYNC, | ||
377 | .end = IRQ_FIMD0_VSYNC, | ||
378 | .flags = IORESOURCE_IRQ, | ||
379 | }, | ||
380 | [2] = { | ||
381 | .start = IRQ_FIMD0_FIFO, | ||
382 | .end = IRQ_FIMD0_FIFO, | ||
383 | .flags = IORESOURCE_IRQ, | ||
384 | }, | ||
385 | [3] = { | ||
386 | .start = IRQ_FIMD0_SYSTEM, | ||
387 | .end = IRQ_FIMD0_SYSTEM, | ||
388 | .flags = IORESOURCE_IRQ, | ||
389 | }, | ||
390 | }; | 271 | }; |
391 | 272 | ||
392 | struct platform_device s5p_device_fimd0 = { | 273 | struct platform_device s5p_device_fimd0 = { |
@@ -425,20 +306,10 @@ void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd) | |||
425 | 306 | ||
426 | /* HSMMC */ | 307 | /* HSMMC */ |
427 | 308 | ||
428 | #define S3C_SZ_HSMMC 0x1000 | ||
429 | |||
430 | #ifdef CONFIG_S3C_DEV_HSMMC | 309 | #ifdef CONFIG_S3C_DEV_HSMMC |
431 | static struct resource s3c_hsmmc_resource[] = { | 310 | static struct resource s3c_hsmmc_resource[] = { |
432 | [0] = { | 311 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K), |
433 | .start = S3C_PA_HSMMC0, | 312 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC0), |
434 | .end = S3C_PA_HSMMC0 + S3C_SZ_HSMMC - 1, | ||
435 | .flags = IORESOURCE_MEM, | ||
436 | }, | ||
437 | [1] = { | ||
438 | .start = IRQ_HSMMC0, | ||
439 | .end = IRQ_HSMMC0, | ||
440 | .flags = IORESOURCE_IRQ, | ||
441 | } | ||
442 | }; | 313 | }; |
443 | 314 | ||
444 | struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = { | 315 | struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = { |
@@ -468,16 +339,8 @@ void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd) | |||
468 | 339 | ||
469 | #ifdef CONFIG_S3C_DEV_HSMMC1 | 340 | #ifdef CONFIG_S3C_DEV_HSMMC1 |
470 | static struct resource s3c_hsmmc1_resource[] = { | 341 | static struct resource s3c_hsmmc1_resource[] = { |
471 | [0] = { | 342 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K), |
472 | .start = S3C_PA_HSMMC1, | 343 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC1), |
473 | .end = S3C_PA_HSMMC1 + S3C_SZ_HSMMC - 1, | ||
474 | .flags = IORESOURCE_MEM, | ||
475 | }, | ||
476 | [1] = { | ||
477 | .start = IRQ_HSMMC1, | ||
478 | .end = IRQ_HSMMC1, | ||
479 | .flags = IORESOURCE_IRQ, | ||
480 | } | ||
481 | }; | 344 | }; |
482 | 345 | ||
483 | struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = { | 346 | struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = { |
@@ -509,16 +372,8 @@ void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd) | |||
509 | 372 | ||
510 | #ifdef CONFIG_S3C_DEV_HSMMC2 | 373 | #ifdef CONFIG_S3C_DEV_HSMMC2 |
511 | static struct resource s3c_hsmmc2_resource[] = { | 374 | static struct resource s3c_hsmmc2_resource[] = { |
512 | [0] = { | 375 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K), |
513 | .start = S3C_PA_HSMMC2, | 376 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC2), |
514 | .end = S3C_PA_HSMMC2 + S3C_SZ_HSMMC - 1, | ||
515 | .flags = IORESOURCE_MEM, | ||
516 | }, | ||
517 | [1] = { | ||
518 | .start = IRQ_HSMMC2, | ||
519 | .end = IRQ_HSMMC2, | ||
520 | .flags = IORESOURCE_IRQ, | ||
521 | } | ||
522 | }; | 377 | }; |
523 | 378 | ||
524 | struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = { | 379 | struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = { |
@@ -548,16 +403,8 @@ void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd) | |||
548 | 403 | ||
549 | #ifdef CONFIG_S3C_DEV_HSMMC3 | 404 | #ifdef CONFIG_S3C_DEV_HSMMC3 |
550 | static struct resource s3c_hsmmc3_resource[] = { | 405 | static struct resource s3c_hsmmc3_resource[] = { |
551 | [0] = { | 406 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K), |
552 | .start = S3C_PA_HSMMC3, | 407 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC3), |
553 | .end = S3C_PA_HSMMC3 + S3C_SZ_HSMMC - 1, | ||
554 | .flags = IORESOURCE_MEM, | ||
555 | }, | ||
556 | [1] = { | ||
557 | .start = IRQ_HSMMC3, | ||
558 | .end = IRQ_HSMMC3, | ||
559 | .flags = IORESOURCE_IRQ, | ||
560 | } | ||
561 | }; | 408 | }; |
562 | 409 | ||
563 | struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = { | 410 | struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = { |
@@ -588,16 +435,8 @@ void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd) | |||
588 | /* I2C */ | 435 | /* I2C */ |
589 | 436 | ||
590 | static struct resource s3c_i2c0_resource[] = { | 437 | static struct resource s3c_i2c0_resource[] = { |
591 | [0] = { | 438 | [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K), |
592 | .start = S3C_PA_IIC, | 439 | [1] = DEFINE_RES_IRQ(IRQ_IIC), |
593 | .end = S3C_PA_IIC + SZ_4K - 1, | ||
594 | .flags = IORESOURCE_MEM, | ||
595 | }, | ||
596 | [1] = { | ||
597 | .start = IRQ_IIC, | ||
598 | .end = IRQ_IIC, | ||
599 | .flags = IORESOURCE_IRQ, | ||
600 | }, | ||
601 | }; | 440 | }; |
602 | 441 | ||
603 | struct platform_device s3c_device_i2c0 = { | 442 | struct platform_device s3c_device_i2c0 = { |
@@ -634,16 +473,8 @@ void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd) | |||
634 | 473 | ||
635 | #ifdef CONFIG_S3C_DEV_I2C1 | 474 | #ifdef CONFIG_S3C_DEV_I2C1 |
636 | static struct resource s3c_i2c1_resource[] = { | 475 | static struct resource s3c_i2c1_resource[] = { |
637 | [0] = { | 476 | [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K), |
638 | .start = S3C_PA_IIC1, | 477 | [1] = DEFINE_RES_IRQ(IRQ_IIC1), |
639 | .end = S3C_PA_IIC1 + SZ_4K - 1, | ||
640 | .flags = IORESOURCE_MEM, | ||
641 | }, | ||
642 | [1] = { | ||
643 | .start = IRQ_IIC1, | ||
644 | .end = IRQ_IIC1, | ||
645 | .flags = IORESOURCE_IRQ, | ||
646 | }, | ||
647 | }; | 478 | }; |
648 | 479 | ||
649 | struct platform_device s3c_device_i2c1 = { | 480 | struct platform_device s3c_device_i2c1 = { |
@@ -672,16 +503,8 @@ void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd) | |||
672 | 503 | ||
673 | #ifdef CONFIG_S3C_DEV_I2C2 | 504 | #ifdef CONFIG_S3C_DEV_I2C2 |
674 | static struct resource s3c_i2c2_resource[] = { | 505 | static struct resource s3c_i2c2_resource[] = { |
675 | [0] = { | 506 | [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K), |
676 | .start = S3C_PA_IIC2, | 507 | [1] = DEFINE_RES_IRQ(IRQ_IIC2), |
677 | .end = S3C_PA_IIC2 + SZ_4K - 1, | ||
678 | .flags = IORESOURCE_MEM, | ||
679 | }, | ||
680 | [1] = { | ||
681 | .start = IRQ_IIC2, | ||
682 | .end = IRQ_IIC2, | ||
683 | .flags = IORESOURCE_IRQ, | ||
684 | }, | ||
685 | }; | 508 | }; |
686 | 509 | ||
687 | struct platform_device s3c_device_i2c2 = { | 510 | struct platform_device s3c_device_i2c2 = { |
@@ -710,16 +533,8 @@ void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd) | |||
710 | 533 | ||
711 | #ifdef CONFIG_S3C_DEV_I2C3 | 534 | #ifdef CONFIG_S3C_DEV_I2C3 |
712 | static struct resource s3c_i2c3_resource[] = { | 535 | static struct resource s3c_i2c3_resource[] = { |
713 | [0] = { | 536 | [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K), |
714 | .start = S3C_PA_IIC3, | 537 | [1] = DEFINE_RES_IRQ(IRQ_IIC3), |
715 | .end = S3C_PA_IIC3 + SZ_4K - 1, | ||
716 | .flags = IORESOURCE_MEM, | ||
717 | }, | ||
718 | [1] = { | ||
719 | .start = IRQ_IIC3, | ||
720 | .end = IRQ_IIC3, | ||
721 | .flags = IORESOURCE_IRQ, | ||
722 | }, | ||
723 | }; | 538 | }; |
724 | 539 | ||
725 | struct platform_device s3c_device_i2c3 = { | 540 | struct platform_device s3c_device_i2c3 = { |
@@ -748,16 +563,8 @@ void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd) | |||
748 | 563 | ||
749 | #ifdef CONFIG_S3C_DEV_I2C4 | 564 | #ifdef CONFIG_S3C_DEV_I2C4 |
750 | static struct resource s3c_i2c4_resource[] = { | 565 | static struct resource s3c_i2c4_resource[] = { |
751 | [0] = { | 566 | [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K), |
752 | .start = S3C_PA_IIC4, | 567 | [1] = DEFINE_RES_IRQ(IRQ_IIC4), |
753 | .end = S3C_PA_IIC4 + SZ_4K - 1, | ||
754 | .flags = IORESOURCE_MEM, | ||
755 | }, | ||
756 | [1] = { | ||
757 | .start = IRQ_IIC4, | ||
758 | .end = IRQ_IIC4, | ||
759 | .flags = IORESOURCE_IRQ, | ||
760 | }, | ||
761 | }; | 568 | }; |
762 | 569 | ||
763 | struct platform_device s3c_device_i2c4 = { | 570 | struct platform_device s3c_device_i2c4 = { |
@@ -786,16 +593,8 @@ void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd) | |||
786 | 593 | ||
787 | #ifdef CONFIG_S3C_DEV_I2C5 | 594 | #ifdef CONFIG_S3C_DEV_I2C5 |
788 | static struct resource s3c_i2c5_resource[] = { | 595 | static struct resource s3c_i2c5_resource[] = { |
789 | [0] = { | 596 | [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K), |
790 | .start = S3C_PA_IIC5, | 597 | [1] = DEFINE_RES_IRQ(IRQ_IIC5), |
791 | .end = S3C_PA_IIC5 + SZ_4K - 1, | ||
792 | .flags = IORESOURCE_MEM, | ||
793 | }, | ||
794 | [1] = { | ||
795 | .start = IRQ_IIC5, | ||
796 | .end = IRQ_IIC5, | ||
797 | .flags = IORESOURCE_IRQ, | ||
798 | }, | ||
799 | }; | 598 | }; |
800 | 599 | ||
801 | struct platform_device s3c_device_i2c5 = { | 600 | struct platform_device s3c_device_i2c5 = { |
@@ -824,16 +623,8 @@ void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd) | |||
824 | 623 | ||
825 | #ifdef CONFIG_S3C_DEV_I2C6 | 624 | #ifdef CONFIG_S3C_DEV_I2C6 |
826 | static struct resource s3c_i2c6_resource[] = { | 625 | static struct resource s3c_i2c6_resource[] = { |
827 | [0] = { | 626 | [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K), |
828 | .start = S3C_PA_IIC6, | 627 | [1] = DEFINE_RES_IRQ(IRQ_IIC6), |
829 | .end = S3C_PA_IIC6 + SZ_4K - 1, | ||
830 | .flags = IORESOURCE_MEM, | ||
831 | }, | ||
832 | [1] = { | ||
833 | .start = IRQ_IIC6, | ||
834 | .end = IRQ_IIC6, | ||
835 | .flags = IORESOURCE_IRQ, | ||
836 | }, | ||
837 | }; | 628 | }; |
838 | 629 | ||
839 | struct platform_device s3c_device_i2c6 = { | 630 | struct platform_device s3c_device_i2c6 = { |
@@ -862,16 +653,8 @@ void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd) | |||
862 | 653 | ||
863 | #ifdef CONFIG_S3C_DEV_I2C7 | 654 | #ifdef CONFIG_S3C_DEV_I2C7 |
864 | static struct resource s3c_i2c7_resource[] = { | 655 | static struct resource s3c_i2c7_resource[] = { |
865 | [0] = { | 656 | [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K), |
866 | .start = S3C_PA_IIC7, | 657 | [1] = DEFINE_RES_IRQ(IRQ_IIC7), |
867 | .end = S3C_PA_IIC7 + SZ_4K - 1, | ||
868 | .flags = IORESOURCE_MEM, | ||
869 | }, | ||
870 | [1] = { | ||
871 | .start = IRQ_IIC7, | ||
872 | .end = IRQ_IIC7, | ||
873 | .flags = IORESOURCE_IRQ, | ||
874 | }, | ||
875 | }; | 658 | }; |
876 | 659 | ||
877 | struct platform_device s3c_device_i2c7 = { | 660 | struct platform_device s3c_device_i2c7 = { |
@@ -902,16 +685,8 @@ void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd) | |||
902 | 685 | ||
903 | #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY | 686 | #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY |
904 | static struct resource s5p_i2c_resource[] = { | 687 | static struct resource s5p_i2c_resource[] = { |
905 | [0] = { | 688 | [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K), |
906 | .start = S5P_PA_IIC_HDMIPHY, | 689 | [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY), |
907 | .end = S5P_PA_IIC_HDMIPHY + SZ_4K - 1, | ||
908 | .flags = IORESOURCE_MEM, | ||
909 | }, | ||
910 | [1] = { | ||
911 | .start = IRQ_IIC_HDMIPHY, | ||
912 | .end = IRQ_IIC_HDMIPHY, | ||
913 | .flags = IORESOURCE_IRQ, | ||
914 | }, | ||
915 | }; | 690 | }; |
916 | 691 | ||
917 | struct platform_device s5p_device_i2c_hdmiphy = { | 692 | struct platform_device s5p_device_i2c_hdmiphy = { |
@@ -945,11 +720,7 @@ void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd) | |||
945 | 720 | ||
946 | #ifdef CONFIG_PLAT_S3C24XX | 721 | #ifdef CONFIG_PLAT_S3C24XX |
947 | static struct resource s3c_iis_resource[] = { | 722 | static struct resource s3c_iis_resource[] = { |
948 | [0] = { | 723 | [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS), |
949 | .start = S3C24XX_PA_IIS, | ||
950 | .end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS - 1, | ||
951 | .flags = IORESOURCE_MEM, | ||
952 | } | ||
953 | }; | 724 | }; |
954 | 725 | ||
955 | struct platform_device s3c_device_iis = { | 726 | struct platform_device s3c_device_iis = { |
@@ -979,16 +750,8 @@ struct platform_device s3c2412_device_iis = { | |||
979 | 750 | ||
980 | #ifdef CONFIG_SAMSUNG_DEV_IDE | 751 | #ifdef CONFIG_SAMSUNG_DEV_IDE |
981 | static struct resource s3c_cfcon_resource[] = { | 752 | static struct resource s3c_cfcon_resource[] = { |
982 | [0] = { | 753 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K), |
983 | .start = SAMSUNG_PA_CFCON, | 754 | [1] = DEFINE_RES_IRQ(IRQ_CFCON), |
984 | .end = SAMSUNG_PA_CFCON + SZ_16K - 1, | ||
985 | .flags = IORESOURCE_MEM, | ||
986 | }, | ||
987 | [1] = { | ||
988 | .start = IRQ_CFCON, | ||
989 | .end = IRQ_CFCON, | ||
990 | .flags = IORESOURCE_IRQ, | ||
991 | }, | ||
992 | }; | 755 | }; |
993 | 756 | ||
994 | struct platform_device s3c_device_cfcon = { | 757 | struct platform_device s3c_device_cfcon = { |
@@ -1008,16 +771,8 @@ void s3c_ide_set_platdata(struct s3c_ide_platdata *pdata) | |||
1008 | 771 | ||
1009 | #ifdef CONFIG_SAMSUNG_DEV_KEYPAD | 772 | #ifdef CONFIG_SAMSUNG_DEV_KEYPAD |
1010 | static struct resource samsung_keypad_resources[] = { | 773 | static struct resource samsung_keypad_resources[] = { |
1011 | [0] = { | 774 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32), |
1012 | .start = SAMSUNG_PA_KEYPAD, | 775 | [1] = DEFINE_RES_IRQ(IRQ_KEYPAD), |
1013 | .end = SAMSUNG_PA_KEYPAD + 0x20 - 1, | ||
1014 | .flags = IORESOURCE_MEM, | ||
1015 | }, | ||
1016 | [1] = { | ||
1017 | .start = IRQ_KEYPAD, | ||
1018 | .end = IRQ_KEYPAD, | ||
1019 | .flags = IORESOURCE_IRQ, | ||
1020 | }, | ||
1021 | }; | 776 | }; |
1022 | 777 | ||
1023 | struct platform_device samsung_device_keypad = { | 778 | struct platform_device samsung_device_keypad = { |
@@ -1043,16 +798,8 @@ void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd) | |||
1043 | 798 | ||
1044 | #ifdef CONFIG_PLAT_S3C24XX | 799 | #ifdef CONFIG_PLAT_S3C24XX |
1045 | static struct resource s3c_lcd_resource[] = { | 800 | static struct resource s3c_lcd_resource[] = { |
1046 | [0] = { | 801 | [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD), |
1047 | .start = S3C24XX_PA_LCD, | 802 | [1] = DEFINE_RES_IRQ(IRQ_LCD), |
1048 | .end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1, | ||
1049 | .flags = IORESOURCE_MEM, | ||
1050 | }, | ||
1051 | [1] = { | ||
1052 | .start = IRQ_LCD, | ||
1053 | .end = IRQ_LCD, | ||
1054 | .flags = IORESOURCE_IRQ, | ||
1055 | } | ||
1056 | }; | 803 | }; |
1057 | 804 | ||
1058 | struct platform_device s3c_device_lcd = { | 805 | struct platform_device s3c_device_lcd = { |
@@ -1087,16 +834,8 @@ void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd) | |||
1087 | 834 | ||
1088 | #ifdef CONFIG_S5P_DEV_MFC | 835 | #ifdef CONFIG_S5P_DEV_MFC |
1089 | static struct resource s5p_mfc_resource[] = { | 836 | static struct resource s5p_mfc_resource[] = { |
1090 | [0] = { | 837 | [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K), |
1091 | .start = S5P_PA_MFC, | 838 | [1] = DEFINE_RES_IRQ(IRQ_MFC), |
1092 | .end = S5P_PA_MFC + SZ_64K - 1, | ||
1093 | .flags = IORESOURCE_MEM, | ||
1094 | }, | ||
1095 | [1] = { | ||
1096 | .start = IRQ_MFC, | ||
1097 | .end = IRQ_MFC, | ||
1098 | .flags = IORESOURCE_IRQ, | ||
1099 | } | ||
1100 | }; | 839 | }; |
1101 | 840 | ||
1102 | struct platform_device s5p_device_mfc = { | 841 | struct platform_device s5p_device_mfc = { |
@@ -1139,16 +878,8 @@ struct platform_device s5p_device_mfc_r = { | |||
1139 | 878 | ||
1140 | #ifdef CONFIG_S5P_DEV_CSIS0 | 879 | #ifdef CONFIG_S5P_DEV_CSIS0 |
1141 | static struct resource s5p_mipi_csis0_resource[] = { | 880 | static struct resource s5p_mipi_csis0_resource[] = { |
1142 | [0] = { | 881 | [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_4K), |
1143 | .start = S5P_PA_MIPI_CSIS0, | 882 | [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0), |
1144 | .end = S5P_PA_MIPI_CSIS0 + SZ_4K - 1, | ||
1145 | .flags = IORESOURCE_MEM, | ||
1146 | }, | ||
1147 | [1] = { | ||
1148 | .start = IRQ_MIPI_CSIS0, | ||
1149 | .end = IRQ_MIPI_CSIS0, | ||
1150 | .flags = IORESOURCE_IRQ, | ||
1151 | } | ||
1152 | }; | 883 | }; |
1153 | 884 | ||
1154 | struct platform_device s5p_device_mipi_csis0 = { | 885 | struct platform_device s5p_device_mipi_csis0 = { |
@@ -1161,16 +892,8 @@ struct platform_device s5p_device_mipi_csis0 = { | |||
1161 | 892 | ||
1162 | #ifdef CONFIG_S5P_DEV_CSIS1 | 893 | #ifdef CONFIG_S5P_DEV_CSIS1 |
1163 | static struct resource s5p_mipi_csis1_resource[] = { | 894 | static struct resource s5p_mipi_csis1_resource[] = { |
1164 | [0] = { | 895 | [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_4K), |
1165 | .start = S5P_PA_MIPI_CSIS1, | 896 | [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1), |
1166 | .end = S5P_PA_MIPI_CSIS1 + SZ_4K - 1, | ||
1167 | .flags = IORESOURCE_MEM, | ||
1168 | }, | ||
1169 | [1] = { | ||
1170 | .start = IRQ_MIPI_CSIS1, | ||
1171 | .end = IRQ_MIPI_CSIS1, | ||
1172 | .flags = IORESOURCE_IRQ, | ||
1173 | }, | ||
1174 | }; | 897 | }; |
1175 | 898 | ||
1176 | struct platform_device s5p_device_mipi_csis1 = { | 899 | struct platform_device s5p_device_mipi_csis1 = { |
@@ -1185,11 +908,7 @@ struct platform_device s5p_device_mipi_csis1 = { | |||
1185 | 908 | ||
1186 | #ifdef CONFIG_S3C_DEV_NAND | 909 | #ifdef CONFIG_S3C_DEV_NAND |
1187 | static struct resource s3c_nand_resource[] = { | 910 | static struct resource s3c_nand_resource[] = { |
1188 | [0] = { | 911 | [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M), |
1189 | .start = S3C_PA_NAND, | ||
1190 | .end = S3C_PA_NAND + SZ_1M, | ||
1191 | .flags = IORESOURCE_MEM, | ||
1192 | } | ||
1193 | }; | 912 | }; |
1194 | 913 | ||
1195 | struct platform_device s3c_device_nand = { | 914 | struct platform_device s3c_device_nand = { |
@@ -1294,21 +1013,9 @@ void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand) | |||
1294 | 1013 | ||
1295 | #ifdef CONFIG_S3C_DEV_ONENAND | 1014 | #ifdef CONFIG_S3C_DEV_ONENAND |
1296 | static struct resource s3c_onenand_resources[] = { | 1015 | static struct resource s3c_onenand_resources[] = { |
1297 | [0] = { | 1016 | [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K), |
1298 | .start = S3C_PA_ONENAND, | 1017 | [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF), |
1299 | .end = S3C_PA_ONENAND + 0x400 - 1, | 1018 | [2] = DEFINE_RES_IRQ(IRQ_ONENAND), |
1300 | .flags = IORESOURCE_MEM, | ||
1301 | }, | ||
1302 | [1] = { | ||
1303 | .start = S3C_PA_ONENAND_BUF, | ||
1304 | .end = S3C_PA_ONENAND_BUF + S3C_SZ_ONENAND_BUF - 1, | ||
1305 | .flags = IORESOURCE_MEM, | ||
1306 | }, | ||
1307 | [2] = { | ||
1308 | .start = IRQ_ONENAND, | ||
1309 | .end = IRQ_ONENAND, | ||
1310 | .flags = IORESOURCE_IRQ, | ||
1311 | }, | ||
1312 | }; | 1019 | }; |
1313 | 1020 | ||
1314 | struct platform_device s3c_device_onenand = { | 1021 | struct platform_device s3c_device_onenand = { |
@@ -1321,21 +1028,9 @@ struct platform_device s3c_device_onenand = { | |||
1321 | 1028 | ||
1322 | #ifdef CONFIG_S3C64XX_DEV_ONENAND1 | 1029 | #ifdef CONFIG_S3C64XX_DEV_ONENAND1 |
1323 | static struct resource s3c64xx_onenand1_resources[] = { | 1030 | static struct resource s3c64xx_onenand1_resources[] = { |
1324 | [0] = { | 1031 | [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K), |
1325 | .start = S3C64XX_PA_ONENAND1, | 1032 | [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF), |
1326 | .end = S3C64XX_PA_ONENAND1 + 0x400 - 1, | 1033 | [2] = DEFINE_RES_IRQ(IRQ_ONENAND1), |
1327 | .flags = IORESOURCE_MEM, | ||
1328 | }, | ||
1329 | [1] = { | ||
1330 | .start = S3C64XX_PA_ONENAND1_BUF, | ||
1331 | .end = S3C64XX_PA_ONENAND1_BUF + S3C64XX_SZ_ONENAND1_BUF - 1, | ||
1332 | .flags = IORESOURCE_MEM, | ||
1333 | }, | ||
1334 | [2] = { | ||
1335 | .start = IRQ_ONENAND1, | ||
1336 | .end = IRQ_ONENAND1, | ||
1337 | .flags = IORESOURCE_IRQ, | ||
1338 | }, | ||
1339 | }; | 1034 | }; |
1340 | 1035 | ||
1341 | struct platform_device s3c64xx_device_onenand1 = { | 1036 | struct platform_device s3c64xx_device_onenand1 = { |
@@ -1354,21 +1049,9 @@ void s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata) | |||
1354 | 1049 | ||
1355 | #ifdef CONFIG_S5P_DEV_ONENAND | 1050 | #ifdef CONFIG_S5P_DEV_ONENAND |
1356 | static struct resource s5p_onenand_resources[] = { | 1051 | static struct resource s5p_onenand_resources[] = { |
1357 | [0] = { | 1052 | [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K), |
1358 | .start = S5P_PA_ONENAND, | 1053 | [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K), |
1359 | .end = S5P_PA_ONENAND + SZ_128K - 1, | 1054 | [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI), |
1360 | .flags = IORESOURCE_MEM, | ||
1361 | }, | ||
1362 | [1] = { | ||
1363 | .start = S5P_PA_ONENAND_DMA, | ||
1364 | .end = S5P_PA_ONENAND_DMA + SZ_8K - 1, | ||
1365 | .flags = IORESOURCE_MEM, | ||
1366 | }, | ||
1367 | [2] = { | ||
1368 | .start = IRQ_ONENAND_AUDI, | ||
1369 | .end = IRQ_ONENAND_AUDI, | ||
1370 | .flags = IORESOURCE_IRQ, | ||
1371 | }, | ||
1372 | }; | 1055 | }; |
1373 | 1056 | ||
1374 | struct platform_device s5p_device_onenand = { | 1057 | struct platform_device s5p_device_onenand = { |
@@ -1382,17 +1065,15 @@ struct platform_device s5p_device_onenand = { | |||
1382 | /* PMU */ | 1065 | /* PMU */ |
1383 | 1066 | ||
1384 | #ifdef CONFIG_PLAT_S5P | 1067 | #ifdef CONFIG_PLAT_S5P |
1385 | static struct resource s5p_pmu_resource = { | 1068 | static struct resource s5p_pmu_resource[] = { |
1386 | .start = IRQ_PMU, | 1069 | DEFINE_RES_IRQ(IRQ_PMU) |
1387 | .end = IRQ_PMU, | ||
1388 | .flags = IORESOURCE_IRQ, | ||
1389 | }; | 1070 | }; |
1390 | 1071 | ||
1391 | struct platform_device s5p_device_pmu = { | 1072 | struct platform_device s5p_device_pmu = { |
1392 | .name = "arm-pmu", | 1073 | .name = "arm-pmu", |
1393 | .id = ARM_PMU_DEVICE_CPU, | 1074 | .id = ARM_PMU_DEVICE_CPU, |
1394 | .num_resources = 1, | 1075 | .num_resources = ARRAY_SIZE(s5p_pmu_resource), |
1395 | .resource = &s5p_pmu_resource, | 1076 | .resource = s5p_pmu_resource, |
1396 | }; | 1077 | }; |
1397 | 1078 | ||
1398 | static int __init s5p_pmu_init(void) | 1079 | static int __init s5p_pmu_init(void) |
@@ -1442,21 +1123,9 @@ struct platform_device s3c_device_timer[] = { | |||
1442 | 1123 | ||
1443 | #ifdef CONFIG_PLAT_S3C24XX | 1124 | #ifdef CONFIG_PLAT_S3C24XX |
1444 | static struct resource s3c_rtc_resource[] = { | 1125 | static struct resource s3c_rtc_resource[] = { |
1445 | [0] = { | 1126 | [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256), |
1446 | .start = S3C24XX_PA_RTC, | 1127 | [1] = DEFINE_RES_IRQ(IRQ_RTC), |
1447 | .end = S3C24XX_PA_RTC + 0xff, | 1128 | [2] = DEFINE_RES_IRQ(IRQ_TICK), |
1448 | .flags = IORESOURCE_MEM, | ||
1449 | }, | ||
1450 | [1] = { | ||
1451 | .start = IRQ_RTC, | ||
1452 | .end = IRQ_RTC, | ||
1453 | .flags = IORESOURCE_IRQ, | ||
1454 | }, | ||
1455 | [2] = { | ||
1456 | .start = IRQ_TICK, | ||
1457 | .end = IRQ_TICK, | ||
1458 | .flags = IORESOURCE_IRQ | ||
1459 | } | ||
1460 | }; | 1129 | }; |
1461 | 1130 | ||
1462 | struct platform_device s3c_device_rtc = { | 1131 | struct platform_device s3c_device_rtc = { |
@@ -1469,21 +1138,9 @@ struct platform_device s3c_device_rtc = { | |||
1469 | 1138 | ||
1470 | #ifdef CONFIG_S3C_DEV_RTC | 1139 | #ifdef CONFIG_S3C_DEV_RTC |
1471 | static struct resource s3c_rtc_resource[] = { | 1140 | static struct resource s3c_rtc_resource[] = { |
1472 | [0] = { | 1141 | [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256), |
1473 | .start = S3C_PA_RTC, | 1142 | [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM), |
1474 | .end = S3C_PA_RTC + 0xff, | 1143 | [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC), |
1475 | .flags = IORESOURCE_MEM, | ||
1476 | }, | ||
1477 | [1] = { | ||
1478 | .start = IRQ_RTC_ALARM, | ||
1479 | .end = IRQ_RTC_ALARM, | ||
1480 | .flags = IORESOURCE_IRQ, | ||
1481 | }, | ||
1482 | [2] = { | ||
1483 | .start = IRQ_RTC_TIC, | ||
1484 | .end = IRQ_RTC_TIC, | ||
1485 | .flags = IORESOURCE_IRQ | ||
1486 | } | ||
1487 | }; | 1144 | }; |
1488 | 1145 | ||
1489 | struct platform_device s3c_device_rtc = { | 1146 | struct platform_device s3c_device_rtc = { |
@@ -1498,16 +1155,8 @@ struct platform_device s3c_device_rtc = { | |||
1498 | 1155 | ||
1499 | #ifdef CONFIG_PLAT_S3C24XX | 1156 | #ifdef CONFIG_PLAT_S3C24XX |
1500 | static struct resource s3c_sdi_resource[] = { | 1157 | static struct resource s3c_sdi_resource[] = { |
1501 | [0] = { | 1158 | [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI), |
1502 | .start = S3C24XX_PA_SDI, | 1159 | [1] = DEFINE_RES_IRQ(IRQ_SDI), |
1503 | .end = S3C24XX_PA_SDI + S3C24XX_SZ_SDI - 1, | ||
1504 | .flags = IORESOURCE_MEM, | ||
1505 | }, | ||
1506 | [1] = { | ||
1507 | .start = IRQ_SDI, | ||
1508 | .end = IRQ_SDI, | ||
1509 | .flags = IORESOURCE_IRQ, | ||
1510 | } | ||
1511 | }; | 1160 | }; |
1512 | 1161 | ||
1513 | struct platform_device s3c_device_sdi = { | 1162 | struct platform_device s3c_device_sdi = { |
@@ -1528,16 +1177,8 @@ void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata) | |||
1528 | 1177 | ||
1529 | #ifdef CONFIG_PLAT_S3C24XX | 1178 | #ifdef CONFIG_PLAT_S3C24XX |
1530 | static struct resource s3c_spi0_resource[] = { | 1179 | static struct resource s3c_spi0_resource[] = { |
1531 | [0] = { | 1180 | [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32), |
1532 | .start = S3C24XX_PA_SPI, | 1181 | [1] = DEFINE_RES_IRQ(IRQ_SPI0), |
1533 | .end = S3C24XX_PA_SPI + 0x1f, | ||
1534 | .flags = IORESOURCE_MEM, | ||
1535 | }, | ||
1536 | [1] = { | ||
1537 | .start = IRQ_SPI0, | ||
1538 | .end = IRQ_SPI0, | ||
1539 | .flags = IORESOURCE_IRQ, | ||
1540 | } | ||
1541 | }; | 1182 | }; |
1542 | 1183 | ||
1543 | struct platform_device s3c_device_spi0 = { | 1184 | struct platform_device s3c_device_spi0 = { |
@@ -1552,16 +1193,8 @@ struct platform_device s3c_device_spi0 = { | |||
1552 | }; | 1193 | }; |
1553 | 1194 | ||
1554 | static struct resource s3c_spi1_resource[] = { | 1195 | static struct resource s3c_spi1_resource[] = { |
1555 | [0] = { | 1196 | [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32), |
1556 | .start = S3C24XX_PA_SPI + S3C2410_SPI1, | 1197 | [1] = DEFINE_RES_IRQ(IRQ_SPI1), |
1557 | .end = S3C24XX_PA_SPI + S3C2410_SPI1 + 0x1f, | ||
1558 | .flags = IORESOURCE_MEM, | ||
1559 | }, | ||
1560 | [1] = { | ||
1561 | .start = IRQ_SPI1, | ||
1562 | .end = IRQ_SPI1, | ||
1563 | .flags = IORESOURCE_IRQ, | ||
1564 | } | ||
1565 | }; | 1198 | }; |
1566 | 1199 | ||
1567 | struct platform_device s3c_device_spi1 = { | 1200 | struct platform_device s3c_device_spi1 = { |
@@ -1580,17 +1213,8 @@ struct platform_device s3c_device_spi1 = { | |||
1580 | 1213 | ||
1581 | #ifdef CONFIG_PLAT_S3C24XX | 1214 | #ifdef CONFIG_PLAT_S3C24XX |
1582 | static struct resource s3c_ts_resource[] = { | 1215 | static struct resource s3c_ts_resource[] = { |
1583 | [0] = { | 1216 | [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC), |
1584 | .start = S3C24XX_PA_ADC, | 1217 | [1] = DEFINE_RES_IRQ(IRQ_TC), |
1585 | .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1, | ||
1586 | .flags = IORESOURCE_MEM, | ||
1587 | }, | ||
1588 | [1] = { | ||
1589 | .start = IRQ_TC, | ||
1590 | .end = IRQ_TC, | ||
1591 | .flags = IORESOURCE_IRQ, | ||
1592 | }, | ||
1593 | |||
1594 | }; | 1218 | }; |
1595 | 1219 | ||
1596 | struct platform_device s3c_device_ts = { | 1220 | struct platform_device s3c_device_ts = { |
@@ -1610,16 +1234,8 @@ void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_ | |||
1610 | 1234 | ||
1611 | #ifdef CONFIG_SAMSUNG_DEV_TS | 1235 | #ifdef CONFIG_SAMSUNG_DEV_TS |
1612 | static struct resource s3c_ts_resource[] = { | 1236 | static struct resource s3c_ts_resource[] = { |
1613 | [0] = { | 1237 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256), |
1614 | .start = SAMSUNG_PA_ADC, | 1238 | [1] = DEFINE_RES_IRQ(IRQ_TC), |
1615 | .end = SAMSUNG_PA_ADC + SZ_256 - 1, | ||
1616 | .flags = IORESOURCE_MEM, | ||
1617 | }, | ||
1618 | [1] = { | ||
1619 | .start = IRQ_TC, | ||
1620 | .end = IRQ_TC, | ||
1621 | .flags = IORESOURCE_IRQ, | ||
1622 | }, | ||
1623 | }; | 1239 | }; |
1624 | 1240 | ||
1625 | static struct s3c2410_ts_mach_info default_ts_data __initdata = { | 1241 | static struct s3c2410_ts_mach_info default_ts_data __initdata = { |
@@ -1650,16 +1266,8 @@ void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd) | |||
1650 | #ifdef CONFIG_S5P_DEV_TV | 1266 | #ifdef CONFIG_S5P_DEV_TV |
1651 | 1267 | ||
1652 | static struct resource s5p_hdmi_resources[] = { | 1268 | static struct resource s5p_hdmi_resources[] = { |
1653 | [0] = { | 1269 | [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M), |
1654 | .start = S5P_PA_HDMI, | 1270 | [1] = DEFINE_RES_IRQ(IRQ_HDMI), |
1655 | .end = S5P_PA_HDMI + SZ_1M - 1, | ||
1656 | .flags = IORESOURCE_MEM, | ||
1657 | }, | ||
1658 | [1] = { | ||
1659 | .start = IRQ_HDMI, | ||
1660 | .end = IRQ_HDMI, | ||
1661 | .flags = IORESOURCE_IRQ, | ||
1662 | }, | ||
1663 | }; | 1271 | }; |
1664 | 1272 | ||
1665 | struct platform_device s5p_device_hdmi = { | 1273 | struct platform_device s5p_device_hdmi = { |
@@ -1670,16 +1278,8 @@ struct platform_device s5p_device_hdmi = { | |||
1670 | }; | 1278 | }; |
1671 | 1279 | ||
1672 | static struct resource s5p_sdo_resources[] = { | 1280 | static struct resource s5p_sdo_resources[] = { |
1673 | [0] = { | 1281 | [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K), |
1674 | .start = S5P_PA_SDO, | 1282 | [1] = DEFINE_RES_IRQ(IRQ_SDO), |
1675 | .end = S5P_PA_SDO + SZ_64K - 1, | ||
1676 | .flags = IORESOURCE_MEM, | ||
1677 | }, | ||
1678 | [1] = { | ||
1679 | .start = IRQ_SDO, | ||
1680 | .end = IRQ_SDO, | ||
1681 | .flags = IORESOURCE_IRQ, | ||
1682 | } | ||
1683 | }; | 1283 | }; |
1684 | 1284 | ||
1685 | struct platform_device s5p_device_sdo = { | 1285 | struct platform_device s5p_device_sdo = { |
@@ -1690,24 +1290,9 @@ struct platform_device s5p_device_sdo = { | |||
1690 | }; | 1290 | }; |
1691 | 1291 | ||
1692 | static struct resource s5p_mixer_resources[] = { | 1292 | static struct resource s5p_mixer_resources[] = { |
1693 | [0] = { | 1293 | [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"), |
1694 | .start = S5P_PA_MIXER, | 1294 | [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"), |
1695 | .end = S5P_PA_MIXER + SZ_64K - 1, | 1295 | [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"), |
1696 | .flags = IORESOURCE_MEM, | ||
1697 | .name = "mxr" | ||
1698 | }, | ||
1699 | [1] = { | ||
1700 | .start = S5P_PA_VP, | ||
1701 | .end = S5P_PA_VP + SZ_64K - 1, | ||
1702 | .flags = IORESOURCE_MEM, | ||
1703 | .name = "vp" | ||
1704 | }, | ||
1705 | [2] = { | ||
1706 | .start = IRQ_MIXER, | ||
1707 | .end = IRQ_MIXER, | ||
1708 | .flags = IORESOURCE_IRQ, | ||
1709 | .name = "irq" | ||
1710 | } | ||
1711 | }; | 1296 | }; |
1712 | 1297 | ||
1713 | struct platform_device s5p_device_mixer = { | 1298 | struct platform_device s5p_device_mixer = { |
@@ -1726,16 +1311,8 @@ struct platform_device s5p_device_mixer = { | |||
1726 | 1311 | ||
1727 | #ifdef CONFIG_S3C_DEV_USB_HOST | 1312 | #ifdef CONFIG_S3C_DEV_USB_HOST |
1728 | static struct resource s3c_usb_resource[] = { | 1313 | static struct resource s3c_usb_resource[] = { |
1729 | [0] = { | 1314 | [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256), |
1730 | .start = S3C_PA_USBHOST, | 1315 | [1] = DEFINE_RES_IRQ(IRQ_USBH), |
1731 | .end = S3C_PA_USBHOST + 0x100 - 1, | ||
1732 | .flags = IORESOURCE_MEM, | ||
1733 | }, | ||
1734 | [1] = { | ||
1735 | .start = IRQ_USBH, | ||
1736 | .end = IRQ_USBH, | ||
1737 | .flags = IORESOURCE_IRQ, | ||
1738 | } | ||
1739 | }; | 1316 | }; |
1740 | 1317 | ||
1741 | struct platform_device s3c_device_ohci = { | 1318 | struct platform_device s3c_device_ohci = { |
@@ -1769,16 +1346,8 @@ void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info) | |||
1769 | 1346 | ||
1770 | #ifdef CONFIG_PLAT_S3C24XX | 1347 | #ifdef CONFIG_PLAT_S3C24XX |
1771 | static struct resource s3c_usbgadget_resource[] = { | 1348 | static struct resource s3c_usbgadget_resource[] = { |
1772 | [0] = { | 1349 | [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV), |
1773 | .start = S3C24XX_PA_USBDEV, | 1350 | [1] = DEFINE_RES_IRQ(IRQ_USBD), |
1774 | .end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1, | ||
1775 | .flags = IORESOURCE_MEM, | ||
1776 | }, | ||
1777 | [1] = { | ||
1778 | .start = IRQ_USBD, | ||
1779 | .end = IRQ_USBD, | ||
1780 | .flags = IORESOURCE_IRQ, | ||
1781 | } | ||
1782 | }; | 1351 | }; |
1783 | 1352 | ||
1784 | struct platform_device s3c_device_usbgadget = { | 1353 | struct platform_device s3c_device_usbgadget = { |
@@ -1798,16 +1367,8 @@ void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd) | |||
1798 | 1367 | ||
1799 | #ifdef CONFIG_S5P_DEV_USB_EHCI | 1368 | #ifdef CONFIG_S5P_DEV_USB_EHCI |
1800 | static struct resource s5p_ehci_resource[] = { | 1369 | static struct resource s5p_ehci_resource[] = { |
1801 | [0] = { | 1370 | [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256), |
1802 | .start = S5P_PA_EHCI, | 1371 | [1] = DEFINE_RES_IRQ(IRQ_USB_HOST), |
1803 | .end = S5P_PA_EHCI + SZ_256 - 1, | ||
1804 | .flags = IORESOURCE_MEM, | ||
1805 | }, | ||
1806 | [1] = { | ||
1807 | .start = IRQ_USB_HOST, | ||
1808 | .end = IRQ_USB_HOST, | ||
1809 | .flags = IORESOURCE_IRQ, | ||
1810 | } | ||
1811 | }; | 1372 | }; |
1812 | 1373 | ||
1813 | struct platform_device s5p_device_ehci = { | 1374 | struct platform_device s5p_device_ehci = { |
@@ -1839,16 +1400,8 @@ void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd) | |||
1839 | 1400 | ||
1840 | #ifdef CONFIG_S3C_DEV_USB_HSOTG | 1401 | #ifdef CONFIG_S3C_DEV_USB_HSOTG |
1841 | static struct resource s3c_usb_hsotg_resources[] = { | 1402 | static struct resource s3c_usb_hsotg_resources[] = { |
1842 | [0] = { | 1403 | [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_16K), |
1843 | .start = S3C_PA_USB_HSOTG, | 1404 | [1] = DEFINE_RES_IRQ(IRQ_OTG), |
1844 | .end = S3C_PA_USB_HSOTG + 0x10000 - 1, | ||
1845 | .flags = IORESOURCE_MEM, | ||
1846 | }, | ||
1847 | [1] = { | ||
1848 | .start = IRQ_OTG, | ||
1849 | .end = IRQ_OTG, | ||
1850 | .flags = IORESOURCE_IRQ, | ||
1851 | }, | ||
1852 | }; | 1405 | }; |
1853 | 1406 | ||
1854 | struct platform_device s3c_device_usb_hsotg = { | 1407 | struct platform_device s3c_device_usb_hsotg = { |
@@ -1867,16 +1420,8 @@ struct platform_device s3c_device_usb_hsotg = { | |||
1867 | 1420 | ||
1868 | #ifdef CONFIG_PLAT_S3C24XX | 1421 | #ifdef CONFIG_PLAT_S3C24XX |
1869 | static struct resource s3c_hsudc_resource[] = { | 1422 | static struct resource s3c_hsudc_resource[] = { |
1870 | [0] = { | 1423 | [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC), |
1871 | .start = S3C2416_PA_HSUDC, | 1424 | [1] = DEFINE_RES_IRQ(IRQ_USBD), |
1872 | .end = S3C2416_PA_HSUDC + S3C2416_SZ_HSUDC - 1, | ||
1873 | .flags = IORESOURCE_MEM, | ||
1874 | }, | ||
1875 | [1] = { | ||
1876 | .start = IRQ_USBD, | ||
1877 | .end = IRQ_USBD, | ||
1878 | .flags = IORESOURCE_IRQ, | ||
1879 | } | ||
1880 | }; | 1425 | }; |
1881 | 1426 | ||
1882 | struct platform_device s3c_device_usb_hsudc = { | 1427 | struct platform_device s3c_device_usb_hsudc = { |
@@ -1900,16 +1445,8 @@ void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd) | |||
1900 | 1445 | ||
1901 | #ifdef CONFIG_S3C_DEV_WDT | 1446 | #ifdef CONFIG_S3C_DEV_WDT |
1902 | static struct resource s3c_wdt_resource[] = { | 1447 | static struct resource s3c_wdt_resource[] = { |
1903 | [0] = { | 1448 | [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K), |
1904 | .start = S3C_PA_WDT, | 1449 | [1] = DEFINE_RES_IRQ(IRQ_WDT), |
1905 | .end = S3C_PA_WDT + SZ_1K, | ||
1906 | .flags = IORESOURCE_MEM, | ||
1907 | }, | ||
1908 | [1] = { | ||
1909 | .start = IRQ_WDT, | ||
1910 | .end = IRQ_WDT, | ||
1911 | .flags = IORESOURCE_IRQ, | ||
1912 | } | ||
1913 | }; | 1450 | }; |
1914 | 1451 | ||
1915 | struct platform_device s3c_device_wdt = { | 1452 | struct platform_device s3c_device_wdt = { |