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-rw-r--r--arch/powerpc/include/asm/immap_qe.h4
-rw-r--r--arch/powerpc/include/asm/qe.h1
-rw-r--r--arch/powerpc/sysdev/qe_lib/qe.c3
3 files changed, 7 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/immap_qe.h b/arch/powerpc/include/asm/immap_qe.h
index 0edb6842b13d..61e8490786b8 100644
--- a/arch/powerpc/include/asm/immap_qe.h
+++ b/arch/powerpc/include/asm/immap_qe.h
@@ -26,7 +26,9 @@
26struct qe_iram { 26struct qe_iram {
27 __be32 iadd; /* I-RAM Address Register */ 27 __be32 iadd; /* I-RAM Address Register */
28 __be32 idata; /* I-RAM Data Register */ 28 __be32 idata; /* I-RAM Data Register */
29 u8 res0[0x78]; 29 u8 res0[0x04];
30 __be32 iready; /* I-RAM Ready Register */
31 u8 res1[0x70];
30} __attribute__ ((packed)); 32} __attribute__ ((packed));
31 33
32/* QE Interrupt Controller */ 34/* QE Interrupt Controller */
diff --git a/arch/powerpc/include/asm/qe.h b/arch/powerpc/include/asm/qe.h
index 5e0b6d511e14..229571a49391 100644
--- a/arch/powerpc/include/asm/qe.h
+++ b/arch/powerpc/include/asm/qe.h
@@ -499,6 +499,7 @@ enum comm_dir {
499/* I-RAM */ 499/* I-RAM */
500#define QE_IRAM_IADD_AIE 0x80000000 /* Auto Increment Enable */ 500#define QE_IRAM_IADD_AIE 0x80000000 /* Auto Increment Enable */
501#define QE_IRAM_IADD_BADDR 0x00080000 /* Base Address */ 501#define QE_IRAM_IADD_BADDR 0x00080000 /* Base Address */
502#define QE_IRAM_READY 0x80000000 /* Ready */
502 503
503/* UPC */ 504/* UPC */
504#define UPGCR_PROTOCOL 0x80000000 /* protocol ul2 or pl2 */ 505#define UPGCR_PROTOCOL 0x80000000 /* protocol ul2 or pl2 */
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index 818e763f8265..b04367529729 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -395,6 +395,9 @@ static void qe_upload_microcode(const void *base,
395 395
396 for (i = 0; i < be32_to_cpu(ucode->count); i++) 396 for (i = 0; i < be32_to_cpu(ucode->count); i++)
397 out_be32(&qe_immr->iram.idata, be32_to_cpu(code[i])); 397 out_be32(&qe_immr->iram.idata, be32_to_cpu(code[i]));
398
399 /* Set I-RAM Ready Register */
400 out_be32(&qe_immr->iram.iready, be32_to_cpu(QE_IRAM_READY));
398} 401}
399 402
400/* 403/*