diff options
21 files changed, 509 insertions, 430 deletions
diff --git a/drivers/infiniband/hw/cxgb4/cm.c b/drivers/infiniband/hw/cxgb4/cm.c index fb61f6685809..a07d8e124a80 100644 --- a/drivers/infiniband/hw/cxgb4/cm.c +++ b/drivers/infiniband/hw/cxgb4/cm.c | |||
@@ -472,10 +472,10 @@ static void send_flowc(struct c4iw_ep *ep, struct sk_buff *skb) | |||
472 | skb = get_skb(skb, flowclen, GFP_KERNEL); | 472 | skb = get_skb(skb, flowclen, GFP_KERNEL); |
473 | flowc = (struct fw_flowc_wr *)__skb_put(skb, flowclen); | 473 | flowc = (struct fw_flowc_wr *)__skb_put(skb, flowclen); |
474 | 474 | ||
475 | flowc->op_to_nparams = cpu_to_be32(FW_WR_OP(FW_FLOWC_WR) | | 475 | flowc->op_to_nparams = cpu_to_be32(FW_WR_OP_V(FW_FLOWC_WR) | |
476 | FW_FLOWC_WR_NPARAMS(8)); | 476 | FW_FLOWC_WR_NPARAMS_V(8)); |
477 | flowc->flowid_len16 = cpu_to_be32(FW_WR_LEN16(DIV_ROUND_UP(flowclen, | 477 | flowc->flowid_len16 = cpu_to_be32(FW_WR_LEN16_V(DIV_ROUND_UP(flowclen, |
478 | 16)) | FW_WR_FLOWID(ep->hwtid)); | 478 | 16)) | FW_WR_FLOWID_V(ep->hwtid)); |
479 | 479 | ||
480 | flowc->mnemval[0].mnemonic = FW_FLOWC_MNEM_PFNVFN; | 480 | flowc->mnemval[0].mnemonic = FW_FLOWC_MNEM_PFNVFN; |
481 | flowc->mnemval[0].val = cpu_to_be32(FW_PFVF_CMD_PFN | 481 | flowc->mnemval[0].val = cpu_to_be32(FW_PFVF_CMD_PFN |
@@ -803,16 +803,16 @@ static void send_mpa_req(struct c4iw_ep *ep, struct sk_buff *skb, | |||
803 | req = (struct fw_ofld_tx_data_wr *)skb_put(skb, wrlen); | 803 | req = (struct fw_ofld_tx_data_wr *)skb_put(skb, wrlen); |
804 | memset(req, 0, wrlen); | 804 | memset(req, 0, wrlen); |
805 | req->op_to_immdlen = cpu_to_be32( | 805 | req->op_to_immdlen = cpu_to_be32( |
806 | FW_WR_OP(FW_OFLD_TX_DATA_WR) | | 806 | FW_WR_OP_V(FW_OFLD_TX_DATA_WR) | |
807 | FW_WR_COMPL(1) | | 807 | FW_WR_COMPL_F | |
808 | FW_WR_IMMDLEN(mpalen)); | 808 | FW_WR_IMMDLEN_V(mpalen)); |
809 | req->flowid_len16 = cpu_to_be32( | 809 | req->flowid_len16 = cpu_to_be32( |
810 | FW_WR_FLOWID(ep->hwtid) | | 810 | FW_WR_FLOWID_V(ep->hwtid) | |
811 | FW_WR_LEN16(wrlen >> 4)); | 811 | FW_WR_LEN16_V(wrlen >> 4)); |
812 | req->plen = cpu_to_be32(mpalen); | 812 | req->plen = cpu_to_be32(mpalen); |
813 | req->tunnel_to_proxy = cpu_to_be32( | 813 | req->tunnel_to_proxy = cpu_to_be32( |
814 | FW_OFLD_TX_DATA_WR_FLUSH(1) | | 814 | FW_OFLD_TX_DATA_WR_FLUSH_F | |
815 | FW_OFLD_TX_DATA_WR_SHOVE(1)); | 815 | FW_OFLD_TX_DATA_WR_SHOVE_F); |
816 | 816 | ||
817 | mpa = (struct mpa_message *)(req + 1); | 817 | mpa = (struct mpa_message *)(req + 1); |
818 | memcpy(mpa->key, MPA_KEY_REQ, sizeof(mpa->key)); | 818 | memcpy(mpa->key, MPA_KEY_REQ, sizeof(mpa->key)); |
@@ -897,16 +897,16 @@ static int send_mpa_reject(struct c4iw_ep *ep, const void *pdata, u8 plen) | |||
897 | req = (struct fw_ofld_tx_data_wr *)skb_put(skb, wrlen); | 897 | req = (struct fw_ofld_tx_data_wr *)skb_put(skb, wrlen); |
898 | memset(req, 0, wrlen); | 898 | memset(req, 0, wrlen); |
899 | req->op_to_immdlen = cpu_to_be32( | 899 | req->op_to_immdlen = cpu_to_be32( |
900 | FW_WR_OP(FW_OFLD_TX_DATA_WR) | | 900 | FW_WR_OP_V(FW_OFLD_TX_DATA_WR) | |
901 | FW_WR_COMPL(1) | | 901 | FW_WR_COMPL_F | |
902 | FW_WR_IMMDLEN(mpalen)); | 902 | FW_WR_IMMDLEN_V(mpalen)); |
903 | req->flowid_len16 = cpu_to_be32( | 903 | req->flowid_len16 = cpu_to_be32( |
904 | FW_WR_FLOWID(ep->hwtid) | | 904 | FW_WR_FLOWID_V(ep->hwtid) | |
905 | FW_WR_LEN16(wrlen >> 4)); | 905 | FW_WR_LEN16_V(wrlen >> 4)); |
906 | req->plen = cpu_to_be32(mpalen); | 906 | req->plen = cpu_to_be32(mpalen); |
907 | req->tunnel_to_proxy = cpu_to_be32( | 907 | req->tunnel_to_proxy = cpu_to_be32( |
908 | FW_OFLD_TX_DATA_WR_FLUSH(1) | | 908 | FW_OFLD_TX_DATA_WR_FLUSH_F | |
909 | FW_OFLD_TX_DATA_WR_SHOVE(1)); | 909 | FW_OFLD_TX_DATA_WR_SHOVE_F); |
910 | 910 | ||
911 | mpa = (struct mpa_message *)(req + 1); | 911 | mpa = (struct mpa_message *)(req + 1); |
912 | memset(mpa, 0, sizeof(*mpa)); | 912 | memset(mpa, 0, sizeof(*mpa)); |
@@ -977,16 +977,16 @@ static int send_mpa_reply(struct c4iw_ep *ep, const void *pdata, u8 plen) | |||
977 | req = (struct fw_ofld_tx_data_wr *) skb_put(skb, wrlen); | 977 | req = (struct fw_ofld_tx_data_wr *) skb_put(skb, wrlen); |
978 | memset(req, 0, wrlen); | 978 | memset(req, 0, wrlen); |
979 | req->op_to_immdlen = cpu_to_be32( | 979 | req->op_to_immdlen = cpu_to_be32( |
980 | FW_WR_OP(FW_OFLD_TX_DATA_WR) | | 980 | FW_WR_OP_V(FW_OFLD_TX_DATA_WR) | |
981 | FW_WR_COMPL(1) | | 981 | FW_WR_COMPL_F | |
982 | FW_WR_IMMDLEN(mpalen)); | 982 | FW_WR_IMMDLEN_V(mpalen)); |
983 | req->flowid_len16 = cpu_to_be32( | 983 | req->flowid_len16 = cpu_to_be32( |
984 | FW_WR_FLOWID(ep->hwtid) | | 984 | FW_WR_FLOWID_V(ep->hwtid) | |
985 | FW_WR_LEN16(wrlen >> 4)); | 985 | FW_WR_LEN16_V(wrlen >> 4)); |
986 | req->plen = cpu_to_be32(mpalen); | 986 | req->plen = cpu_to_be32(mpalen); |
987 | req->tunnel_to_proxy = cpu_to_be32( | 987 | req->tunnel_to_proxy = cpu_to_be32( |
988 | FW_OFLD_TX_DATA_WR_FLUSH(1) | | 988 | FW_OFLD_TX_DATA_WR_FLUSH_F | |
989 | FW_OFLD_TX_DATA_WR_SHOVE(1)); | 989 | FW_OFLD_TX_DATA_WR_SHOVE_F); |
990 | 990 | ||
991 | mpa = (struct mpa_message *)(req + 1); | 991 | mpa = (struct mpa_message *)(req + 1); |
992 | memset(mpa, 0, sizeof(*mpa)); | 992 | memset(mpa, 0, sizeof(*mpa)); |
@@ -1751,7 +1751,7 @@ static void send_fw_act_open_req(struct c4iw_ep *ep, unsigned int atid) | |||
1751 | req = (struct fw_ofld_connection_wr *)__skb_put(skb, sizeof(*req)); | 1751 | req = (struct fw_ofld_connection_wr *)__skb_put(skb, sizeof(*req)); |
1752 | memset(req, 0, sizeof(*req)); | 1752 | memset(req, 0, sizeof(*req)); |
1753 | req->op_compl = htonl(V_WR_OP(FW_OFLD_CONNECTION_WR)); | 1753 | req->op_compl = htonl(V_WR_OP(FW_OFLD_CONNECTION_WR)); |
1754 | req->len16_pkd = htonl(FW_WR_LEN16(DIV_ROUND_UP(sizeof(*req), 16))); | 1754 | req->len16_pkd = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*req), 16))); |
1755 | req->le.filter = cpu_to_be32(cxgb4_select_ntuple( | 1755 | req->le.filter = cpu_to_be32(cxgb4_select_ntuple( |
1756 | ep->com.dev->rdev.lldi.ports[0], | 1756 | ep->com.dev->rdev.lldi.ports[0], |
1757 | ep->l2t)); | 1757 | ep->l2t)); |
@@ -3537,8 +3537,8 @@ static void send_fw_pass_open_req(struct c4iw_dev *dev, struct sk_buff *skb, | |||
3537 | req_skb = alloc_skb(sizeof(struct fw_ofld_connection_wr), GFP_KERNEL); | 3537 | req_skb = alloc_skb(sizeof(struct fw_ofld_connection_wr), GFP_KERNEL); |
3538 | req = (struct fw_ofld_connection_wr *)__skb_put(req_skb, sizeof(*req)); | 3538 | req = (struct fw_ofld_connection_wr *)__skb_put(req_skb, sizeof(*req)); |
3539 | memset(req, 0, sizeof(*req)); | 3539 | memset(req, 0, sizeof(*req)); |
3540 | req->op_compl = htonl(V_WR_OP(FW_OFLD_CONNECTION_WR) | FW_WR_COMPL(1)); | 3540 | req->op_compl = htonl(V_WR_OP(FW_OFLD_CONNECTION_WR) | FW_WR_COMPL_F); |
3541 | req->len16_pkd = htonl(FW_WR_LEN16(DIV_ROUND_UP(sizeof(*req), 16))); | 3541 | req->len16_pkd = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*req), 16))); |
3542 | req->le.version_cpl = htonl(F_FW_OFLD_CONNECTION_WR_CPL); | 3542 | req->le.version_cpl = htonl(F_FW_OFLD_CONNECTION_WR_CPL); |
3543 | req->le.filter = (__force __be32) filter; | 3543 | req->le.filter = (__force __be32) filter; |
3544 | req->le.lport = lport; | 3544 | req->le.lport = lport; |
diff --git a/drivers/infiniband/hw/cxgb4/cq.c b/drivers/infiniband/hw/cxgb4/cq.c index 0f773e78e080..e9fd3a029296 100644 --- a/drivers/infiniband/hw/cxgb4/cq.c +++ b/drivers/infiniband/hw/cxgb4/cq.c | |||
@@ -51,9 +51,9 @@ static int destroy_cq(struct c4iw_rdev *rdev, struct t4_cq *cq, | |||
51 | res_wr = (struct fw_ri_res_wr *)__skb_put(skb, wr_len); | 51 | res_wr = (struct fw_ri_res_wr *)__skb_put(skb, wr_len); |
52 | memset(res_wr, 0, wr_len); | 52 | memset(res_wr, 0, wr_len); |
53 | res_wr->op_nres = cpu_to_be32( | 53 | res_wr->op_nres = cpu_to_be32( |
54 | FW_WR_OP(FW_RI_RES_WR) | | 54 | FW_WR_OP_V(FW_RI_RES_WR) | |
55 | V_FW_RI_RES_WR_NRES(1) | | 55 | V_FW_RI_RES_WR_NRES(1) | |
56 | FW_WR_COMPL(1)); | 56 | FW_WR_COMPL_F); |
57 | res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); | 57 | res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); |
58 | res_wr->cookie = (unsigned long) &wr_wait; | 58 | res_wr->cookie = (unsigned long) &wr_wait; |
59 | res = res_wr->res; | 59 | res = res_wr->res; |
@@ -121,9 +121,9 @@ static int create_cq(struct c4iw_rdev *rdev, struct t4_cq *cq, | |||
121 | res_wr = (struct fw_ri_res_wr *)__skb_put(skb, wr_len); | 121 | res_wr = (struct fw_ri_res_wr *)__skb_put(skb, wr_len); |
122 | memset(res_wr, 0, wr_len); | 122 | memset(res_wr, 0, wr_len); |
123 | res_wr->op_nres = cpu_to_be32( | 123 | res_wr->op_nres = cpu_to_be32( |
124 | FW_WR_OP(FW_RI_RES_WR) | | 124 | FW_WR_OP_V(FW_RI_RES_WR) | |
125 | V_FW_RI_RES_WR_NRES(1) | | 125 | V_FW_RI_RES_WR_NRES(1) | |
126 | FW_WR_COMPL(1)); | 126 | FW_WR_COMPL_F); |
127 | res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); | 127 | res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); |
128 | res_wr->cookie = (unsigned long) &wr_wait; | 128 | res_wr->cookie = (unsigned long) &wr_wait; |
129 | res = res_wr->res; | 129 | res = res_wr->res; |
diff --git a/drivers/infiniband/hw/cxgb4/mem.c b/drivers/infiniband/hw/cxgb4/mem.c index ec7a2988a703..9335148c1ad9 100644 --- a/drivers/infiniband/hw/cxgb4/mem.c +++ b/drivers/infiniband/hw/cxgb4/mem.c | |||
@@ -74,10 +74,10 @@ static int _c4iw_write_mem_dma_aligned(struct c4iw_rdev *rdev, u32 addr, | |||
74 | req = (struct ulp_mem_io *)__skb_put(skb, wr_len); | 74 | req = (struct ulp_mem_io *)__skb_put(skb, wr_len); |
75 | memset(req, 0, wr_len); | 75 | memset(req, 0, wr_len); |
76 | INIT_ULPTX_WR(req, wr_len, 0, 0); | 76 | INIT_ULPTX_WR(req, wr_len, 0, 0); |
77 | req->wr.wr_hi = cpu_to_be32(FW_WR_OP(FW_ULPTX_WR) | | 77 | req->wr.wr_hi = cpu_to_be32(FW_WR_OP_V(FW_ULPTX_WR) | |
78 | (wait ? FW_WR_COMPL(1) : 0)); | 78 | (wait ? FW_WR_COMPL_F : 0)); |
79 | req->wr.wr_lo = wait ? (__force __be64)(unsigned long) &wr_wait : 0L; | 79 | req->wr.wr_lo = wait ? (__force __be64)(unsigned long) &wr_wait : 0L; |
80 | req->wr.wr_mid = cpu_to_be32(FW_WR_LEN16(DIV_ROUND_UP(wr_len, 16))); | 80 | req->wr.wr_mid = cpu_to_be32(FW_WR_LEN16_V(DIV_ROUND_UP(wr_len, 16))); |
81 | req->cmd = cpu_to_be32(ULPTX_CMD(ULP_TX_MEM_WRITE)); | 81 | req->cmd = cpu_to_be32(ULPTX_CMD(ULP_TX_MEM_WRITE)); |
82 | req->cmd |= cpu_to_be32(V_T5_ULP_MEMIO_ORDER(1)); | 82 | req->cmd |= cpu_to_be32(V_T5_ULP_MEMIO_ORDER(1)); |
83 | req->dlen = cpu_to_be32(ULP_MEMIO_DATA_LEN(len>>5)); | 83 | req->dlen = cpu_to_be32(ULP_MEMIO_DATA_LEN(len>>5)); |
@@ -135,13 +135,13 @@ static int _c4iw_write_mem_inline(struct c4iw_rdev *rdev, u32 addr, u32 len, | |||
135 | INIT_ULPTX_WR(req, wr_len, 0, 0); | 135 | INIT_ULPTX_WR(req, wr_len, 0, 0); |
136 | 136 | ||
137 | if (i == (num_wqe-1)) { | 137 | if (i == (num_wqe-1)) { |
138 | req->wr.wr_hi = cpu_to_be32(FW_WR_OP(FW_ULPTX_WR) | | 138 | req->wr.wr_hi = cpu_to_be32(FW_WR_OP_V(FW_ULPTX_WR) | |
139 | FW_WR_COMPL(1)); | 139 | FW_WR_COMPL_F); |
140 | req->wr.wr_lo = (__force __be64)(unsigned long) &wr_wait; | 140 | req->wr.wr_lo = (__force __be64)(unsigned long) &wr_wait; |
141 | } else | 141 | } else |
142 | req->wr.wr_hi = cpu_to_be32(FW_WR_OP(FW_ULPTX_WR)); | 142 | req->wr.wr_hi = cpu_to_be32(FW_WR_OP_V(FW_ULPTX_WR)); |
143 | req->wr.wr_mid = cpu_to_be32( | 143 | req->wr.wr_mid = cpu_to_be32( |
144 | FW_WR_LEN16(DIV_ROUND_UP(wr_len, 16))); | 144 | FW_WR_LEN16_V(DIV_ROUND_UP(wr_len, 16))); |
145 | 145 | ||
146 | req->cmd = cmd; | 146 | req->cmd = cmd; |
147 | req->dlen = cpu_to_be32(ULP_MEMIO_DATA_LEN( | 147 | req->dlen = cpu_to_be32(ULP_MEMIO_DATA_LEN( |
diff --git a/drivers/infiniband/hw/cxgb4/qp.c b/drivers/infiniband/hw/cxgb4/qp.c index 41cd6882b648..2ed3ece2b2ee 100644 --- a/drivers/infiniband/hw/cxgb4/qp.c +++ b/drivers/infiniband/hw/cxgb4/qp.c | |||
@@ -271,9 +271,9 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, | |||
271 | res_wr = (struct fw_ri_res_wr *)__skb_put(skb, wr_len); | 271 | res_wr = (struct fw_ri_res_wr *)__skb_put(skb, wr_len); |
272 | memset(res_wr, 0, wr_len); | 272 | memset(res_wr, 0, wr_len); |
273 | res_wr->op_nres = cpu_to_be32( | 273 | res_wr->op_nres = cpu_to_be32( |
274 | FW_WR_OP(FW_RI_RES_WR) | | 274 | FW_WR_OP_V(FW_RI_RES_WR) | |
275 | V_FW_RI_RES_WR_NRES(2) | | 275 | V_FW_RI_RES_WR_NRES(2) | |
276 | FW_WR_COMPL(1)); | 276 | FW_WR_COMPL_F); |
277 | res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); | 277 | res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); |
278 | res_wr->cookie = (unsigned long) &wr_wait; | 278 | res_wr->cookie = (unsigned long) &wr_wait; |
279 | res = res_wr->res; | 279 | res = res_wr->res; |
@@ -1082,10 +1082,10 @@ static void post_terminate(struct c4iw_qp *qhp, struct t4_cqe *err_cqe, | |||
1082 | 1082 | ||
1083 | wqe = (struct fw_ri_wr *)__skb_put(skb, sizeof(*wqe)); | 1083 | wqe = (struct fw_ri_wr *)__skb_put(skb, sizeof(*wqe)); |
1084 | memset(wqe, 0, sizeof *wqe); | 1084 | memset(wqe, 0, sizeof *wqe); |
1085 | wqe->op_compl = cpu_to_be32(FW_WR_OP(FW_RI_INIT_WR)); | 1085 | wqe->op_compl = cpu_to_be32(FW_WR_OP_V(FW_RI_INIT_WR)); |
1086 | wqe->flowid_len16 = cpu_to_be32( | 1086 | wqe->flowid_len16 = cpu_to_be32( |
1087 | FW_WR_FLOWID(qhp->ep->hwtid) | | 1087 | FW_WR_FLOWID_V(qhp->ep->hwtid) | |
1088 | FW_WR_LEN16(DIV_ROUND_UP(sizeof *wqe, 16))); | 1088 | FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*wqe), 16))); |
1089 | 1089 | ||
1090 | wqe->u.terminate.type = FW_RI_TYPE_TERMINATE; | 1090 | wqe->u.terminate.type = FW_RI_TYPE_TERMINATE; |
1091 | wqe->u.terminate.immdlen = cpu_to_be32(sizeof *term); | 1091 | wqe->u.terminate.immdlen = cpu_to_be32(sizeof *term); |
@@ -1204,11 +1204,11 @@ static int rdma_fini(struct c4iw_dev *rhp, struct c4iw_qp *qhp, | |||
1204 | wqe = (struct fw_ri_wr *)__skb_put(skb, sizeof(*wqe)); | 1204 | wqe = (struct fw_ri_wr *)__skb_put(skb, sizeof(*wqe)); |
1205 | memset(wqe, 0, sizeof *wqe); | 1205 | memset(wqe, 0, sizeof *wqe); |
1206 | wqe->op_compl = cpu_to_be32( | 1206 | wqe->op_compl = cpu_to_be32( |
1207 | FW_WR_OP(FW_RI_INIT_WR) | | 1207 | FW_WR_OP_V(FW_RI_INIT_WR) | |
1208 | FW_WR_COMPL(1)); | 1208 | FW_WR_COMPL_F); |
1209 | wqe->flowid_len16 = cpu_to_be32( | 1209 | wqe->flowid_len16 = cpu_to_be32( |
1210 | FW_WR_FLOWID(ep->hwtid) | | 1210 | FW_WR_FLOWID_V(ep->hwtid) | |
1211 | FW_WR_LEN16(DIV_ROUND_UP(sizeof *wqe, 16))); | 1211 | FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*wqe), 16))); |
1212 | wqe->cookie = (unsigned long) &ep->com.wr_wait; | 1212 | wqe->cookie = (unsigned long) &ep->com.wr_wait; |
1213 | 1213 | ||
1214 | wqe->u.fini.type = FW_RI_TYPE_FINI; | 1214 | wqe->u.fini.type = FW_RI_TYPE_FINI; |
@@ -1273,11 +1273,11 @@ static int rdma_init(struct c4iw_dev *rhp, struct c4iw_qp *qhp) | |||
1273 | wqe = (struct fw_ri_wr *)__skb_put(skb, sizeof(*wqe)); | 1273 | wqe = (struct fw_ri_wr *)__skb_put(skb, sizeof(*wqe)); |
1274 | memset(wqe, 0, sizeof *wqe); | 1274 | memset(wqe, 0, sizeof *wqe); |
1275 | wqe->op_compl = cpu_to_be32( | 1275 | wqe->op_compl = cpu_to_be32( |
1276 | FW_WR_OP(FW_RI_INIT_WR) | | 1276 | FW_WR_OP_V(FW_RI_INIT_WR) | |
1277 | FW_WR_COMPL(1)); | 1277 | FW_WR_COMPL_F); |
1278 | wqe->flowid_len16 = cpu_to_be32( | 1278 | wqe->flowid_len16 = cpu_to_be32( |
1279 | FW_WR_FLOWID(qhp->ep->hwtid) | | 1279 | FW_WR_FLOWID_V(qhp->ep->hwtid) | |
1280 | FW_WR_LEN16(DIV_ROUND_UP(sizeof *wqe, 16))); | 1280 | FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*wqe), 16))); |
1281 | 1281 | ||
1282 | wqe->cookie = (unsigned long) &qhp->ep->com.wr_wait; | 1282 | wqe->cookie = (unsigned long) &qhp->ep->com.wr_wait; |
1283 | 1283 | ||
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h index dad1ea930e05..a2196bc94485 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h | |||
@@ -354,7 +354,7 @@ struct link_config { | |||
354 | unsigned char link_ok; /* link up? */ | 354 | unsigned char link_ok; /* link up? */ |
355 | }; | 355 | }; |
356 | 356 | ||
357 | #define FW_LEN16(fw_struct) FW_CMD_LEN16(sizeof(fw_struct) / 16) | 357 | #define FW_LEN16(fw_struct) FW_CMD_LEN16_V(sizeof(fw_struct) / 16) |
358 | 358 | ||
359 | enum { | 359 | enum { |
360 | MAX_ETH_QSETS = 32, /* # of Ethernet Tx/Rx queue sets */ | 360 | MAX_ETH_QSETS = 32, /* # of Ethernet Tx/Rx queue sets */ |
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.h b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.h index 2a6aa88984f4..c0724a5b5942 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.h +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.h | |||
@@ -42,9 +42,9 @@ | |||
42 | do { \ | 42 | do { \ |
43 | memset(&(__pcmd), 0, sizeof(__pcmd)); \ | 43 | memset(&(__pcmd), 0, sizeof(__pcmd)); \ |
44 | (__pcmd).op_to_portid = \ | 44 | (__pcmd).op_to_portid = \ |
45 | cpu_to_be32(FW_CMD_OP(FW_PORT_CMD) | \ | 45 | cpu_to_be32(FW_CMD_OP_V(FW_PORT_CMD) | \ |
46 | FW_CMD_REQUEST | \ | 46 | FW_CMD_REQUEST_F | \ |
47 | FW_CMD_##__op | \ | 47 | FW_CMD_##__op##_F | \ |
48 | FW_PORT_CMD_PORTID(__port)); \ | 48 | FW_PORT_CMD_PORTID(__port)); \ |
49 | (__pcmd).action_to_len16 = \ | 49 | (__pcmd).action_to_len16 = \ |
50 | cpu_to_be32(FW_PORT_CMD_ACTION(__action) | \ | 50 | cpu_to_be32(FW_PORT_CMD_ACTION(__action) | \ |
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c index a2d6e5043ff6..350f9c204402 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | |||
@@ -833,7 +833,7 @@ static int fwevtq_handler(struct sge_rspq *q, const __be64 *rsp, | |||
833 | 833 | ||
834 | #ifdef CONFIG_CHELSIO_T4_DCB | 834 | #ifdef CONFIG_CHELSIO_T4_DCB |
835 | const struct fw_port_cmd *pcmd = (const void *)p->data; | 835 | const struct fw_port_cmd *pcmd = (const void *)p->data; |
836 | unsigned int cmd = FW_CMD_OP_GET(ntohl(pcmd->op_to_portid)); | 836 | unsigned int cmd = FW_CMD_OP_G(ntohl(pcmd->op_to_portid)); |
837 | unsigned int action = | 837 | unsigned int action = |
838 | FW_PORT_CMD_ACTION_GET(ntohl(pcmd->action_to_len16)); | 838 | FW_PORT_CMD_ACTION_GET(ntohl(pcmd->action_to_len16)); |
839 | 839 | ||
@@ -1340,8 +1340,8 @@ static int set_filter_wr(struct adapter *adapter, int fidx) | |||
1340 | * filter specification structure but for now it's easiest to simply | 1340 | * filter specification structure but for now it's easiest to simply |
1341 | * put this fairly direct code in line ... | 1341 | * put this fairly direct code in line ... |
1342 | */ | 1342 | */ |
1343 | fwr->op_pkd = htonl(FW_WR_OP(FW_FILTER_WR)); | 1343 | fwr->op_pkd = htonl(FW_WR_OP_V(FW_FILTER_WR)); |
1344 | fwr->len16_pkd = htonl(FW_WR_LEN16(sizeof(*fwr)/16)); | 1344 | fwr->len16_pkd = htonl(FW_WR_LEN16_V(sizeof(*fwr)/16)); |
1345 | fwr->tid_to_iq = | 1345 | fwr->tid_to_iq = |
1346 | htonl(V_FW_FILTER_WR_TID(ftid) | | 1346 | htonl(V_FW_FILTER_WR_TID(ftid) | |
1347 | V_FW_FILTER_WR_RQTYPE(f->fs.type) | | 1347 | V_FW_FILTER_WR_RQTYPE(f->fs.type) | |
@@ -3417,8 +3417,8 @@ int cxgb4_clip_get(const struct net_device *dev, | |||
3417 | 3417 | ||
3418 | adap = netdev2adap(dev); | 3418 | adap = netdev2adap(dev); |
3419 | memset(&c, 0, sizeof(c)); | 3419 | memset(&c, 0, sizeof(c)); |
3420 | c.op_to_write = htonl(FW_CMD_OP(FW_CLIP_CMD) | | 3420 | c.op_to_write = htonl(FW_CMD_OP_V(FW_CLIP_CMD) | |
3421 | FW_CMD_REQUEST | FW_CMD_WRITE); | 3421 | FW_CMD_REQUEST_F | FW_CMD_WRITE_F); |
3422 | c.alloc_to_len16 = htonl(F_FW_CLIP_CMD_ALLOC | FW_LEN16(c)); | 3422 | c.alloc_to_len16 = htonl(F_FW_CLIP_CMD_ALLOC | FW_LEN16(c)); |
3423 | c.ip_hi = *(__be64 *)(lip->s6_addr); | 3423 | c.ip_hi = *(__be64 *)(lip->s6_addr); |
3424 | c.ip_lo = *(__be64 *)(lip->s6_addr + 8); | 3424 | c.ip_lo = *(__be64 *)(lip->s6_addr + 8); |
@@ -3434,8 +3434,8 @@ int cxgb4_clip_release(const struct net_device *dev, | |||
3434 | 3434 | ||
3435 | adap = netdev2adap(dev); | 3435 | adap = netdev2adap(dev); |
3436 | memset(&c, 0, sizeof(c)); | 3436 | memset(&c, 0, sizeof(c)); |
3437 | c.op_to_write = htonl(FW_CMD_OP(FW_CLIP_CMD) | | 3437 | c.op_to_write = htonl(FW_CMD_OP_V(FW_CLIP_CMD) | |
3438 | FW_CMD_REQUEST | FW_CMD_READ); | 3438 | FW_CMD_REQUEST_F | FW_CMD_READ_F); |
3439 | c.alloc_to_len16 = htonl(F_FW_CLIP_CMD_FREE | FW_LEN16(c)); | 3439 | c.alloc_to_len16 = htonl(F_FW_CLIP_CMD_FREE | FW_LEN16(c)); |
3440 | c.ip_hi = *(__be64 *)(lip->s6_addr); | 3440 | c.ip_hi = *(__be64 *)(lip->s6_addr); |
3441 | c.ip_lo = *(__be64 *)(lip->s6_addr + 8); | 3441 | c.ip_lo = *(__be64 *)(lip->s6_addr + 8); |
@@ -4871,9 +4871,9 @@ static u32 t4_read_pcie_cfg4(struct adapter *adap, int reg) | |||
4871 | */ | 4871 | */ |
4872 | memset(&ldst_cmd, 0, sizeof(ldst_cmd)); | 4872 | memset(&ldst_cmd, 0, sizeof(ldst_cmd)); |
4873 | ldst_cmd.op_to_addrspace = | 4873 | ldst_cmd.op_to_addrspace = |
4874 | htonl(FW_CMD_OP(FW_LDST_CMD) | | 4874 | htonl(FW_CMD_OP_V(FW_LDST_CMD) | |
4875 | FW_CMD_REQUEST | | 4875 | FW_CMD_REQUEST_F | |
4876 | FW_CMD_READ | | 4876 | FW_CMD_READ_F | |
4877 | FW_LDST_CMD_ADDRSPACE(FW_LDST_ADDRSPC_FUNC_PCIE)); | 4877 | FW_LDST_CMD_ADDRSPACE(FW_LDST_ADDRSPC_FUNC_PCIE)); |
4878 | ldst_cmd.cycles_to_len16 = htonl(FW_LEN16(ldst_cmd)); | 4878 | ldst_cmd.cycles_to_len16 = htonl(FW_LEN16(ldst_cmd)); |
4879 | ldst_cmd.u.pcie.select_naccess = FW_LDST_CMD_NACCESS(1); | 4879 | ldst_cmd.u.pcie.select_naccess = FW_LDST_CMD_NACCESS(1); |
@@ -4965,8 +4965,8 @@ static int adap_init1(struct adapter *adap, struct fw_caps_config_cmd *c) | |||
4965 | 4965 | ||
4966 | /* get device capabilities */ | 4966 | /* get device capabilities */ |
4967 | memset(c, 0, sizeof(*c)); | 4967 | memset(c, 0, sizeof(*c)); |
4968 | c->op_to_write = htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) | | 4968 | c->op_to_write = htonl(FW_CMD_OP_V(FW_CAPS_CONFIG_CMD) | |
4969 | FW_CMD_REQUEST | FW_CMD_READ); | 4969 | FW_CMD_REQUEST_F | FW_CMD_READ_F); |
4970 | c->cfvalid_to_len16 = htonl(FW_LEN16(*c)); | 4970 | c->cfvalid_to_len16 = htonl(FW_LEN16(*c)); |
4971 | ret = t4_wr_mbox(adap, adap->fn, c, sizeof(*c), c); | 4971 | ret = t4_wr_mbox(adap, adap->fn, c, sizeof(*c), c); |
4972 | if (ret < 0) | 4972 | if (ret < 0) |
@@ -4982,8 +4982,8 @@ static int adap_init1(struct adapter *adap, struct fw_caps_config_cmd *c) | |||
4982 | dev_err(adap->pdev_dev, "virtualization ACLs not supported"); | 4982 | dev_err(adap->pdev_dev, "virtualization ACLs not supported"); |
4983 | return ret; | 4983 | return ret; |
4984 | } | 4984 | } |
4985 | c->op_to_write = htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) | | 4985 | c->op_to_write = htonl(FW_CMD_OP_V(FW_CAPS_CONFIG_CMD) | |
4986 | FW_CMD_REQUEST | FW_CMD_WRITE); | 4986 | FW_CMD_REQUEST_F | FW_CMD_WRITE_F); |
4987 | ret = t4_wr_mbox(adap, adap->fn, c, sizeof(*c), NULL); | 4987 | ret = t4_wr_mbox(adap, adap->fn, c, sizeof(*c), NULL); |
4988 | if (ret < 0) | 4988 | if (ret < 0) |
4989 | return ret; | 4989 | return ret; |
@@ -5209,9 +5209,9 @@ static int adap_init0_config(struct adapter *adapter, int reset) | |||
5209 | */ | 5209 | */ |
5210 | memset(&caps_cmd, 0, sizeof(caps_cmd)); | 5210 | memset(&caps_cmd, 0, sizeof(caps_cmd)); |
5211 | caps_cmd.op_to_write = | 5211 | caps_cmd.op_to_write = |
5212 | htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) | | 5212 | htonl(FW_CMD_OP_V(FW_CAPS_CONFIG_CMD) | |
5213 | FW_CMD_REQUEST | | 5213 | FW_CMD_REQUEST_F | |
5214 | FW_CMD_READ); | 5214 | FW_CMD_READ_F); |
5215 | caps_cmd.cfvalid_to_len16 = | 5215 | caps_cmd.cfvalid_to_len16 = |
5216 | htonl(FW_CAPS_CONFIG_CMD_CFVALID | | 5216 | htonl(FW_CAPS_CONFIG_CMD_CFVALID | |
5217 | FW_CAPS_CONFIG_CMD_MEMTYPE_CF(mtype) | | 5217 | FW_CAPS_CONFIG_CMD_MEMTYPE_CF(mtype) | |
@@ -5229,9 +5229,9 @@ static int adap_init0_config(struct adapter *adapter, int reset) | |||
5229 | if (ret == -ENOENT) { | 5229 | if (ret == -ENOENT) { |
5230 | memset(&caps_cmd, 0, sizeof(caps_cmd)); | 5230 | memset(&caps_cmd, 0, sizeof(caps_cmd)); |
5231 | caps_cmd.op_to_write = | 5231 | caps_cmd.op_to_write = |
5232 | htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) | | 5232 | htonl(FW_CMD_OP_V(FW_CAPS_CONFIG_CMD) | |
5233 | FW_CMD_REQUEST | | 5233 | FW_CMD_REQUEST_F | |
5234 | FW_CMD_READ); | 5234 | FW_CMD_READ_F); |
5235 | caps_cmd.cfvalid_to_len16 = htonl(FW_LEN16(caps_cmd)); | 5235 | caps_cmd.cfvalid_to_len16 = htonl(FW_LEN16(caps_cmd)); |
5236 | ret = t4_wr_mbox(adapter, adapter->mbox, &caps_cmd, | 5236 | ret = t4_wr_mbox(adapter, adapter->mbox, &caps_cmd, |
5237 | sizeof(caps_cmd), &caps_cmd); | 5237 | sizeof(caps_cmd), &caps_cmd); |
@@ -5254,9 +5254,9 @@ static int adap_init0_config(struct adapter *adapter, int reset) | |||
5254 | * And now tell the firmware to use the configuration we just loaded. | 5254 | * And now tell the firmware to use the configuration we just loaded. |
5255 | */ | 5255 | */ |
5256 | caps_cmd.op_to_write = | 5256 | caps_cmd.op_to_write = |
5257 | htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) | | 5257 | htonl(FW_CMD_OP_V(FW_CAPS_CONFIG_CMD) | |
5258 | FW_CMD_REQUEST | | 5258 | FW_CMD_REQUEST_F | |
5259 | FW_CMD_WRITE); | 5259 | FW_CMD_WRITE_F); |
5260 | caps_cmd.cfvalid_to_len16 = htonl(FW_LEN16(caps_cmd)); | 5260 | caps_cmd.cfvalid_to_len16 = htonl(FW_LEN16(caps_cmd)); |
5261 | ret = t4_wr_mbox(adapter, adapter->mbox, &caps_cmd, sizeof(caps_cmd), | 5261 | ret = t4_wr_mbox(adapter, adapter->mbox, &caps_cmd, sizeof(caps_cmd), |
5262 | NULL); | 5262 | NULL); |
@@ -5327,8 +5327,8 @@ static int adap_init0_no_config(struct adapter *adapter, int reset) | |||
5327 | * Get device capabilities and select which we'll be using. | 5327 | * Get device capabilities and select which we'll be using. |
5328 | */ | 5328 | */ |
5329 | memset(&caps_cmd, 0, sizeof(caps_cmd)); | 5329 | memset(&caps_cmd, 0, sizeof(caps_cmd)); |
5330 | caps_cmd.op_to_write = htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) | | 5330 | caps_cmd.op_to_write = htonl(FW_CMD_OP_V(FW_CAPS_CONFIG_CMD) | |
5331 | FW_CMD_REQUEST | FW_CMD_READ); | 5331 | FW_CMD_REQUEST_F | FW_CMD_READ_F); |
5332 | caps_cmd.cfvalid_to_len16 = htonl(FW_LEN16(caps_cmd)); | 5332 | caps_cmd.cfvalid_to_len16 = htonl(FW_LEN16(caps_cmd)); |
5333 | ret = t4_wr_mbox(adapter, adapter->mbox, &caps_cmd, sizeof(caps_cmd), | 5333 | ret = t4_wr_mbox(adapter, adapter->mbox, &caps_cmd, sizeof(caps_cmd), |
5334 | &caps_cmd); | 5334 | &caps_cmd); |
@@ -5344,8 +5344,8 @@ static int adap_init0_no_config(struct adapter *adapter, int reset) | |||
5344 | dev_err(adapter->pdev_dev, "virtualization ACLs not supported"); | 5344 | dev_err(adapter->pdev_dev, "virtualization ACLs not supported"); |
5345 | goto bye; | 5345 | goto bye; |
5346 | } | 5346 | } |
5347 | caps_cmd.op_to_write = htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) | | 5347 | caps_cmd.op_to_write = htonl(FW_CMD_OP_V(FW_CAPS_CONFIG_CMD) | |
5348 | FW_CMD_REQUEST | FW_CMD_WRITE); | 5348 | FW_CMD_REQUEST_F | FW_CMD_WRITE_F); |
5349 | ret = t4_wr_mbox(adapter, adapter->mbox, &caps_cmd, sizeof(caps_cmd), | 5349 | ret = t4_wr_mbox(adapter, adapter->mbox, &caps_cmd, sizeof(caps_cmd), |
5350 | NULL); | 5350 | NULL); |
5351 | if (ret < 0) | 5351 | if (ret < 0) |
@@ -5713,7 +5713,6 @@ static int adap_init0(struct adapter *adap) | |||
5713 | } else { | 5713 | } else { |
5714 | dev_info(adap->pdev_dev, "Coming up as MASTER: "\ | 5714 | dev_info(adap->pdev_dev, "Coming up as MASTER: "\ |
5715 | "Initializing adapter\n"); | 5715 | "Initializing adapter\n"); |
5716 | |||
5717 | /* | 5716 | /* |
5718 | * If the firmware doesn't support Configuration | 5717 | * If the firmware doesn't support Configuration |
5719 | * Files warn user and exit, | 5718 | * Files warn user and exit, |
@@ -5757,6 +5756,7 @@ static int adap_init0(struct adapter *adap) | |||
5757 | "No Configuration File present " | 5756 | "No Configuration File present " |
5758 | "on adapter. Using hard-wired " | 5757 | "on adapter. Using hard-wired " |
5759 | "configuration parameters.\n"); | 5758 | "configuration parameters.\n"); |
5759 | goto bye; | ||
5760 | ret = adap_init0_no_config(adap, reset); | 5760 | ret = adap_init0_no_config(adap, reset); |
5761 | } | 5761 | } |
5762 | } | 5762 | } |
@@ -5856,8 +5856,8 @@ static int adap_init0(struct adapter *adap) | |||
5856 | * to manage. | 5856 | * to manage. |
5857 | */ | 5857 | */ |
5858 | memset(&caps_cmd, 0, sizeof(caps_cmd)); | 5858 | memset(&caps_cmd, 0, sizeof(caps_cmd)); |
5859 | caps_cmd.op_to_write = htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) | | 5859 | caps_cmd.op_to_write = htonl(FW_CMD_OP_V(FW_CAPS_CONFIG_CMD) | |
5860 | FW_CMD_REQUEST | FW_CMD_READ); | 5860 | FW_CMD_REQUEST_F | FW_CMD_READ_F); |
5861 | caps_cmd.cfvalid_to_len16 = htonl(FW_LEN16(caps_cmd)); | 5861 | caps_cmd.cfvalid_to_len16 = htonl(FW_LEN16(caps_cmd)); |
5862 | ret = t4_wr_mbox(adap, adap->mbox, &caps_cmd, sizeof(caps_cmd), | 5862 | ret = t4_wr_mbox(adap, adap->mbox, &caps_cmd, sizeof(caps_cmd), |
5863 | &caps_cmd); | 5863 | &caps_cmd); |
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h index 1366ba620c87..4eba7cb1b89c 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h | |||
@@ -52,10 +52,10 @@ enum { | |||
52 | }; | 52 | }; |
53 | 53 | ||
54 | #define INIT_TP_WR(w, tid) do { \ | 54 | #define INIT_TP_WR(w, tid) do { \ |
55 | (w)->wr.wr_hi = htonl(FW_WR_OP(FW_TP_WR) | \ | 55 | (w)->wr.wr_hi = htonl(FW_WR_OP_V(FW_TP_WR) | \ |
56 | FW_WR_IMMDLEN(sizeof(*w) - sizeof(w->wr))); \ | 56 | FW_WR_IMMDLEN_V(sizeof(*w) - sizeof(w->wr))); \ |
57 | (w)->wr.wr_mid = htonl(FW_WR_LEN16(DIV_ROUND_UP(sizeof(*w), 16)) | \ | 57 | (w)->wr.wr_mid = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*w), 16)) | \ |
58 | FW_WR_FLOWID(tid)); \ | 58 | FW_WR_FLOWID_V(tid)); \ |
59 | (w)->wr.wr_lo = cpu_to_be64(0); \ | 59 | (w)->wr.wr_lo = cpu_to_be64(0); \ |
60 | } while (0) | 60 | } while (0) |
61 | 61 | ||
@@ -65,9 +65,10 @@ enum { | |||
65 | } while (0) | 65 | } while (0) |
66 | 66 | ||
67 | #define INIT_ULPTX_WR(w, wrlen, atomic, tid) do { \ | 67 | #define INIT_ULPTX_WR(w, wrlen, atomic, tid) do { \ |
68 | (w)->wr.wr_hi = htonl(FW_WR_OP(FW_ULPTX_WR) | FW_WR_ATOMIC(atomic)); \ | 68 | (w)->wr.wr_hi = htonl(FW_WR_OP_V(FW_ULPTX_WR) | \ |
69 | (w)->wr.wr_mid = htonl(FW_WR_LEN16(DIV_ROUND_UP(wrlen, 16)) | \ | 69 | FW_WR_ATOMIC_V(atomic)); \ |
70 | FW_WR_FLOWID(tid)); \ | 70 | (w)->wr.wr_mid = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(wrlen, 16)) | \ |
71 | FW_WR_FLOWID_V(tid)); \ | ||
71 | (w)->wr.wr_lo = cpu_to_be64(0); \ | 72 | (w)->wr.wr_lo = cpu_to_be64(0); \ |
72 | } while (0) | 73 | } while (0) |
73 | 74 | ||
diff --git a/drivers/net/ethernet/chelsio/cxgb4/sge.c b/drivers/net/ethernet/chelsio/cxgb4/sge.c index 5e1b314e11af..6399e008a7f7 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/sge.c +++ b/drivers/net/ethernet/chelsio/cxgb4/sge.c | |||
@@ -1092,10 +1092,10 @@ out_free: dev_kfree_skb_any(skb); | |||
1092 | goto out_free; | 1092 | goto out_free; |
1093 | } | 1093 | } |
1094 | 1094 | ||
1095 | wr_mid = FW_WR_LEN16(DIV_ROUND_UP(flits, 2)); | 1095 | wr_mid = FW_WR_LEN16_V(DIV_ROUND_UP(flits, 2)); |
1096 | if (unlikely(credits < ETHTXQ_STOP_THRES)) { | 1096 | if (unlikely(credits < ETHTXQ_STOP_THRES)) { |
1097 | eth_txq_stop(q); | 1097 | eth_txq_stop(q); |
1098 | wr_mid |= FW_WR_EQUEQ | FW_WR_EQUIQ; | 1098 | wr_mid |= FW_WR_EQUEQ_F | FW_WR_EQUIQ_F; |
1099 | } | 1099 | } |
1100 | 1100 | ||
1101 | wr = (void *)&q->q.desc[q->q.pidx]; | 1101 | wr = (void *)&q->q.desc[q->q.pidx]; |
@@ -1112,8 +1112,8 @@ out_free: dev_kfree_skb_any(skb); | |||
1112 | int eth_xtra_len = skb_network_offset(skb) - ETH_HLEN; | 1112 | int eth_xtra_len = skb_network_offset(skb) - ETH_HLEN; |
1113 | 1113 | ||
1114 | len += sizeof(*lso); | 1114 | len += sizeof(*lso); |
1115 | wr->op_immdlen = htonl(FW_WR_OP(FW_ETH_TX_PKT_WR) | | 1115 | wr->op_immdlen = htonl(FW_WR_OP_V(FW_ETH_TX_PKT_WR) | |
1116 | FW_WR_IMMDLEN(len)); | 1116 | FW_WR_IMMDLEN_V(len)); |
1117 | lso->c.lso_ctrl = htonl(LSO_OPCODE(CPL_TX_PKT_LSO) | | 1117 | lso->c.lso_ctrl = htonl(LSO_OPCODE(CPL_TX_PKT_LSO) | |
1118 | LSO_FIRST_SLICE | LSO_LAST_SLICE | | 1118 | LSO_FIRST_SLICE | LSO_LAST_SLICE | |
1119 | LSO_IPV6(v6) | | 1119 | LSO_IPV6(v6) | |
@@ -1135,8 +1135,8 @@ out_free: dev_kfree_skb_any(skb); | |||
1135 | q->tx_cso += ssi->gso_segs; | 1135 | q->tx_cso += ssi->gso_segs; |
1136 | } else { | 1136 | } else { |
1137 | len += sizeof(*cpl); | 1137 | len += sizeof(*cpl); |
1138 | wr->op_immdlen = htonl(FW_WR_OP(FW_ETH_TX_PKT_WR) | | 1138 | wr->op_immdlen = htonl(FW_WR_OP_V(FW_ETH_TX_PKT_WR) | |
1139 | FW_WR_IMMDLEN(len)); | 1139 | FW_WR_IMMDLEN_V(len)); |
1140 | cpl = (void *)(wr + 1); | 1140 | cpl = (void *)(wr + 1); |
1141 | if (skb->ip_summed == CHECKSUM_PARTIAL) { | 1141 | if (skb->ip_summed == CHECKSUM_PARTIAL) { |
1142 | cntrl = hwcsum(skb) | TXPKT_IPCSUM_DIS; | 1142 | cntrl = hwcsum(skb) | TXPKT_IPCSUM_DIS; |
@@ -1224,7 +1224,7 @@ static void ctrlq_check_stop(struct sge_ctrl_txq *q, struct fw_wr_hdr *wr) | |||
1224 | { | 1224 | { |
1225 | reclaim_completed_tx_imm(&q->q); | 1225 | reclaim_completed_tx_imm(&q->q); |
1226 | if (unlikely(txq_avail(&q->q) < TXQ_STOP_THRES)) { | 1226 | if (unlikely(txq_avail(&q->q) < TXQ_STOP_THRES)) { |
1227 | wr->lo |= htonl(FW_WR_EQUEQ | FW_WR_EQUIQ); | 1227 | wr->lo |= htonl(FW_WR_EQUEQ_F | FW_WR_EQUIQ_F); |
1228 | q->q.stops++; | 1228 | q->q.stops++; |
1229 | q->full = 1; | 1229 | q->full = 1; |
1230 | } | 1230 | } |
@@ -1406,7 +1406,7 @@ static void ofldtxq_stop(struct sge_ofld_txq *q, struct sk_buff *skb) | |||
1406 | { | 1406 | { |
1407 | struct fw_wr_hdr *wr = (struct fw_wr_hdr *)skb->data; | 1407 | struct fw_wr_hdr *wr = (struct fw_wr_hdr *)skb->data; |
1408 | 1408 | ||
1409 | wr->lo |= htonl(FW_WR_EQUEQ | FW_WR_EQUIQ); | 1409 | wr->lo |= htonl(FW_WR_EQUEQ_F | FW_WR_EQUIQ_F); |
1410 | q->q.stops++; | 1410 | q->q.stops++; |
1411 | q->full = 1; | 1411 | q->full = 1; |
1412 | } | 1412 | } |
@@ -2297,8 +2297,8 @@ int t4_sge_alloc_rxq(struct adapter *adap, struct sge_rspq *iq, bool fwevtq, | |||
2297 | return -ENOMEM; | 2297 | return -ENOMEM; |
2298 | 2298 | ||
2299 | memset(&c, 0, sizeof(c)); | 2299 | memset(&c, 0, sizeof(c)); |
2300 | c.op_to_vfn = htonl(FW_CMD_OP(FW_IQ_CMD) | FW_CMD_REQUEST | | 2300 | c.op_to_vfn = htonl(FW_CMD_OP_V(FW_IQ_CMD) | FW_CMD_REQUEST_F | |
2301 | FW_CMD_WRITE | FW_CMD_EXEC | | 2301 | FW_CMD_WRITE_F | FW_CMD_EXEC_F | |
2302 | FW_IQ_CMD_PFN(adap->fn) | FW_IQ_CMD_VFN(0)); | 2302 | FW_IQ_CMD_PFN(adap->fn) | FW_IQ_CMD_VFN(0)); |
2303 | c.alloc_to_len16 = htonl(FW_IQ_CMD_ALLOC | FW_IQ_CMD_IQSTART(1) | | 2303 | c.alloc_to_len16 = htonl(FW_IQ_CMD_ALLOC | FW_IQ_CMD_IQSTART(1) | |
2304 | FW_LEN16(c)); | 2304 | FW_LEN16(c)); |
@@ -2423,8 +2423,8 @@ int t4_sge_alloc_eth_txq(struct adapter *adap, struct sge_eth_txq *txq, | |||
2423 | return -ENOMEM; | 2423 | return -ENOMEM; |
2424 | 2424 | ||
2425 | memset(&c, 0, sizeof(c)); | 2425 | memset(&c, 0, sizeof(c)); |
2426 | c.op_to_vfn = htonl(FW_CMD_OP(FW_EQ_ETH_CMD) | FW_CMD_REQUEST | | 2426 | c.op_to_vfn = htonl(FW_CMD_OP_V(FW_EQ_ETH_CMD) | FW_CMD_REQUEST_F | |
2427 | FW_CMD_WRITE | FW_CMD_EXEC | | 2427 | FW_CMD_WRITE_F | FW_CMD_EXEC_F | |
2428 | FW_EQ_ETH_CMD_PFN(adap->fn) | FW_EQ_ETH_CMD_VFN(0)); | 2428 | FW_EQ_ETH_CMD_PFN(adap->fn) | FW_EQ_ETH_CMD_VFN(0)); |
2429 | c.alloc_to_len16 = htonl(FW_EQ_ETH_CMD_ALLOC | | 2429 | c.alloc_to_len16 = htonl(FW_EQ_ETH_CMD_ALLOC | |
2430 | FW_EQ_ETH_CMD_EQSTART | FW_LEN16(c)); | 2430 | FW_EQ_ETH_CMD_EQSTART | FW_LEN16(c)); |
@@ -2476,8 +2476,8 @@ int t4_sge_alloc_ctrl_txq(struct adapter *adap, struct sge_ctrl_txq *txq, | |||
2476 | if (!txq->q.desc) | 2476 | if (!txq->q.desc) |
2477 | return -ENOMEM; | 2477 | return -ENOMEM; |
2478 | 2478 | ||
2479 | c.op_to_vfn = htonl(FW_CMD_OP(FW_EQ_CTRL_CMD) | FW_CMD_REQUEST | | 2479 | c.op_to_vfn = htonl(FW_CMD_OP_V(FW_EQ_CTRL_CMD) | FW_CMD_REQUEST_F | |
2480 | FW_CMD_WRITE | FW_CMD_EXEC | | 2480 | FW_CMD_WRITE_F | FW_CMD_EXEC_F | |
2481 | FW_EQ_CTRL_CMD_PFN(adap->fn) | | 2481 | FW_EQ_CTRL_CMD_PFN(adap->fn) | |
2482 | FW_EQ_CTRL_CMD_VFN(0)); | 2482 | FW_EQ_CTRL_CMD_VFN(0)); |
2483 | c.alloc_to_len16 = htonl(FW_EQ_CTRL_CMD_ALLOC | | 2483 | c.alloc_to_len16 = htonl(FW_EQ_CTRL_CMD_ALLOC | |
@@ -2530,8 +2530,8 @@ int t4_sge_alloc_ofld_txq(struct adapter *adap, struct sge_ofld_txq *txq, | |||
2530 | return -ENOMEM; | 2530 | return -ENOMEM; |
2531 | 2531 | ||
2532 | memset(&c, 0, sizeof(c)); | 2532 | memset(&c, 0, sizeof(c)); |
2533 | c.op_to_vfn = htonl(FW_CMD_OP(FW_EQ_OFLD_CMD) | FW_CMD_REQUEST | | 2533 | c.op_to_vfn = htonl(FW_CMD_OP_V(FW_EQ_OFLD_CMD) | FW_CMD_REQUEST_F | |
2534 | FW_CMD_WRITE | FW_CMD_EXEC | | 2534 | FW_CMD_WRITE_F | FW_CMD_EXEC_F | |
2535 | FW_EQ_OFLD_CMD_PFN(adap->fn) | | 2535 | FW_EQ_OFLD_CMD_PFN(adap->fn) | |
2536 | FW_EQ_OFLD_CMD_VFN(0)); | 2536 | FW_EQ_OFLD_CMD_VFN(0)); |
2537 | c.alloc_to_len16 = htonl(FW_EQ_OFLD_CMD_ALLOC | | 2537 | c.alloc_to_len16 = htonl(FW_EQ_OFLD_CMD_ALLOC | |
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c index 945fd1401d6a..2bb4efa7db98 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c +++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | |||
@@ -310,16 +310,17 @@ int t4_wr_mbox_meat(struct adapter *adap, int mbox, const void *cmd, int size, | |||
310 | } | 310 | } |
311 | 311 | ||
312 | res = t4_read_reg64(adap, data_reg); | 312 | res = t4_read_reg64(adap, data_reg); |
313 | if (FW_CMD_OP_GET(res >> 32) == FW_DEBUG_CMD) { | 313 | if (FW_CMD_OP_G(res >> 32) == FW_DEBUG_CMD) { |
314 | fw_asrt(adap, data_reg); | 314 | fw_asrt(adap, data_reg); |
315 | res = FW_CMD_RETVAL(EIO); | 315 | res = FW_CMD_RETVAL_V(EIO); |
316 | } else if (rpl) | 316 | } else if (rpl) { |
317 | get_mbox_rpl(adap, rpl, size / 8, data_reg); | 317 | get_mbox_rpl(adap, rpl, size / 8, data_reg); |
318 | } | ||
318 | 319 | ||
319 | if (FW_CMD_RETVAL_GET((int)res)) | 320 | if (FW_CMD_RETVAL_G((int)res)) |
320 | dump_mbox(adap, mbox, data_reg); | 321 | dump_mbox(adap, mbox, data_reg); |
321 | t4_write_reg(adap, ctl_reg, 0); | 322 | t4_write_reg(adap, ctl_reg, 0); |
322 | return -FW_CMD_RETVAL_GET((int)res); | 323 | return -FW_CMD_RETVAL_G((int)res); |
323 | } | 324 | } |
324 | } | 325 | } |
325 | 326 | ||
@@ -1245,8 +1246,8 @@ int t4_link_start(struct adapter *adap, unsigned int mbox, unsigned int port, | |||
1245 | fc |= FW_PORT_CAP_FC_TX; | 1246 | fc |= FW_PORT_CAP_FC_TX; |
1246 | 1247 | ||
1247 | memset(&c, 0, sizeof(c)); | 1248 | memset(&c, 0, sizeof(c)); |
1248 | c.op_to_portid = htonl(FW_CMD_OP(FW_PORT_CMD) | FW_CMD_REQUEST | | 1249 | c.op_to_portid = htonl(FW_CMD_OP_V(FW_PORT_CMD) | FW_CMD_REQUEST_F | |
1249 | FW_CMD_EXEC | FW_PORT_CMD_PORTID(port)); | 1250 | FW_CMD_EXEC_F | FW_PORT_CMD_PORTID(port)); |
1250 | c.action_to_len16 = htonl(FW_PORT_CMD_ACTION(FW_PORT_ACTION_L1_CFG) | | 1251 | c.action_to_len16 = htonl(FW_PORT_CMD_ACTION(FW_PORT_ACTION_L1_CFG) | |
1251 | FW_LEN16(c)); | 1252 | FW_LEN16(c)); |
1252 | 1253 | ||
@@ -1275,8 +1276,8 @@ int t4_restart_aneg(struct adapter *adap, unsigned int mbox, unsigned int port) | |||
1275 | struct fw_port_cmd c; | 1276 | struct fw_port_cmd c; |
1276 | 1277 | ||
1277 | memset(&c, 0, sizeof(c)); | 1278 | memset(&c, 0, sizeof(c)); |
1278 | c.op_to_portid = htonl(FW_CMD_OP(FW_PORT_CMD) | FW_CMD_REQUEST | | 1279 | c.op_to_portid = htonl(FW_CMD_OP_V(FW_PORT_CMD) | FW_CMD_REQUEST_F | |
1279 | FW_CMD_EXEC | FW_PORT_CMD_PORTID(port)); | 1280 | FW_CMD_EXEC_F | FW_PORT_CMD_PORTID(port)); |
1280 | c.action_to_len16 = htonl(FW_PORT_CMD_ACTION(FW_PORT_ACTION_L1_CFG) | | 1281 | c.action_to_len16 = htonl(FW_PORT_CMD_ACTION(FW_PORT_ACTION_L1_CFG) | |
1281 | FW_LEN16(c)); | 1282 | FW_LEN16(c)); |
1282 | c.u.l1cfg.rcap = htonl(FW_PORT_CAP_ANEG); | 1283 | c.u.l1cfg.rcap = htonl(FW_PORT_CAP_ANEG); |
@@ -2071,8 +2072,8 @@ int t4_config_rss_range(struct adapter *adapter, int mbox, unsigned int viid, | |||
2071 | struct fw_rss_ind_tbl_cmd cmd; | 2072 | struct fw_rss_ind_tbl_cmd cmd; |
2072 | 2073 | ||
2073 | memset(&cmd, 0, sizeof(cmd)); | 2074 | memset(&cmd, 0, sizeof(cmd)); |
2074 | cmd.op_to_viid = htonl(FW_CMD_OP(FW_RSS_IND_TBL_CMD) | | 2075 | cmd.op_to_viid = htonl(FW_CMD_OP_V(FW_RSS_IND_TBL_CMD) | |
2075 | FW_CMD_REQUEST | FW_CMD_WRITE | | 2076 | FW_CMD_REQUEST_F | FW_CMD_WRITE_F | |
2076 | FW_RSS_IND_TBL_CMD_VIID(viid)); | 2077 | FW_RSS_IND_TBL_CMD_VIID(viid)); |
2077 | cmd.retval_len16 = htonl(FW_LEN16(cmd)); | 2078 | cmd.retval_len16 = htonl(FW_LEN16(cmd)); |
2078 | 2079 | ||
@@ -2126,8 +2127,8 @@ int t4_config_glbl_rss(struct adapter *adapter, int mbox, unsigned int mode, | |||
2126 | struct fw_rss_glb_config_cmd c; | 2127 | struct fw_rss_glb_config_cmd c; |
2127 | 2128 | ||
2128 | memset(&c, 0, sizeof(c)); | 2129 | memset(&c, 0, sizeof(c)); |
2129 | c.op_to_write = htonl(FW_CMD_OP(FW_RSS_GLB_CONFIG_CMD) | | 2130 | c.op_to_write = htonl(FW_CMD_OP_V(FW_RSS_GLB_CONFIG_CMD) | |
2130 | FW_CMD_REQUEST | FW_CMD_WRITE); | 2131 | FW_CMD_REQUEST_F | FW_CMD_WRITE_F); |
2131 | c.retval_len16 = htonl(FW_LEN16(c)); | 2132 | c.retval_len16 = htonl(FW_LEN16(c)); |
2132 | if (mode == FW_RSS_GLB_CONFIG_CMD_MODE_MANUAL) { | 2133 | if (mode == FW_RSS_GLB_CONFIG_CMD_MODE_MANUAL) { |
2133 | c.u.manual.mode_pkd = htonl(FW_RSS_GLB_CONFIG_CMD_MODE(mode)); | 2134 | c.u.manual.mode_pkd = htonl(FW_RSS_GLB_CONFIG_CMD_MODE(mode)); |
@@ -2553,8 +2554,8 @@ int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map, | |||
2553 | void t4_mk_filtdelwr(unsigned int ftid, struct fw_filter_wr *wr, int qid) | 2554 | void t4_mk_filtdelwr(unsigned int ftid, struct fw_filter_wr *wr, int qid) |
2554 | { | 2555 | { |
2555 | memset(wr, 0, sizeof(*wr)); | 2556 | memset(wr, 0, sizeof(*wr)); |
2556 | wr->op_pkd = htonl(FW_WR_OP(FW_FILTER_WR)); | 2557 | wr->op_pkd = htonl(FW_WR_OP_V(FW_FILTER_WR)); |
2557 | wr->len16_pkd = htonl(FW_WR_LEN16(sizeof(*wr) / 16)); | 2558 | wr->len16_pkd = htonl(FW_WR_LEN16_V(sizeof(*wr) / 16)); |
2558 | wr->tid_to_iq = htonl(V_FW_FILTER_WR_TID(ftid) | | 2559 | wr->tid_to_iq = htonl(V_FW_FILTER_WR_TID(ftid) | |
2559 | V_FW_FILTER_WR_NOREPLY(qid < 0)); | 2560 | V_FW_FILTER_WR_NOREPLY(qid < 0)); |
2560 | wr->del_filter_to_l2tix = htonl(F_FW_FILTER_WR_DEL_FILTER); | 2561 | wr->del_filter_to_l2tix = htonl(F_FW_FILTER_WR_DEL_FILTER); |
@@ -2563,8 +2564,8 @@ void t4_mk_filtdelwr(unsigned int ftid, struct fw_filter_wr *wr, int qid) | |||
2563 | } | 2564 | } |
2564 | 2565 | ||
2565 | #define INIT_CMD(var, cmd, rd_wr) do { \ | 2566 | #define INIT_CMD(var, cmd, rd_wr) do { \ |
2566 | (var).op_to_write = htonl(FW_CMD_OP(FW_##cmd##_CMD) | \ | 2567 | (var).op_to_write = htonl(FW_CMD_OP_V(FW_##cmd##_CMD) | \ |
2567 | FW_CMD_REQUEST | FW_CMD_##rd_wr); \ | 2568 | FW_CMD_REQUEST_F | FW_CMD_##rd_wr##_F); \ |
2568 | (var).retval_len16 = htonl(FW_LEN16(var)); \ | 2569 | (var).retval_len16 = htonl(FW_LEN16(var)); \ |
2569 | } while (0) | 2570 | } while (0) |
2570 | 2571 | ||
@@ -2574,8 +2575,8 @@ int t4_fwaddrspace_write(struct adapter *adap, unsigned int mbox, | |||
2574 | struct fw_ldst_cmd c; | 2575 | struct fw_ldst_cmd c; |
2575 | 2576 | ||
2576 | memset(&c, 0, sizeof(c)); | 2577 | memset(&c, 0, sizeof(c)); |
2577 | c.op_to_addrspace = htonl(FW_CMD_OP(FW_LDST_CMD) | FW_CMD_REQUEST | | 2578 | c.op_to_addrspace = htonl(FW_CMD_OP_V(FW_LDST_CMD) | FW_CMD_REQUEST_F | |
2578 | FW_CMD_WRITE | | 2579 | FW_CMD_WRITE_F | |
2579 | FW_LDST_CMD_ADDRSPACE(FW_LDST_ADDRSPC_FIRMWARE)); | 2580 | FW_LDST_CMD_ADDRSPACE(FW_LDST_ADDRSPC_FIRMWARE)); |
2580 | c.cycles_to_len16 = htonl(FW_LEN16(c)); | 2581 | c.cycles_to_len16 = htonl(FW_LEN16(c)); |
2581 | c.u.addrval.addr = htonl(addr); | 2582 | c.u.addrval.addr = htonl(addr); |
@@ -2602,8 +2603,8 @@ int t4_mdio_rd(struct adapter *adap, unsigned int mbox, unsigned int phy_addr, | |||
2602 | struct fw_ldst_cmd c; | 2603 | struct fw_ldst_cmd c; |
2603 | 2604 | ||
2604 | memset(&c, 0, sizeof(c)); | 2605 | memset(&c, 0, sizeof(c)); |
2605 | c.op_to_addrspace = htonl(FW_CMD_OP(FW_LDST_CMD) | FW_CMD_REQUEST | | 2606 | c.op_to_addrspace = htonl(FW_CMD_OP_V(FW_LDST_CMD) | FW_CMD_REQUEST_F | |
2606 | FW_CMD_READ | FW_LDST_CMD_ADDRSPACE(FW_LDST_ADDRSPC_MDIO)); | 2607 | FW_CMD_READ_F | FW_LDST_CMD_ADDRSPACE(FW_LDST_ADDRSPC_MDIO)); |
2607 | c.cycles_to_len16 = htonl(FW_LEN16(c)); | 2608 | c.cycles_to_len16 = htonl(FW_LEN16(c)); |
2608 | c.u.mdio.paddr_mmd = htons(FW_LDST_CMD_PADDR(phy_addr) | | 2609 | c.u.mdio.paddr_mmd = htons(FW_LDST_CMD_PADDR(phy_addr) | |
2609 | FW_LDST_CMD_MMD(mmd)); | 2610 | FW_LDST_CMD_MMD(mmd)); |
@@ -2632,8 +2633,8 @@ int t4_mdio_wr(struct adapter *adap, unsigned int mbox, unsigned int phy_addr, | |||
2632 | struct fw_ldst_cmd c; | 2633 | struct fw_ldst_cmd c; |
2633 | 2634 | ||
2634 | memset(&c, 0, sizeof(c)); | 2635 | memset(&c, 0, sizeof(c)); |
2635 | c.op_to_addrspace = htonl(FW_CMD_OP(FW_LDST_CMD) | FW_CMD_REQUEST | | 2636 | c.op_to_addrspace = htonl(FW_CMD_OP_V(FW_LDST_CMD) | FW_CMD_REQUEST_F | |
2636 | FW_CMD_WRITE | FW_LDST_CMD_ADDRSPACE(FW_LDST_ADDRSPC_MDIO)); | 2637 | FW_CMD_WRITE_F | FW_LDST_CMD_ADDRSPACE(FW_LDST_ADDRSPC_MDIO)); |
2637 | c.cycles_to_len16 = htonl(FW_LEN16(c)); | 2638 | c.cycles_to_len16 = htonl(FW_LEN16(c)); |
2638 | c.u.mdio.paddr_mmd = htons(FW_LDST_CMD_PADDR(phy_addr) | | 2639 | c.u.mdio.paddr_mmd = htons(FW_LDST_CMD_PADDR(phy_addr) | |
2639 | FW_LDST_CMD_MMD(mmd)); | 2640 | FW_LDST_CMD_MMD(mmd)); |
@@ -3211,8 +3212,8 @@ int t4_query_params(struct adapter *adap, unsigned int mbox, unsigned int pf, | |||
3211 | return -EINVAL; | 3212 | return -EINVAL; |
3212 | 3213 | ||
3213 | memset(&c, 0, sizeof(c)); | 3214 | memset(&c, 0, sizeof(c)); |
3214 | c.op_to_vfn = htonl(FW_CMD_OP(FW_PARAMS_CMD) | FW_CMD_REQUEST | | 3215 | c.op_to_vfn = htonl(FW_CMD_OP_V(FW_PARAMS_CMD) | FW_CMD_REQUEST_F | |
3215 | FW_CMD_READ | FW_PARAMS_CMD_PFN(pf) | | 3216 | FW_CMD_READ_F | FW_PARAMS_CMD_PFN(pf) | |
3216 | FW_PARAMS_CMD_VFN(vf)); | 3217 | FW_PARAMS_CMD_VFN(vf)); |
3217 | c.retval_len16 = htonl(FW_LEN16(c)); | 3218 | c.retval_len16 = htonl(FW_LEN16(c)); |
3218 | for (i = 0; i < nparams; i++, p += 2) | 3219 | for (i = 0; i < nparams; i++, p += 2) |
@@ -3251,8 +3252,8 @@ int t4_set_params_nosleep(struct adapter *adap, unsigned int mbox, | |||
3251 | return -EINVAL; | 3252 | return -EINVAL; |
3252 | 3253 | ||
3253 | memset(&c, 0, sizeof(c)); | 3254 | memset(&c, 0, sizeof(c)); |
3254 | c.op_to_vfn = cpu_to_be32(FW_CMD_OP(FW_PARAMS_CMD) | | 3255 | c.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PARAMS_CMD) | |
3255 | FW_CMD_REQUEST | FW_CMD_WRITE | | 3256 | FW_CMD_REQUEST_F | FW_CMD_WRITE_F | |
3256 | FW_PARAMS_CMD_PFN(pf) | | 3257 | FW_PARAMS_CMD_PFN(pf) | |
3257 | FW_PARAMS_CMD_VFN(vf)); | 3258 | FW_PARAMS_CMD_VFN(vf)); |
3258 | c.retval_len16 = cpu_to_be32(FW_LEN16(c)); | 3259 | c.retval_len16 = cpu_to_be32(FW_LEN16(c)); |
@@ -3289,8 +3290,8 @@ int t4_set_params(struct adapter *adap, unsigned int mbox, unsigned int pf, | |||
3289 | return -EINVAL; | 3290 | return -EINVAL; |
3290 | 3291 | ||
3291 | memset(&c, 0, sizeof(c)); | 3292 | memset(&c, 0, sizeof(c)); |
3292 | c.op_to_vfn = htonl(FW_CMD_OP(FW_PARAMS_CMD) | FW_CMD_REQUEST | | 3293 | c.op_to_vfn = htonl(FW_CMD_OP_V(FW_PARAMS_CMD) | FW_CMD_REQUEST_F | |
3293 | FW_CMD_WRITE | FW_PARAMS_CMD_PFN(pf) | | 3294 | FW_CMD_WRITE_F | FW_PARAMS_CMD_PFN(pf) | |
3294 | FW_PARAMS_CMD_VFN(vf)); | 3295 | FW_PARAMS_CMD_VFN(vf)); |
3295 | c.retval_len16 = htonl(FW_LEN16(c)); | 3296 | c.retval_len16 = htonl(FW_LEN16(c)); |
3296 | while (nparams--) { | 3297 | while (nparams--) { |
@@ -3331,8 +3332,8 @@ int t4_cfg_pfvf(struct adapter *adap, unsigned int mbox, unsigned int pf, | |||
3331 | struct fw_pfvf_cmd c; | 3332 | struct fw_pfvf_cmd c; |
3332 | 3333 | ||
3333 | memset(&c, 0, sizeof(c)); | 3334 | memset(&c, 0, sizeof(c)); |
3334 | c.op_to_vfn = htonl(FW_CMD_OP(FW_PFVF_CMD) | FW_CMD_REQUEST | | 3335 | c.op_to_vfn = htonl(FW_CMD_OP_V(FW_PFVF_CMD) | FW_CMD_REQUEST_F | |
3335 | FW_CMD_WRITE | FW_PFVF_CMD_PFN(pf) | | 3336 | FW_CMD_WRITE_F | FW_PFVF_CMD_PFN(pf) | |
3336 | FW_PFVF_CMD_VFN(vf)); | 3337 | FW_PFVF_CMD_VFN(vf)); |
3337 | c.retval_len16 = htonl(FW_LEN16(c)); | 3338 | c.retval_len16 = htonl(FW_LEN16(c)); |
3338 | c.niqflint_niq = htonl(FW_PFVF_CMD_NIQFLINT(rxqi) | | 3339 | c.niqflint_niq = htonl(FW_PFVF_CMD_NIQFLINT(rxqi) | |
@@ -3373,8 +3374,8 @@ int t4_alloc_vi(struct adapter *adap, unsigned int mbox, unsigned int port, | |||
3373 | struct fw_vi_cmd c; | 3374 | struct fw_vi_cmd c; |
3374 | 3375 | ||
3375 | memset(&c, 0, sizeof(c)); | 3376 | memset(&c, 0, sizeof(c)); |
3376 | c.op_to_vfn = htonl(FW_CMD_OP(FW_VI_CMD) | FW_CMD_REQUEST | | 3377 | c.op_to_vfn = htonl(FW_CMD_OP_V(FW_VI_CMD) | FW_CMD_REQUEST_F | |
3377 | FW_CMD_WRITE | FW_CMD_EXEC | | 3378 | FW_CMD_WRITE_F | FW_CMD_EXEC_F | |
3378 | FW_VI_CMD_PFN(pf) | FW_VI_CMD_VFN(vf)); | 3379 | FW_VI_CMD_PFN(pf) | FW_VI_CMD_VFN(vf)); |
3379 | c.alloc_to_len16 = htonl(FW_VI_CMD_ALLOC | FW_LEN16(c)); | 3380 | c.alloc_to_len16 = htonl(FW_VI_CMD_ALLOC | FW_LEN16(c)); |
3380 | c.portid_pkd = FW_VI_CMD_PORTID(port); | 3381 | c.portid_pkd = FW_VI_CMD_PORTID(port); |
@@ -3435,8 +3436,8 @@ int t4_set_rxmode(struct adapter *adap, unsigned int mbox, unsigned int viid, | |||
3435 | vlanex = FW_VI_RXMODE_CMD_VLANEXEN_MASK; | 3436 | vlanex = FW_VI_RXMODE_CMD_VLANEXEN_MASK; |
3436 | 3437 | ||
3437 | memset(&c, 0, sizeof(c)); | 3438 | memset(&c, 0, sizeof(c)); |
3438 | c.op_to_viid = htonl(FW_CMD_OP(FW_VI_RXMODE_CMD) | FW_CMD_REQUEST | | 3439 | c.op_to_viid = htonl(FW_CMD_OP_V(FW_VI_RXMODE_CMD) | FW_CMD_REQUEST_F | |
3439 | FW_CMD_WRITE | FW_VI_RXMODE_CMD_VIID(viid)); | 3440 | FW_CMD_WRITE_F | FW_VI_RXMODE_CMD_VIID(viid)); |
3440 | c.retval_len16 = htonl(FW_LEN16(c)); | 3441 | c.retval_len16 = htonl(FW_LEN16(c)); |
3441 | c.mtu_to_vlanexen = htonl(FW_VI_RXMODE_CMD_MTU(mtu) | | 3442 | c.mtu_to_vlanexen = htonl(FW_VI_RXMODE_CMD_MTU(mtu) | |
3442 | FW_VI_RXMODE_CMD_PROMISCEN(promisc) | | 3443 | FW_VI_RXMODE_CMD_PROMISCEN(promisc) | |
@@ -3483,11 +3484,11 @@ int t4_alloc_mac_filt(struct adapter *adap, unsigned int mbox, | |||
3483 | return -EINVAL; | 3484 | return -EINVAL; |
3484 | 3485 | ||
3485 | memset(&c, 0, sizeof(c)); | 3486 | memset(&c, 0, sizeof(c)); |
3486 | c.op_to_viid = htonl(FW_CMD_OP(FW_VI_MAC_CMD) | FW_CMD_REQUEST | | 3487 | c.op_to_viid = htonl(FW_CMD_OP_V(FW_VI_MAC_CMD) | FW_CMD_REQUEST_F | |
3487 | FW_CMD_WRITE | (free ? FW_CMD_EXEC : 0) | | 3488 | FW_CMD_WRITE_F | (free ? FW_CMD_EXEC_F : 0) | |
3488 | FW_VI_MAC_CMD_VIID(viid)); | 3489 | FW_VI_MAC_CMD_VIID(viid)); |
3489 | c.freemacs_to_len16 = htonl(FW_VI_MAC_CMD_FREEMACS(free) | | 3490 | c.freemacs_to_len16 = htonl(FW_VI_MAC_CMD_FREEMACS(free) | |
3490 | FW_CMD_LEN16((naddr + 2) / 2)); | 3491 | FW_CMD_LEN16_V((naddr + 2) / 2)); |
3491 | 3492 | ||
3492 | for (i = 0, p = c.u.exact; i < naddr; i++, p++) { | 3493 | for (i = 0, p = c.u.exact; i < naddr; i++, p++) { |
3493 | p->valid_to_idx = htons(FW_VI_MAC_CMD_VALID | | 3494 | p->valid_to_idx = htons(FW_VI_MAC_CMD_VALID | |
@@ -3546,9 +3547,9 @@ int t4_change_mac(struct adapter *adap, unsigned int mbox, unsigned int viid, | |||
3546 | mode = add_smt ? FW_VI_MAC_SMT_AND_MPSTCAM : FW_VI_MAC_MPS_TCAM_ENTRY; | 3547 | mode = add_smt ? FW_VI_MAC_SMT_AND_MPSTCAM : FW_VI_MAC_MPS_TCAM_ENTRY; |
3547 | 3548 | ||
3548 | memset(&c, 0, sizeof(c)); | 3549 | memset(&c, 0, sizeof(c)); |
3549 | c.op_to_viid = htonl(FW_CMD_OP(FW_VI_MAC_CMD) | FW_CMD_REQUEST | | 3550 | c.op_to_viid = htonl(FW_CMD_OP_V(FW_VI_MAC_CMD) | FW_CMD_REQUEST_F | |
3550 | FW_CMD_WRITE | FW_VI_MAC_CMD_VIID(viid)); | 3551 | FW_CMD_WRITE_F | FW_VI_MAC_CMD_VIID(viid)); |
3551 | c.freemacs_to_len16 = htonl(FW_CMD_LEN16(1)); | 3552 | c.freemacs_to_len16 = htonl(FW_CMD_LEN16_V(1)); |
3552 | p->valid_to_idx = htons(FW_VI_MAC_CMD_VALID | | 3553 | p->valid_to_idx = htons(FW_VI_MAC_CMD_VALID | |
3553 | FW_VI_MAC_CMD_SMAC_RESULT(mode) | | 3554 | FW_VI_MAC_CMD_SMAC_RESULT(mode) | |
3554 | FW_VI_MAC_CMD_IDX(idx)); | 3555 | FW_VI_MAC_CMD_IDX(idx)); |
@@ -3580,11 +3581,11 @@ int t4_set_addr_hash(struct adapter *adap, unsigned int mbox, unsigned int viid, | |||
3580 | struct fw_vi_mac_cmd c; | 3581 | struct fw_vi_mac_cmd c; |
3581 | 3582 | ||
3582 | memset(&c, 0, sizeof(c)); | 3583 | memset(&c, 0, sizeof(c)); |
3583 | c.op_to_viid = htonl(FW_CMD_OP(FW_VI_MAC_CMD) | FW_CMD_REQUEST | | 3584 | c.op_to_viid = htonl(FW_CMD_OP_V(FW_VI_MAC_CMD) | FW_CMD_REQUEST_F | |
3584 | FW_CMD_WRITE | FW_VI_ENABLE_CMD_VIID(viid)); | 3585 | FW_CMD_WRITE_F | FW_VI_ENABLE_CMD_VIID(viid)); |
3585 | c.freemacs_to_len16 = htonl(FW_VI_MAC_CMD_HASHVECEN | | 3586 | c.freemacs_to_len16 = htonl(FW_VI_MAC_CMD_HASHVECEN | |
3586 | FW_VI_MAC_CMD_HASHUNIEN(ucast) | | 3587 | FW_VI_MAC_CMD_HASHUNIEN(ucast) | |
3587 | FW_CMD_LEN16(1)); | 3588 | FW_CMD_LEN16_V(1)); |
3588 | c.u.hash.hashvec = cpu_to_be64(vec); | 3589 | c.u.hash.hashvec = cpu_to_be64(vec); |
3589 | return t4_wr_mbox_meat(adap, mbox, &c, sizeof(c), NULL, sleep_ok); | 3590 | return t4_wr_mbox_meat(adap, mbox, &c, sizeof(c), NULL, sleep_ok); |
3590 | } | 3591 | } |
@@ -3607,8 +3608,8 @@ int t4_enable_vi_params(struct adapter *adap, unsigned int mbox, | |||
3607 | struct fw_vi_enable_cmd c; | 3608 | struct fw_vi_enable_cmd c; |
3608 | 3609 | ||
3609 | memset(&c, 0, sizeof(c)); | 3610 | memset(&c, 0, sizeof(c)); |
3610 | c.op_to_viid = htonl(FW_CMD_OP(FW_VI_ENABLE_CMD) | FW_CMD_REQUEST | | 3611 | c.op_to_viid = htonl(FW_CMD_OP_V(FW_VI_ENABLE_CMD) | FW_CMD_REQUEST_F | |
3611 | FW_CMD_EXEC | FW_VI_ENABLE_CMD_VIID(viid)); | 3612 | FW_CMD_EXEC_F | FW_VI_ENABLE_CMD_VIID(viid)); |
3612 | 3613 | ||
3613 | c.ien_to_len16 = htonl(FW_VI_ENABLE_CMD_IEN(rx_en) | | 3614 | c.ien_to_len16 = htonl(FW_VI_ENABLE_CMD_IEN(rx_en) | |
3614 | FW_VI_ENABLE_CMD_EEN(tx_en) | FW_LEN16(c) | | 3615 | FW_VI_ENABLE_CMD_EEN(tx_en) | FW_LEN16(c) | |
@@ -3647,8 +3648,8 @@ int t4_identify_port(struct adapter *adap, unsigned int mbox, unsigned int viid, | |||
3647 | struct fw_vi_enable_cmd c; | 3648 | struct fw_vi_enable_cmd c; |
3648 | 3649 | ||
3649 | memset(&c, 0, sizeof(c)); | 3650 | memset(&c, 0, sizeof(c)); |
3650 | c.op_to_viid = htonl(FW_CMD_OP(FW_VI_ENABLE_CMD) | FW_CMD_REQUEST | | 3651 | c.op_to_viid = htonl(FW_CMD_OP_V(FW_VI_ENABLE_CMD) | FW_CMD_REQUEST_F | |
3651 | FW_CMD_EXEC | FW_VI_ENABLE_CMD_VIID(viid)); | 3652 | FW_CMD_EXEC_F | FW_VI_ENABLE_CMD_VIID(viid)); |
3652 | c.ien_to_len16 = htonl(FW_VI_ENABLE_CMD_LED | FW_LEN16(c)); | 3653 | c.ien_to_len16 = htonl(FW_VI_ENABLE_CMD_LED | FW_LEN16(c)); |
3653 | c.blinkdur = htons(nblinks); | 3654 | c.blinkdur = htons(nblinks); |
3654 | return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL); | 3655 | return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL); |
@@ -3674,8 +3675,8 @@ int t4_iq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, | |||
3674 | struct fw_iq_cmd c; | 3675 | struct fw_iq_cmd c; |
3675 | 3676 | ||
3676 | memset(&c, 0, sizeof(c)); | 3677 | memset(&c, 0, sizeof(c)); |
3677 | c.op_to_vfn = htonl(FW_CMD_OP(FW_IQ_CMD) | FW_CMD_REQUEST | | 3678 | c.op_to_vfn = htonl(FW_CMD_OP_V(FW_IQ_CMD) | FW_CMD_REQUEST_F | |
3678 | FW_CMD_EXEC | FW_IQ_CMD_PFN(pf) | | 3679 | FW_CMD_EXEC_F | FW_IQ_CMD_PFN(pf) | |
3679 | FW_IQ_CMD_VFN(vf)); | 3680 | FW_IQ_CMD_VFN(vf)); |
3680 | c.alloc_to_len16 = htonl(FW_IQ_CMD_FREE | FW_LEN16(c)); | 3681 | c.alloc_to_len16 = htonl(FW_IQ_CMD_FREE | FW_LEN16(c)); |
3681 | c.type_to_iqandstindex = htonl(FW_IQ_CMD_TYPE(iqtype)); | 3682 | c.type_to_iqandstindex = htonl(FW_IQ_CMD_TYPE(iqtype)); |
@@ -3701,8 +3702,8 @@ int t4_eth_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, | |||
3701 | struct fw_eq_eth_cmd c; | 3702 | struct fw_eq_eth_cmd c; |
3702 | 3703 | ||
3703 | memset(&c, 0, sizeof(c)); | 3704 | memset(&c, 0, sizeof(c)); |
3704 | c.op_to_vfn = htonl(FW_CMD_OP(FW_EQ_ETH_CMD) | FW_CMD_REQUEST | | 3705 | c.op_to_vfn = htonl(FW_CMD_OP_V(FW_EQ_ETH_CMD) | FW_CMD_REQUEST_F | |
3705 | FW_CMD_EXEC | FW_EQ_ETH_CMD_PFN(pf) | | 3706 | FW_CMD_EXEC_F | FW_EQ_ETH_CMD_PFN(pf) | |
3706 | FW_EQ_ETH_CMD_VFN(vf)); | 3707 | FW_EQ_ETH_CMD_VFN(vf)); |
3707 | c.alloc_to_len16 = htonl(FW_EQ_ETH_CMD_FREE | FW_LEN16(c)); | 3708 | c.alloc_to_len16 = htonl(FW_EQ_ETH_CMD_FREE | FW_LEN16(c)); |
3708 | c.eqid_pkd = htonl(FW_EQ_ETH_CMD_EQID(eqid)); | 3709 | c.eqid_pkd = htonl(FW_EQ_ETH_CMD_EQID(eqid)); |
@@ -3725,8 +3726,8 @@ int t4_ctrl_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, | |||
3725 | struct fw_eq_ctrl_cmd c; | 3726 | struct fw_eq_ctrl_cmd c; |
3726 | 3727 | ||
3727 | memset(&c, 0, sizeof(c)); | 3728 | memset(&c, 0, sizeof(c)); |
3728 | c.op_to_vfn = htonl(FW_CMD_OP(FW_EQ_CTRL_CMD) | FW_CMD_REQUEST | | 3729 | c.op_to_vfn = htonl(FW_CMD_OP_V(FW_EQ_CTRL_CMD) | FW_CMD_REQUEST_F | |
3729 | FW_CMD_EXEC | FW_EQ_CTRL_CMD_PFN(pf) | | 3730 | FW_CMD_EXEC_F | FW_EQ_CTRL_CMD_PFN(pf) | |
3730 | FW_EQ_CTRL_CMD_VFN(vf)); | 3731 | FW_EQ_CTRL_CMD_VFN(vf)); |
3731 | c.alloc_to_len16 = htonl(FW_EQ_CTRL_CMD_FREE | FW_LEN16(c)); | 3732 | c.alloc_to_len16 = htonl(FW_EQ_CTRL_CMD_FREE | FW_LEN16(c)); |
3732 | c.cmpliqid_eqid = htonl(FW_EQ_CTRL_CMD_EQID(eqid)); | 3733 | c.cmpliqid_eqid = htonl(FW_EQ_CTRL_CMD_EQID(eqid)); |
@@ -3749,8 +3750,8 @@ int t4_ofld_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, | |||
3749 | struct fw_eq_ofld_cmd c; | 3750 | struct fw_eq_ofld_cmd c; |
3750 | 3751 | ||
3751 | memset(&c, 0, sizeof(c)); | 3752 | memset(&c, 0, sizeof(c)); |
3752 | c.op_to_vfn = htonl(FW_CMD_OP(FW_EQ_OFLD_CMD) | FW_CMD_REQUEST | | 3753 | c.op_to_vfn = htonl(FW_CMD_OP_V(FW_EQ_OFLD_CMD) | FW_CMD_REQUEST_F | |
3753 | FW_CMD_EXEC | FW_EQ_OFLD_CMD_PFN(pf) | | 3754 | FW_CMD_EXEC_F | FW_EQ_OFLD_CMD_PFN(pf) | |
3754 | FW_EQ_OFLD_CMD_VFN(vf)); | 3755 | FW_EQ_OFLD_CMD_VFN(vf)); |
3755 | c.alloc_to_len16 = htonl(FW_EQ_OFLD_CMD_FREE | FW_LEN16(c)); | 3756 | c.alloc_to_len16 = htonl(FW_EQ_OFLD_CMD_FREE | FW_LEN16(c)); |
3756 | c.eqid_pkd = htonl(FW_EQ_OFLD_CMD_EQID(eqid)); | 3757 | c.eqid_pkd = htonl(FW_EQ_OFLD_CMD_EQID(eqid)); |
@@ -4082,8 +4083,8 @@ int t4_port_init(struct adapter *adap, int mbox, int pf, int vf) | |||
4082 | while ((adap->params.portvec & (1 << j)) == 0) | 4083 | while ((adap->params.portvec & (1 << j)) == 0) |
4083 | j++; | 4084 | j++; |
4084 | 4085 | ||
4085 | c.op_to_portid = htonl(FW_CMD_OP(FW_PORT_CMD) | | 4086 | c.op_to_portid = htonl(FW_CMD_OP_V(FW_PORT_CMD) | |
4086 | FW_CMD_REQUEST | FW_CMD_READ | | 4087 | FW_CMD_REQUEST_F | FW_CMD_READ_F | |
4087 | FW_PORT_CMD_PORTID(j)); | 4088 | FW_PORT_CMD_PORTID(j)); |
4088 | c.action_to_len16 = htonl( | 4089 | c.action_to_len16 = htonl( |
4089 | FW_PORT_CMD_ACTION(FW_PORT_ACTION_GET_PORT_INFO) | | 4090 | FW_PORT_CMD_ACTION(FW_PORT_ACTION_GET_PORT_INFO) | |
@@ -4109,8 +4110,8 @@ int t4_port_init(struct adapter *adap, int mbox, int pf, int vf) | |||
4109 | p->port_type = FW_PORT_CMD_PTYPE_GET(ret); | 4110 | p->port_type = FW_PORT_CMD_PTYPE_GET(ret); |
4110 | p->mod_type = FW_PORT_MOD_TYPE_NA; | 4111 | p->mod_type = FW_PORT_MOD_TYPE_NA; |
4111 | 4112 | ||
4112 | rvc.op_to_viid = htonl(FW_CMD_OP(FW_RSS_VI_CONFIG_CMD) | | 4113 | rvc.op_to_viid = htonl(FW_CMD_OP_V(FW_RSS_VI_CONFIG_CMD) | |
4113 | FW_CMD_REQUEST | FW_CMD_READ | | 4114 | FW_CMD_REQUEST_F | FW_CMD_READ_F | |
4114 | FW_RSS_VI_CONFIG_CMD_VIID(p->viid)); | 4115 | FW_RSS_VI_CONFIG_CMD_VIID(p->viid)); |
4115 | rvc.retval_len16 = htonl(FW_LEN16(rvc)); | 4116 | rvc.retval_len16 = htonl(FW_LEN16(rvc)); |
4116 | ret = t4_wr_mbox(adap, mbox, &rvc, sizeof(rvc), &rvc); | 4117 | ret = t4_wr_mbox(adap, mbox, &rvc, sizeof(rvc), &rvc); |
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h index 3409756a85b9..7cca67fde4f4 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h +++ b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h | |||
@@ -109,18 +109,49 @@ struct fw_wr_hdr { | |||
109 | __be32 lo; | 109 | __be32 lo; |
110 | }; | 110 | }; |
111 | 111 | ||
112 | #define FW_WR_OP(x) ((x) << 24) | 112 | /* work request opcode (hi) */ |
113 | #define FW_WR_OP_GET(x) (((x) >> 24) & 0xff) | 113 | #define FW_WR_OP_S 24 |
114 | #define FW_WR_ATOMIC(x) ((x) << 23) | 114 | #define FW_WR_OP_M 0xff |
115 | #define FW_WR_FLUSH(x) ((x) << 22) | 115 | #define FW_WR_OP_V(x) ((x) << FW_WR_OP_S) |
116 | #define FW_WR_COMPL(x) ((x) << 21) | 116 | #define FW_WR_OP_G(x) (((x) >> FW_WR_OP_S) & FW_WR_OP_M) |
117 | #define FW_WR_IMMDLEN_MASK 0xff | 117 | |
118 | #define FW_WR_IMMDLEN(x) ((x) << 0) | 118 | /* atomic flag (hi) - firmware encapsulates CPLs in CPL_BARRIER */ |
119 | 119 | #define FW_WR_ATOMIC_S 23 | |
120 | #define FW_WR_EQUIQ (1U << 31) | 120 | #define FW_WR_ATOMIC_V(x) ((x) << FW_WR_ATOMIC_S) |
121 | #define FW_WR_EQUEQ (1U << 30) | 121 | |
122 | #define FW_WR_FLOWID(x) ((x) << 8) | 122 | /* flush flag (hi) - firmware flushes flushable work request buffered |
123 | #define FW_WR_LEN16(x) ((x) << 0) | 123 | * in the flow context. |
124 | */ | ||
125 | #define FW_WR_FLUSH_S 22 | ||
126 | #define FW_WR_FLUSH_V(x) ((x) << FW_WR_FLUSH_S) | ||
127 | |||
128 | /* completion flag (hi) - firmware generates a cpl_fw6_ack */ | ||
129 | #define FW_WR_COMPL_S 21 | ||
130 | #define FW_WR_COMPL_V(x) ((x) << FW_WR_COMPL_S) | ||
131 | #define FW_WR_COMPL_F FW_WR_COMPL_V(1U) | ||
132 | |||
133 | /* work request immediate data length (hi) */ | ||
134 | #define FW_WR_IMMDLEN_S 0 | ||
135 | #define FW_WR_IMMDLEN_M 0xff | ||
136 | #define FW_WR_IMMDLEN_V(x) ((x) << FW_WR_IMMDLEN_S) | ||
137 | |||
138 | /* egress queue status update to associated ingress queue entry (lo) */ | ||
139 | #define FW_WR_EQUIQ_S 31 | ||
140 | #define FW_WR_EQUIQ_V(x) ((x) << FW_WR_EQUIQ_S) | ||
141 | #define FW_WR_EQUIQ_F FW_WR_EQUIQ_V(1U) | ||
142 | |||
143 | /* egress queue status update to egress queue status entry (lo) */ | ||
144 | #define FW_WR_EQUEQ_S 30 | ||
145 | #define FW_WR_EQUEQ_V(x) ((x) << FW_WR_EQUEQ_S) | ||
146 | #define FW_WR_EQUEQ_F FW_WR_EQUEQ_V(1U) | ||
147 | |||
148 | /* flow context identifier (lo) */ | ||
149 | #define FW_WR_FLOWID_S 8 | ||
150 | #define FW_WR_FLOWID_V(x) ((x) << FW_WR_FLOWID_S) | ||
151 | |||
152 | /* length in units of 16-bytes (lo) */ | ||
153 | #define FW_WR_LEN16_S 0 | ||
154 | #define FW_WR_LEN16_V(x) ((x) << FW_WR_LEN16_S) | ||
124 | 155 | ||
125 | #define HW_TPL_FR_MT_PR_IV_P_FC 0X32B | 156 | #define HW_TPL_FR_MT_PR_IV_P_FC 0X32B |
126 | #define HW_TPL_FR_MT_PR_OV_P_FC 0X327 | 157 | #define HW_TPL_FR_MT_PR_OV_P_FC 0X327 |
@@ -539,26 +570,47 @@ struct fw_flowc_mnemval { | |||
539 | 570 | ||
540 | struct fw_flowc_wr { | 571 | struct fw_flowc_wr { |
541 | __be32 op_to_nparams; | 572 | __be32 op_to_nparams; |
542 | #define FW_FLOWC_WR_NPARAMS(x) ((x) << 0) | ||
543 | __be32 flowid_len16; | 573 | __be32 flowid_len16; |
544 | struct fw_flowc_mnemval mnemval[0]; | 574 | struct fw_flowc_mnemval mnemval[0]; |
545 | }; | 575 | }; |
546 | 576 | ||
577 | #define FW_FLOWC_WR_NPARAMS_S 0 | ||
578 | #define FW_FLOWC_WR_NPARAMS_V(x) ((x) << FW_FLOWC_WR_NPARAMS_S) | ||
579 | |||
547 | struct fw_ofld_tx_data_wr { | 580 | struct fw_ofld_tx_data_wr { |
548 | __be32 op_to_immdlen; | 581 | __be32 op_to_immdlen; |
549 | __be32 flowid_len16; | 582 | __be32 flowid_len16; |
550 | __be32 plen; | 583 | __be32 plen; |
551 | __be32 tunnel_to_proxy; | 584 | __be32 tunnel_to_proxy; |
552 | #define FW_OFLD_TX_DATA_WR_TUNNEL(x) ((x) << 19) | ||
553 | #define FW_OFLD_TX_DATA_WR_SAVE(x) ((x) << 18) | ||
554 | #define FW_OFLD_TX_DATA_WR_FLUSH(x) ((x) << 17) | ||
555 | #define FW_OFLD_TX_DATA_WR_URGENT(x) ((x) << 16) | ||
556 | #define FW_OFLD_TX_DATA_WR_MORE(x) ((x) << 15) | ||
557 | #define FW_OFLD_TX_DATA_WR_SHOVE(x) ((x) << 14) | ||
558 | #define FW_OFLD_TX_DATA_WR_ULPMODE(x) ((x) << 10) | ||
559 | #define FW_OFLD_TX_DATA_WR_ULPSUBMODE(x) ((x) << 6) | ||
560 | }; | 585 | }; |
561 | 586 | ||
587 | #define FW_OFLD_TX_DATA_WR_TUNNEL_S 19 | ||
588 | #define FW_OFLD_TX_DATA_WR_TUNNEL_V(x) ((x) << FW_OFLD_TX_DATA_WR_TUNNEL_S) | ||
589 | |||
590 | #define FW_OFLD_TX_DATA_WR_SAVE_S 18 | ||
591 | #define FW_OFLD_TX_DATA_WR_SAVE_V(x) ((x) << FW_OFLD_TX_DATA_WR_SAVE_S) | ||
592 | |||
593 | #define FW_OFLD_TX_DATA_WR_FLUSH_S 17 | ||
594 | #define FW_OFLD_TX_DATA_WR_FLUSH_V(x) ((x) << FW_OFLD_TX_DATA_WR_FLUSH_S) | ||
595 | #define FW_OFLD_TX_DATA_WR_FLUSH_F FW_OFLD_TX_DATA_WR_FLUSH_V(1U) | ||
596 | |||
597 | #define FW_OFLD_TX_DATA_WR_URGENT_S 16 | ||
598 | #define FW_OFLD_TX_DATA_WR_URGENT_V(x) ((x) << FW_OFLD_TX_DATA_WR_URGENT_S) | ||
599 | |||
600 | #define FW_OFLD_TX_DATA_WR_MORE_S 15 | ||
601 | #define FW_OFLD_TX_DATA_WR_MORE_V(x) ((x) << FW_OFLD_TX_DATA_WR_MORE_S) | ||
602 | |||
603 | #define FW_OFLD_TX_DATA_WR_SHOVE_S 14 | ||
604 | #define FW_OFLD_TX_DATA_WR_SHOVE_V(x) ((x) << FW_OFLD_TX_DATA_WR_SHOVE_S) | ||
605 | #define FW_OFLD_TX_DATA_WR_SHOVE_F FW_OFLD_TX_DATA_WR_SHOVE_V(1U) | ||
606 | |||
607 | #define FW_OFLD_TX_DATA_WR_ULPMODE_S 10 | ||
608 | #define FW_OFLD_TX_DATA_WR_ULPMODE_V(x) ((x) << FW_OFLD_TX_DATA_WR_ULPMODE_S) | ||
609 | |||
610 | #define FW_OFLD_TX_DATA_WR_ULPSUBMODE_S 6 | ||
611 | #define FW_OFLD_TX_DATA_WR_ULPSUBMODE_V(x) \ | ||
612 | ((x) << FW_OFLD_TX_DATA_WR_ULPSUBMODE_S) | ||
613 | |||
562 | struct fw_cmd_wr { | 614 | struct fw_cmd_wr { |
563 | __be32 op_dma; | 615 | __be32 op_dma; |
564 | #define FW_CMD_WR_DMA (1U << 17) | 616 | #define FW_CMD_WR_DMA (1U << 17) |
@@ -566,6 +618,9 @@ struct fw_cmd_wr { | |||
566 | __be64 cookie_daddr; | 618 | __be64 cookie_daddr; |
567 | }; | 619 | }; |
568 | 620 | ||
621 | #define FW_CMD_WR_DMA_S 17 | ||
622 | #define FW_CMD_WR_DMA_V(x) ((x) << FW_CMD_WR_DMA_S) | ||
623 | |||
569 | struct fw_eth_tx_pkt_vm_wr { | 624 | struct fw_eth_tx_pkt_vm_wr { |
570 | __be32 op_immdlen; | 625 | __be32 op_immdlen; |
571 | __be32 equiq_to_len16; | 626 | __be32 equiq_to_len16; |
@@ -641,18 +696,39 @@ struct fw_cmd_hdr { | |||
641 | __be32 lo; | 696 | __be32 lo; |
642 | }; | 697 | }; |
643 | 698 | ||
644 | #define FW_CMD_OP(x) ((x) << 24) | 699 | #define FW_CMD_OP_S 24 |
645 | #define FW_CMD_OP_GET(x) (((x) >> 24) & 0xff) | 700 | #define FW_CMD_OP_M 0xff |
646 | #define FW_CMD_REQUEST (1U << 23) | 701 | #define FW_CMD_OP_V(x) ((x) << FW_CMD_OP_S) |
647 | #define FW_CMD_REQUEST_GET(x) (((x) >> 23) & 0x1) | 702 | #define FW_CMD_OP_G(x) (((x) >> FW_CMD_OP_S) & FW_CMD_OP_M) |
648 | #define FW_CMD_READ (1U << 22) | 703 | |
649 | #define FW_CMD_WRITE (1U << 21) | 704 | #define FW_CMD_REQUEST_S 23 |
650 | #define FW_CMD_EXEC (1U << 20) | 705 | #define FW_CMD_REQUEST_V(x) ((x) << FW_CMD_REQUEST_S) |
651 | #define FW_CMD_RAMASK(x) ((x) << 20) | 706 | #define FW_CMD_REQUEST_F FW_CMD_REQUEST_V(1U) |
652 | #define FW_CMD_RETVAL(x) ((x) << 8) | 707 | |
653 | #define FW_CMD_RETVAL_GET(x) (((x) >> 8) & 0xff) | 708 | #define FW_CMD_READ_S 22 |
654 | #define FW_CMD_LEN16(x) ((x) << 0) | 709 | #define FW_CMD_READ_V(x) ((x) << FW_CMD_READ_S) |
655 | #define FW_LEN16(fw_struct) FW_CMD_LEN16(sizeof(fw_struct) / 16) | 710 | #define FW_CMD_READ_F FW_CMD_READ_V(1U) |
711 | |||
712 | #define FW_CMD_WRITE_S 21 | ||
713 | #define FW_CMD_WRITE_V(x) ((x) << FW_CMD_WRITE_S) | ||
714 | #define FW_CMD_WRITE_F FW_CMD_WRITE_V(1U) | ||
715 | |||
716 | #define FW_CMD_EXEC_S 20 | ||
717 | #define FW_CMD_EXEC_V(x) ((x) << FW_CMD_EXEC_S) | ||
718 | #define FW_CMD_EXEC_F FW_CMD_EXEC_V(1U) | ||
719 | |||
720 | #define FW_CMD_RAMASK_S 20 | ||
721 | #define FW_CMD_RAMASK_V(x) ((x) << FW_CMD_RAMASK_S) | ||
722 | |||
723 | #define FW_CMD_RETVAL_S 8 | ||
724 | #define FW_CMD_RETVAL_M 0xff | ||
725 | #define FW_CMD_RETVAL_V(x) ((x) << FW_CMD_RETVAL_S) | ||
726 | #define FW_CMD_RETVAL_G(x) (((x) >> FW_CMD_RETVAL_S) & FW_CMD_RETVAL_M) | ||
727 | |||
728 | #define FW_CMD_LEN16_S 0 | ||
729 | #define FW_CMD_LEN16_V(x) ((x) << FW_CMD_LEN16_S) | ||
730 | |||
731 | #define FW_LEN16(fw_struct) FW_CMD_LEN16_V(sizeof(fw_struct) / 16) | ||
656 | 732 | ||
657 | enum fw_ldst_addrspc { | 733 | enum fw_ldst_addrspc { |
658 | FW_LDST_ADDRSPC_FIRMWARE = 0x0001, | 734 | FW_LDST_ADDRSPC_FIRMWARE = 0x0001, |
diff --git a/drivers/net/ethernet/chelsio/cxgb4vf/sge.c b/drivers/net/ethernet/chelsio/cxgb4vf/sge.c index 85036e6b42c4..0e8d5b72c9cc 100644 --- a/drivers/net/ethernet/chelsio/cxgb4vf/sge.c +++ b/drivers/net/ethernet/chelsio/cxgb4vf/sge.c | |||
@@ -132,7 +132,7 @@ enum { | |||
132 | * we can specify for immediate data in the firmware Ethernet TX | 132 | * we can specify for immediate data in the firmware Ethernet TX |
133 | * Work Request. | 133 | * Work Request. |
134 | */ | 134 | */ |
135 | MAX_IMM_TX_PKT_LEN = FW_WR_IMMDLEN_MASK, | 135 | MAX_IMM_TX_PKT_LEN = FW_WR_IMMDLEN_M, |
136 | 136 | ||
137 | /* | 137 | /* |
138 | * Max size of a WR sent through a control TX queue. | 138 | * Max size of a WR sent through a control TX queue. |
@@ -1149,7 +1149,7 @@ int t4vf_eth_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1149 | goto out_free; | 1149 | goto out_free; |
1150 | } | 1150 | } |
1151 | 1151 | ||
1152 | wr_mid = FW_WR_LEN16(DIV_ROUND_UP(flits, 2)); | 1152 | wr_mid = FW_WR_LEN16_V(DIV_ROUND_UP(flits, 2)); |
1153 | if (unlikely(credits < ETHTXQ_STOP_THRES)) { | 1153 | if (unlikely(credits < ETHTXQ_STOP_THRES)) { |
1154 | /* | 1154 | /* |
1155 | * After we're done injecting the Work Request for this | 1155 | * After we're done injecting the Work Request for this |
@@ -1161,7 +1161,7 @@ int t4vf_eth_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1161 | * has opened up. | 1161 | * has opened up. |
1162 | */ | 1162 | */ |
1163 | txq_stop(txq); | 1163 | txq_stop(txq); |
1164 | wr_mid |= FW_WR_EQUEQ | FW_WR_EQUIQ; | 1164 | wr_mid |= FW_WR_EQUEQ_F | FW_WR_EQUIQ_F; |
1165 | } | 1165 | } |
1166 | 1166 | ||
1167 | /* | 1167 | /* |
@@ -1191,9 +1191,9 @@ int t4vf_eth_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1191 | int eth_xtra_len = skb_network_offset(skb) - ETH_HLEN; | 1191 | int eth_xtra_len = skb_network_offset(skb) - ETH_HLEN; |
1192 | 1192 | ||
1193 | wr->op_immdlen = | 1193 | wr->op_immdlen = |
1194 | cpu_to_be32(FW_WR_OP(FW_ETH_TX_PKT_VM_WR) | | 1194 | cpu_to_be32(FW_WR_OP_V(FW_ETH_TX_PKT_VM_WR) | |
1195 | FW_WR_IMMDLEN(sizeof(*lso) + | 1195 | FW_WR_IMMDLEN_V(sizeof(*lso) + |
1196 | sizeof(*cpl))); | 1196 | sizeof(*cpl))); |
1197 | /* | 1197 | /* |
1198 | * Fill in the LSO CPL message. | 1198 | * Fill in the LSO CPL message. |
1199 | */ | 1199 | */ |
@@ -1228,8 +1228,8 @@ int t4vf_eth_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1228 | 1228 | ||
1229 | len = is_eth_imm(skb) ? skb->len + sizeof(*cpl) : sizeof(*cpl); | 1229 | len = is_eth_imm(skb) ? skb->len + sizeof(*cpl) : sizeof(*cpl); |
1230 | wr->op_immdlen = | 1230 | wr->op_immdlen = |
1231 | cpu_to_be32(FW_WR_OP(FW_ETH_TX_PKT_VM_WR) | | 1231 | cpu_to_be32(FW_WR_OP_V(FW_ETH_TX_PKT_VM_WR) | |
1232 | FW_WR_IMMDLEN(len)); | 1232 | FW_WR_IMMDLEN_V(len)); |
1233 | 1233 | ||
1234 | /* | 1234 | /* |
1235 | * Set up TX Packet CPL pointer, control word and perform | 1235 | * Set up TX Packet CPL pointer, control word and perform |
@@ -2084,10 +2084,10 @@ int t4vf_sge_alloc_rxq(struct adapter *adapter, struct sge_rspq *rspq, | |||
2084 | * into OS-independent common code ... | 2084 | * into OS-independent common code ... |
2085 | */ | 2085 | */ |
2086 | memset(&cmd, 0, sizeof(cmd)); | 2086 | memset(&cmd, 0, sizeof(cmd)); |
2087 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP(FW_IQ_CMD) | | 2087 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_IQ_CMD) | |
2088 | FW_CMD_REQUEST | | 2088 | FW_CMD_REQUEST_F | |
2089 | FW_CMD_WRITE | | 2089 | FW_CMD_WRITE_F | |
2090 | FW_CMD_EXEC); | 2090 | FW_CMD_EXEC_F); |
2091 | cmd.alloc_to_len16 = cpu_to_be32(FW_IQ_CMD_ALLOC | | 2091 | cmd.alloc_to_len16 = cpu_to_be32(FW_IQ_CMD_ALLOC | |
2092 | FW_IQ_CMD_IQSTART(1) | | 2092 | FW_IQ_CMD_IQSTART(1) | |
2093 | FW_LEN16(cmd)); | 2093 | FW_LEN16(cmd)); |
@@ -2246,10 +2246,10 @@ int t4vf_sge_alloc_eth_txq(struct adapter *adapter, struct sge_eth_txq *txq, | |||
2246 | * into the common code ... | 2246 | * into the common code ... |
2247 | */ | 2247 | */ |
2248 | memset(&cmd, 0, sizeof(cmd)); | 2248 | memset(&cmd, 0, sizeof(cmd)); |
2249 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP(FW_EQ_ETH_CMD) | | 2249 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_EQ_ETH_CMD) | |
2250 | FW_CMD_REQUEST | | 2250 | FW_CMD_REQUEST_F | |
2251 | FW_CMD_WRITE | | 2251 | FW_CMD_WRITE_F | |
2252 | FW_CMD_EXEC); | 2252 | FW_CMD_EXEC_F); |
2253 | cmd.alloc_to_len16 = cpu_to_be32(FW_EQ_ETH_CMD_ALLOC | | 2253 | cmd.alloc_to_len16 = cpu_to_be32(FW_EQ_ETH_CMD_ALLOC | |
2254 | FW_EQ_ETH_CMD_EQSTART | | 2254 | FW_EQ_ETH_CMD_EQSTART | |
2255 | FW_LEN16(cmd)); | 2255 | FW_LEN16(cmd)); |
diff --git a/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_common.h b/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_common.h index 95df61dcb4ce..2cfa4396b003 100644 --- a/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_common.h +++ b/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_common.h | |||
@@ -67,7 +67,7 @@ enum chip_type { | |||
67 | /* | 67 | /* |
68 | * The "len16" field of a Firmware Command Structure ... | 68 | * The "len16" field of a Firmware Command Structure ... |
69 | */ | 69 | */ |
70 | #define FW_LEN16(fw_struct) FW_CMD_LEN16(sizeof(fw_struct) / 16) | 70 | #define FW_LEN16(fw_struct) FW_CMD_LEN16_V(sizeof(fw_struct) / 16) |
71 | 71 | ||
72 | /* | 72 | /* |
73 | * Per-VF statistics. | 73 | * Per-VF statistics. |
diff --git a/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c b/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c index e984fdc48ba2..570b895ae06f 100644 --- a/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c +++ b/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c | |||
@@ -204,20 +204,20 @@ int t4vf_wr_mbox_core(struct adapter *adapter, const void *cmd, int size, | |||
204 | 204 | ||
205 | /* return value in low-order little-endian word */ | 205 | /* return value in low-order little-endian word */ |
206 | v = t4_read_reg(adapter, mbox_data); | 206 | v = t4_read_reg(adapter, mbox_data); |
207 | if (FW_CMD_RETVAL_GET(v)) | 207 | if (FW_CMD_RETVAL_G(v)) |
208 | dump_mbox(adapter, "FW Error", mbox_data); | 208 | dump_mbox(adapter, "FW Error", mbox_data); |
209 | 209 | ||
210 | if (rpl) { | 210 | if (rpl) { |
211 | /* request bit in high-order BE word */ | 211 | /* request bit in high-order BE word */ |
212 | WARN_ON((be32_to_cpu(*(const u32 *)cmd) | 212 | WARN_ON((be32_to_cpu(*(const u32 *)cmd) |
213 | & FW_CMD_REQUEST) == 0); | 213 | & FW_CMD_REQUEST_F) == 0); |
214 | get_mbox_rpl(adapter, rpl, size, mbox_data); | 214 | get_mbox_rpl(adapter, rpl, size, mbox_data); |
215 | WARN_ON((be32_to_cpu(*(u32 *)rpl) | 215 | WARN_ON((be32_to_cpu(*(u32 *)rpl) |
216 | & FW_CMD_REQUEST) != 0); | 216 | & FW_CMD_REQUEST_F) != 0); |
217 | } | 217 | } |
218 | t4_write_reg(adapter, mbox_ctl, | 218 | t4_write_reg(adapter, mbox_ctl, |
219 | MBOWNER(MBOX_OWNER_NONE)); | 219 | MBOWNER(MBOX_OWNER_NONE)); |
220 | return -FW_CMD_RETVAL_GET(v); | 220 | return -FW_CMD_RETVAL_G(v); |
221 | } | 221 | } |
222 | } | 222 | } |
223 | 223 | ||
@@ -287,9 +287,9 @@ int t4vf_port_init(struct adapter *adapter, int pidx) | |||
287 | * like MAC address, etc. | 287 | * like MAC address, etc. |
288 | */ | 288 | */ |
289 | memset(&vi_cmd, 0, sizeof(vi_cmd)); | 289 | memset(&vi_cmd, 0, sizeof(vi_cmd)); |
290 | vi_cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP(FW_VI_CMD) | | 290 | vi_cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) | |
291 | FW_CMD_REQUEST | | 291 | FW_CMD_REQUEST_F | |
292 | FW_CMD_READ); | 292 | FW_CMD_READ_F); |
293 | vi_cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(vi_cmd)); | 293 | vi_cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(vi_cmd)); |
294 | vi_cmd.type_viid = cpu_to_be16(FW_VI_CMD_VIID(pi->viid)); | 294 | vi_cmd.type_viid = cpu_to_be16(FW_VI_CMD_VIID(pi->viid)); |
295 | v = t4vf_wr_mbox(adapter, &vi_cmd, sizeof(vi_cmd), &vi_rpl); | 295 | v = t4vf_wr_mbox(adapter, &vi_cmd, sizeof(vi_cmd), &vi_rpl); |
@@ -308,9 +308,9 @@ int t4vf_port_init(struct adapter *adapter, int pidx) | |||
308 | return 0; | 308 | return 0; |
309 | 309 | ||
310 | memset(&port_cmd, 0, sizeof(port_cmd)); | 310 | memset(&port_cmd, 0, sizeof(port_cmd)); |
311 | port_cmd.op_to_portid = cpu_to_be32(FW_CMD_OP(FW_PORT_CMD) | | 311 | port_cmd.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PORT_CMD) | |
312 | FW_CMD_REQUEST | | 312 | FW_CMD_REQUEST_F | |
313 | FW_CMD_READ | | 313 | FW_CMD_READ_F | |
314 | FW_PORT_CMD_PORTID(pi->port_id)); | 314 | FW_PORT_CMD_PORTID(pi->port_id)); |
315 | port_cmd.action_to_len16 = | 315 | port_cmd.action_to_len16 = |
316 | cpu_to_be32(FW_PORT_CMD_ACTION(FW_PORT_ACTION_GET_PORT_INFO) | | 316 | cpu_to_be32(FW_PORT_CMD_ACTION(FW_PORT_ACTION_GET_PORT_INFO) | |
@@ -349,8 +349,8 @@ int t4vf_fw_reset(struct adapter *adapter) | |||
349 | struct fw_reset_cmd cmd; | 349 | struct fw_reset_cmd cmd; |
350 | 350 | ||
351 | memset(&cmd, 0, sizeof(cmd)); | 351 | memset(&cmd, 0, sizeof(cmd)); |
352 | cmd.op_to_write = cpu_to_be32(FW_CMD_OP(FW_RESET_CMD) | | 352 | cmd.op_to_write = cpu_to_be32(FW_CMD_OP_V(FW_RESET_CMD) | |
353 | FW_CMD_WRITE); | 353 | FW_CMD_WRITE_F); |
354 | cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); | 354 | cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); |
355 | return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); | 355 | return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); |
356 | } | 356 | } |
@@ -377,12 +377,12 @@ static int t4vf_query_params(struct adapter *adapter, unsigned int nparams, | |||
377 | return -EINVAL; | 377 | return -EINVAL; |
378 | 378 | ||
379 | memset(&cmd, 0, sizeof(cmd)); | 379 | memset(&cmd, 0, sizeof(cmd)); |
380 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP(FW_PARAMS_CMD) | | 380 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PARAMS_CMD) | |
381 | FW_CMD_REQUEST | | 381 | FW_CMD_REQUEST_F | |
382 | FW_CMD_READ); | 382 | FW_CMD_READ_F); |
383 | len16 = DIV_ROUND_UP(offsetof(struct fw_params_cmd, | 383 | len16 = DIV_ROUND_UP(offsetof(struct fw_params_cmd, |
384 | param[nparams].mnem), 16); | 384 | param[nparams].mnem), 16); |
385 | cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16(len16)); | 385 | cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); |
386 | for (i = 0, p = &cmd.param[0]; i < nparams; i++, p++) | 386 | for (i = 0, p = &cmd.param[0]; i < nparams; i++, p++) |
387 | p->mnem = htonl(*params++); | 387 | p->mnem = htonl(*params++); |
388 | 388 | ||
@@ -415,12 +415,12 @@ int t4vf_set_params(struct adapter *adapter, unsigned int nparams, | |||
415 | return -EINVAL; | 415 | return -EINVAL; |
416 | 416 | ||
417 | memset(&cmd, 0, sizeof(cmd)); | 417 | memset(&cmd, 0, sizeof(cmd)); |
418 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP(FW_PARAMS_CMD) | | 418 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PARAMS_CMD) | |
419 | FW_CMD_REQUEST | | 419 | FW_CMD_REQUEST_F | |
420 | FW_CMD_WRITE); | 420 | FW_CMD_WRITE_F); |
421 | len16 = DIV_ROUND_UP(offsetof(struct fw_params_cmd, | 421 | len16 = DIV_ROUND_UP(offsetof(struct fw_params_cmd, |
422 | param[nparams]), 16); | 422 | param[nparams]), 16); |
423 | cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16(len16)); | 423 | cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); |
424 | for (i = 0, p = &cmd.param[0]; i < nparams; i++, p++) { | 424 | for (i = 0, p = &cmd.param[0]; i < nparams; i++, p++) { |
425 | p->mnem = cpu_to_be32(*params++); | 425 | p->mnem = cpu_to_be32(*params++); |
426 | p->val = cpu_to_be32(*vals++); | 426 | p->val = cpu_to_be32(*vals++); |
@@ -545,9 +545,9 @@ int t4vf_get_rss_glb_config(struct adapter *adapter) | |||
545 | * our RSS configuration. | 545 | * our RSS configuration. |
546 | */ | 546 | */ |
547 | memset(&cmd, 0, sizeof(cmd)); | 547 | memset(&cmd, 0, sizeof(cmd)); |
548 | cmd.op_to_write = cpu_to_be32(FW_CMD_OP(FW_RSS_GLB_CONFIG_CMD) | | 548 | cmd.op_to_write = cpu_to_be32(FW_CMD_OP_V(FW_RSS_GLB_CONFIG_CMD) | |
549 | FW_CMD_REQUEST | | 549 | FW_CMD_REQUEST_F | |
550 | FW_CMD_READ); | 550 | FW_CMD_READ_F); |
551 | cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); | 551 | cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); |
552 | v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); | 552 | v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); |
553 | if (v) | 553 | if (v) |
@@ -621,9 +621,9 @@ int t4vf_get_vfres(struct adapter *adapter) | |||
621 | * with error on command failure. | 621 | * with error on command failure. |
622 | */ | 622 | */ |
623 | memset(&cmd, 0, sizeof(cmd)); | 623 | memset(&cmd, 0, sizeof(cmd)); |
624 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP(FW_PFVF_CMD) | | 624 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_PFVF_CMD) | |
625 | FW_CMD_REQUEST | | 625 | FW_CMD_REQUEST_F | |
626 | FW_CMD_READ); | 626 | FW_CMD_READ_F); |
627 | cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); | 627 | cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); |
628 | v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); | 628 | v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); |
629 | if (v) | 629 | if (v) |
@@ -669,9 +669,9 @@ int t4vf_read_rss_vi_config(struct adapter *adapter, unsigned int viid, | |||
669 | int v; | 669 | int v; |
670 | 670 | ||
671 | memset(&cmd, 0, sizeof(cmd)); | 671 | memset(&cmd, 0, sizeof(cmd)); |
672 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP(FW_RSS_VI_CONFIG_CMD) | | 672 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_VI_CONFIG_CMD) | |
673 | FW_CMD_REQUEST | | 673 | FW_CMD_REQUEST_F | |
674 | FW_CMD_READ | | 674 | FW_CMD_READ_F | |
675 | FW_RSS_VI_CONFIG_CMD_VIID(viid)); | 675 | FW_RSS_VI_CONFIG_CMD_VIID(viid)); |
676 | cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); | 676 | cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); |
677 | v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); | 677 | v = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); |
@@ -719,9 +719,9 @@ int t4vf_write_rss_vi_config(struct adapter *adapter, unsigned int viid, | |||
719 | struct fw_rss_vi_config_cmd cmd, rpl; | 719 | struct fw_rss_vi_config_cmd cmd, rpl; |
720 | 720 | ||
721 | memset(&cmd, 0, sizeof(cmd)); | 721 | memset(&cmd, 0, sizeof(cmd)); |
722 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP(FW_RSS_VI_CONFIG_CMD) | | 722 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_VI_CONFIG_CMD) | |
723 | FW_CMD_REQUEST | | 723 | FW_CMD_REQUEST_F | |
724 | FW_CMD_WRITE | | 724 | FW_CMD_WRITE_F | |
725 | FW_RSS_VI_CONFIG_CMD_VIID(viid)); | 725 | FW_RSS_VI_CONFIG_CMD_VIID(viid)); |
726 | cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); | 726 | cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); |
727 | switch (adapter->params.rss.mode) { | 727 | switch (adapter->params.rss.mode) { |
@@ -777,9 +777,9 @@ int t4vf_config_rss_range(struct adapter *adapter, unsigned int viid, | |||
777 | * Initialize firmware command template to write the RSS table. | 777 | * Initialize firmware command template to write the RSS table. |
778 | */ | 778 | */ |
779 | memset(&cmd, 0, sizeof(cmd)); | 779 | memset(&cmd, 0, sizeof(cmd)); |
780 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP(FW_RSS_IND_TBL_CMD) | | 780 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_RSS_IND_TBL_CMD) | |
781 | FW_CMD_REQUEST | | 781 | FW_CMD_REQUEST_F | |
782 | FW_CMD_WRITE | | 782 | FW_CMD_WRITE_F | |
783 | FW_RSS_IND_TBL_CMD_VIID(viid)); | 783 | FW_RSS_IND_TBL_CMD_VIID(viid)); |
784 | cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); | 784 | cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); |
785 | 785 | ||
@@ -866,10 +866,10 @@ int t4vf_alloc_vi(struct adapter *adapter, int port_id) | |||
866 | * VIID. | 866 | * VIID. |
867 | */ | 867 | */ |
868 | memset(&cmd, 0, sizeof(cmd)); | 868 | memset(&cmd, 0, sizeof(cmd)); |
869 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP(FW_VI_CMD) | | 869 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) | |
870 | FW_CMD_REQUEST | | 870 | FW_CMD_REQUEST_F | |
871 | FW_CMD_WRITE | | 871 | FW_CMD_WRITE_F | |
872 | FW_CMD_EXEC); | 872 | FW_CMD_EXEC_F); |
873 | cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(cmd) | | 873 | cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(cmd) | |
874 | FW_VI_CMD_ALLOC); | 874 | FW_VI_CMD_ALLOC); |
875 | cmd.portid_pkd = FW_VI_CMD_PORTID(port_id); | 875 | cmd.portid_pkd = FW_VI_CMD_PORTID(port_id); |
@@ -896,9 +896,9 @@ int t4vf_free_vi(struct adapter *adapter, int viid) | |||
896 | * Execute a VI command to free the Virtual Interface. | 896 | * Execute a VI command to free the Virtual Interface. |
897 | */ | 897 | */ |
898 | memset(&cmd, 0, sizeof(cmd)); | 898 | memset(&cmd, 0, sizeof(cmd)); |
899 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP(FW_VI_CMD) | | 899 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_VI_CMD) | |
900 | FW_CMD_REQUEST | | 900 | FW_CMD_REQUEST_F | |
901 | FW_CMD_EXEC); | 901 | FW_CMD_EXEC_F); |
902 | cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(cmd) | | 902 | cmd.alloc_to_len16 = cpu_to_be32(FW_LEN16(cmd) | |
903 | FW_VI_CMD_FREE); | 903 | FW_VI_CMD_FREE); |
904 | cmd.type_viid = cpu_to_be16(FW_VI_CMD_VIID(viid)); | 904 | cmd.type_viid = cpu_to_be16(FW_VI_CMD_VIID(viid)); |
@@ -920,9 +920,9 @@ int t4vf_enable_vi(struct adapter *adapter, unsigned int viid, | |||
920 | struct fw_vi_enable_cmd cmd; | 920 | struct fw_vi_enable_cmd cmd; |
921 | 921 | ||
922 | memset(&cmd, 0, sizeof(cmd)); | 922 | memset(&cmd, 0, sizeof(cmd)); |
923 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP(FW_VI_ENABLE_CMD) | | 923 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_ENABLE_CMD) | |
924 | FW_CMD_REQUEST | | 924 | FW_CMD_REQUEST_F | |
925 | FW_CMD_EXEC | | 925 | FW_CMD_EXEC_F | |
926 | FW_VI_ENABLE_CMD_VIID(viid)); | 926 | FW_VI_ENABLE_CMD_VIID(viid)); |
927 | cmd.ien_to_len16 = cpu_to_be32(FW_VI_ENABLE_CMD_IEN(rx_en) | | 927 | cmd.ien_to_len16 = cpu_to_be32(FW_VI_ENABLE_CMD_IEN(rx_en) | |
928 | FW_VI_ENABLE_CMD_EEN(tx_en) | | 928 | FW_VI_ENABLE_CMD_EEN(tx_en) | |
@@ -944,9 +944,9 @@ int t4vf_identify_port(struct adapter *adapter, unsigned int viid, | |||
944 | struct fw_vi_enable_cmd cmd; | 944 | struct fw_vi_enable_cmd cmd; |
945 | 945 | ||
946 | memset(&cmd, 0, sizeof(cmd)); | 946 | memset(&cmd, 0, sizeof(cmd)); |
947 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP(FW_VI_ENABLE_CMD) | | 947 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_ENABLE_CMD) | |
948 | FW_CMD_REQUEST | | 948 | FW_CMD_REQUEST_F | |
949 | FW_CMD_EXEC | | 949 | FW_CMD_EXEC_F | |
950 | FW_VI_ENABLE_CMD_VIID(viid)); | 950 | FW_VI_ENABLE_CMD_VIID(viid)); |
951 | cmd.ien_to_len16 = cpu_to_be32(FW_VI_ENABLE_CMD_LED | | 951 | cmd.ien_to_len16 = cpu_to_be32(FW_VI_ENABLE_CMD_LED | |
952 | FW_LEN16(cmd)); | 952 | FW_LEN16(cmd)); |
@@ -986,9 +986,9 @@ int t4vf_set_rxmode(struct adapter *adapter, unsigned int viid, | |||
986 | vlanex = FW_VI_RXMODE_CMD_VLANEXEN_MASK; | 986 | vlanex = FW_VI_RXMODE_CMD_VLANEXEN_MASK; |
987 | 987 | ||
988 | memset(&cmd, 0, sizeof(cmd)); | 988 | memset(&cmd, 0, sizeof(cmd)); |
989 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP(FW_VI_RXMODE_CMD) | | 989 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_RXMODE_CMD) | |
990 | FW_CMD_REQUEST | | 990 | FW_CMD_REQUEST_F | |
991 | FW_CMD_WRITE | | 991 | FW_CMD_WRITE_F | |
992 | FW_VI_RXMODE_CMD_VIID(viid)); | 992 | FW_VI_RXMODE_CMD_VIID(viid)); |
993 | cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); | 993 | cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); |
994 | cmd.mtu_to_vlanexen = | 994 | cmd.mtu_to_vlanexen = |
@@ -1046,14 +1046,14 @@ int t4vf_alloc_mac_filt(struct adapter *adapter, unsigned int viid, bool free, | |||
1046 | int i; | 1046 | int i; |
1047 | 1047 | ||
1048 | memset(&cmd, 0, sizeof(cmd)); | 1048 | memset(&cmd, 0, sizeof(cmd)); |
1049 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP(FW_VI_MAC_CMD) | | 1049 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | |
1050 | FW_CMD_REQUEST | | 1050 | FW_CMD_REQUEST_F | |
1051 | FW_CMD_WRITE | | 1051 | FW_CMD_WRITE_F | |
1052 | (free ? FW_CMD_EXEC : 0) | | 1052 | (free ? FW_CMD_EXEC_F : 0) | |
1053 | FW_VI_MAC_CMD_VIID(viid)); | 1053 | FW_VI_MAC_CMD_VIID(viid)); |
1054 | cmd.freemacs_to_len16 = | 1054 | cmd.freemacs_to_len16 = |
1055 | cpu_to_be32(FW_VI_MAC_CMD_FREEMACS(free) | | 1055 | cpu_to_be32(FW_VI_MAC_CMD_FREEMACS(free) | |
1056 | FW_CMD_LEN16(len16)); | 1056 | FW_CMD_LEN16_V(len16)); |
1057 | 1057 | ||
1058 | for (i = 0, p = cmd.u.exact; i < fw_naddr; i++, p++) { | 1058 | for (i = 0, p = cmd.u.exact; i < fw_naddr; i++, p++) { |
1059 | p->valid_to_idx = cpu_to_be16( | 1059 | p->valid_to_idx = cpu_to_be16( |
@@ -1135,11 +1135,11 @@ int t4vf_change_mac(struct adapter *adapter, unsigned int viid, | |||
1135 | idx = persist ? FW_VI_MAC_ADD_PERSIST_MAC : FW_VI_MAC_ADD_MAC; | 1135 | idx = persist ? FW_VI_MAC_ADD_PERSIST_MAC : FW_VI_MAC_ADD_MAC; |
1136 | 1136 | ||
1137 | memset(&cmd, 0, sizeof(cmd)); | 1137 | memset(&cmd, 0, sizeof(cmd)); |
1138 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP(FW_VI_MAC_CMD) | | 1138 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | |
1139 | FW_CMD_REQUEST | | 1139 | FW_CMD_REQUEST_F | |
1140 | FW_CMD_WRITE | | 1140 | FW_CMD_WRITE_F | |
1141 | FW_VI_MAC_CMD_VIID(viid)); | 1141 | FW_VI_MAC_CMD_VIID(viid)); |
1142 | cmd.freemacs_to_len16 = cpu_to_be32(FW_CMD_LEN16(len16)); | 1142 | cmd.freemacs_to_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); |
1143 | p->valid_to_idx = cpu_to_be16(FW_VI_MAC_CMD_VALID | | 1143 | p->valid_to_idx = cpu_to_be16(FW_VI_MAC_CMD_VALID | |
1144 | FW_VI_MAC_CMD_IDX(idx)); | 1144 | FW_VI_MAC_CMD_IDX(idx)); |
1145 | memcpy(p->macaddr, addr, sizeof(p->macaddr)); | 1145 | memcpy(p->macaddr, addr, sizeof(p->macaddr)); |
@@ -1172,13 +1172,13 @@ int t4vf_set_addr_hash(struct adapter *adapter, unsigned int viid, | |||
1172 | u.exact[0]), 16); | 1172 | u.exact[0]), 16); |
1173 | 1173 | ||
1174 | memset(&cmd, 0, sizeof(cmd)); | 1174 | memset(&cmd, 0, sizeof(cmd)); |
1175 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP(FW_VI_MAC_CMD) | | 1175 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_MAC_CMD) | |
1176 | FW_CMD_REQUEST | | 1176 | FW_CMD_REQUEST_F | |
1177 | FW_CMD_WRITE | | 1177 | FW_CMD_WRITE_F | |
1178 | FW_VI_ENABLE_CMD_VIID(viid)); | 1178 | FW_VI_ENABLE_CMD_VIID(viid)); |
1179 | cmd.freemacs_to_len16 = cpu_to_be32(FW_VI_MAC_CMD_HASHVECEN | | 1179 | cmd.freemacs_to_len16 = cpu_to_be32(FW_VI_MAC_CMD_HASHVECEN | |
1180 | FW_VI_MAC_CMD_HASHUNIEN(ucast) | | 1180 | FW_VI_MAC_CMD_HASHUNIEN(ucast) | |
1181 | FW_CMD_LEN16(len16)); | 1181 | FW_CMD_LEN16_V(len16)); |
1182 | cmd.u.hash.hashvec = cpu_to_be64(vec); | 1182 | cmd.u.hash.hashvec = cpu_to_be64(vec); |
1183 | return t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), NULL, sleep_ok); | 1183 | return t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), NULL, sleep_ok); |
1184 | } | 1184 | } |
@@ -1214,11 +1214,11 @@ int t4vf_get_port_stats(struct adapter *adapter, int pidx, | |||
1214 | int ret; | 1214 | int ret; |
1215 | 1215 | ||
1216 | memset(&cmd, 0, sizeof(cmd)); | 1216 | memset(&cmd, 0, sizeof(cmd)); |
1217 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP(FW_VI_STATS_CMD) | | 1217 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP_V(FW_VI_STATS_CMD) | |
1218 | FW_VI_STATS_CMD_VIID(pi->viid) | | 1218 | FW_VI_STATS_CMD_VIID(pi->viid) | |
1219 | FW_CMD_REQUEST | | 1219 | FW_CMD_REQUEST_F | |
1220 | FW_CMD_READ); | 1220 | FW_CMD_READ_F); |
1221 | cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16(len16)); | 1221 | cmd.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(len16)); |
1222 | cmd.u.ctl.nstats_ix = | 1222 | cmd.u.ctl.nstats_ix = |
1223 | cpu_to_be16(FW_VI_STATS_CMD_IX(ix) | | 1223 | cpu_to_be16(FW_VI_STATS_CMD_IX(ix) | |
1224 | FW_VI_STATS_CMD_NSTATS(nstats)); | 1224 | FW_VI_STATS_CMD_NSTATS(nstats)); |
@@ -1273,9 +1273,9 @@ int t4vf_iq_free(struct adapter *adapter, unsigned int iqtype, | |||
1273 | struct fw_iq_cmd cmd; | 1273 | struct fw_iq_cmd cmd; |
1274 | 1274 | ||
1275 | memset(&cmd, 0, sizeof(cmd)); | 1275 | memset(&cmd, 0, sizeof(cmd)); |
1276 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP(FW_IQ_CMD) | | 1276 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_IQ_CMD) | |
1277 | FW_CMD_REQUEST | | 1277 | FW_CMD_REQUEST_F | |
1278 | FW_CMD_EXEC); | 1278 | FW_CMD_EXEC_F); |
1279 | cmd.alloc_to_len16 = cpu_to_be32(FW_IQ_CMD_FREE | | 1279 | cmd.alloc_to_len16 = cpu_to_be32(FW_IQ_CMD_FREE | |
1280 | FW_LEN16(cmd)); | 1280 | FW_LEN16(cmd)); |
1281 | cmd.type_to_iqandstindex = | 1281 | cmd.type_to_iqandstindex = |
@@ -1299,9 +1299,9 @@ int t4vf_eth_eq_free(struct adapter *adapter, unsigned int eqid) | |||
1299 | struct fw_eq_eth_cmd cmd; | 1299 | struct fw_eq_eth_cmd cmd; |
1300 | 1300 | ||
1301 | memset(&cmd, 0, sizeof(cmd)); | 1301 | memset(&cmd, 0, sizeof(cmd)); |
1302 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP(FW_EQ_ETH_CMD) | | 1302 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP_V(FW_EQ_ETH_CMD) | |
1303 | FW_CMD_REQUEST | | 1303 | FW_CMD_REQUEST_F | |
1304 | FW_CMD_EXEC); | 1304 | FW_CMD_EXEC_F); |
1305 | cmd.alloc_to_len16 = cpu_to_be32(FW_EQ_ETH_CMD_FREE | | 1305 | cmd.alloc_to_len16 = cpu_to_be32(FW_EQ_ETH_CMD_FREE | |
1306 | FW_LEN16(cmd)); | 1306 | FW_LEN16(cmd)); |
1307 | cmd.eqid_pkd = cpu_to_be32(FW_EQ_ETH_CMD_EQID(eqid)); | 1307 | cmd.eqid_pkd = cpu_to_be32(FW_EQ_ETH_CMD_EQID(eqid)); |
@@ -1318,7 +1318,7 @@ int t4vf_eth_eq_free(struct adapter *adapter, unsigned int eqid) | |||
1318 | int t4vf_handle_fw_rpl(struct adapter *adapter, const __be64 *rpl) | 1318 | int t4vf_handle_fw_rpl(struct adapter *adapter, const __be64 *rpl) |
1319 | { | 1319 | { |
1320 | const struct fw_cmd_hdr *cmd_hdr = (const struct fw_cmd_hdr *)rpl; | 1320 | const struct fw_cmd_hdr *cmd_hdr = (const struct fw_cmd_hdr *)rpl; |
1321 | u8 opcode = FW_CMD_OP_GET(be32_to_cpu(cmd_hdr->hi)); | 1321 | u8 opcode = FW_CMD_OP_G(be32_to_cpu(cmd_hdr->hi)); |
1322 | 1322 | ||
1323 | switch (opcode) { | 1323 | switch (opcode) { |
1324 | case FW_PORT_CMD: { | 1324 | case FW_PORT_CMD: { |
diff --git a/drivers/scsi/csiostor/csio_attr.c b/drivers/scsi/csiostor/csio_attr.c index 065a87ace623..2d1c4ebd40f9 100644 --- a/drivers/scsi/csiostor/csio_attr.c +++ b/drivers/scsi/csiostor/csio_attr.c | |||
@@ -451,9 +451,9 @@ csio_fcoe_alloc_vnp(struct csio_hw *hw, struct csio_lnode *ln) | |||
451 | 451 | ||
452 | /* Process Mbox response of VNP command */ | 452 | /* Process Mbox response of VNP command */ |
453 | rsp = (struct fw_fcoe_vnp_cmd *)(mbp->mb); | 453 | rsp = (struct fw_fcoe_vnp_cmd *)(mbp->mb); |
454 | if (FW_CMD_RETVAL_GET(ntohl(rsp->alloc_to_len16)) != FW_SUCCESS) { | 454 | if (FW_CMD_RETVAL_G(ntohl(rsp->alloc_to_len16)) != FW_SUCCESS) { |
455 | csio_ln_err(ln, "FCOE VNP ALLOC cmd returned 0x%x!\n", | 455 | csio_ln_err(ln, "FCOE VNP ALLOC cmd returned 0x%x!\n", |
456 | FW_CMD_RETVAL_GET(ntohl(rsp->alloc_to_len16))); | 456 | FW_CMD_RETVAL_G(ntohl(rsp->alloc_to_len16))); |
457 | ret = -EINVAL; | 457 | ret = -EINVAL; |
458 | goto out_free; | 458 | goto out_free; |
459 | } | 459 | } |
@@ -526,9 +526,9 @@ csio_fcoe_free_vnp(struct csio_hw *hw, struct csio_lnode *ln) | |||
526 | 526 | ||
527 | /* Process Mbox response of VNP command */ | 527 | /* Process Mbox response of VNP command */ |
528 | rsp = (struct fw_fcoe_vnp_cmd *)(mbp->mb); | 528 | rsp = (struct fw_fcoe_vnp_cmd *)(mbp->mb); |
529 | if (FW_CMD_RETVAL_GET(ntohl(rsp->alloc_to_len16)) != FW_SUCCESS) { | 529 | if (FW_CMD_RETVAL_G(ntohl(rsp->alloc_to_len16)) != FW_SUCCESS) { |
530 | csio_ln_err(ln, "FCOE VNP FREE cmd returned 0x%x!\n", | 530 | csio_ln_err(ln, "FCOE VNP FREE cmd returned 0x%x!\n", |
531 | FW_CMD_RETVAL_GET(ntohl(rsp->alloc_to_len16))); | 531 | FW_CMD_RETVAL_G(ntohl(rsp->alloc_to_len16))); |
532 | ret = -EINVAL; | 532 | ret = -EINVAL; |
533 | } | 533 | } |
534 | 534 | ||
diff --git a/drivers/scsi/csiostor/csio_hw.c b/drivers/scsi/csiostor/csio_hw.c index 0eaec4748957..5f06877aa7c4 100644 --- a/drivers/scsi/csiostor/csio_hw.c +++ b/drivers/scsi/csiostor/csio_hw.c | |||
@@ -1370,9 +1370,9 @@ csio_hw_fw_config_file(struct csio_hw *hw, | |||
1370 | caps_cmd = (struct fw_caps_config_cmd *)(mbp->mb); | 1370 | caps_cmd = (struct fw_caps_config_cmd *)(mbp->mb); |
1371 | CSIO_INIT_MBP(mbp, caps_cmd, CSIO_MB_DEFAULT_TMO, hw, NULL, 1); | 1371 | CSIO_INIT_MBP(mbp, caps_cmd, CSIO_MB_DEFAULT_TMO, hw, NULL, 1); |
1372 | caps_cmd->op_to_write = | 1372 | caps_cmd->op_to_write = |
1373 | htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) | | 1373 | htonl(FW_CMD_OP_V(FW_CAPS_CONFIG_CMD) | |
1374 | FW_CMD_REQUEST | | 1374 | FW_CMD_REQUEST_F | |
1375 | FW_CMD_READ); | 1375 | FW_CMD_READ_F); |
1376 | caps_cmd->cfvalid_to_len16 = | 1376 | caps_cmd->cfvalid_to_len16 = |
1377 | htonl(FW_CAPS_CONFIG_CMD_CFVALID | | 1377 | htonl(FW_CAPS_CONFIG_CMD_CFVALID | |
1378 | FW_CAPS_CONFIG_CMD_MEMTYPE_CF(mtype) | | 1378 | FW_CAPS_CONFIG_CMD_MEMTYPE_CF(mtype) | |
@@ -1407,9 +1407,9 @@ csio_hw_fw_config_file(struct csio_hw *hw, | |||
1407 | * And now tell the firmware to use the configuration we just loaded. | 1407 | * And now tell the firmware to use the configuration we just loaded. |
1408 | */ | 1408 | */ |
1409 | caps_cmd->op_to_write = | 1409 | caps_cmd->op_to_write = |
1410 | htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) | | 1410 | htonl(FW_CMD_OP_V(FW_CAPS_CONFIG_CMD) | |
1411 | FW_CMD_REQUEST | | 1411 | FW_CMD_REQUEST_F | |
1412 | FW_CMD_WRITE); | 1412 | FW_CMD_WRITE_F); |
1413 | caps_cmd->cfvalid_to_len16 = htonl(FW_LEN16(*caps_cmd)); | 1413 | caps_cmd->cfvalid_to_len16 = htonl(FW_LEN16(*caps_cmd)); |
1414 | 1414 | ||
1415 | if (csio_mb_issue(hw, mbp)) { | 1415 | if (csio_mb_issue(hw, mbp)) { |
@@ -1678,7 +1678,7 @@ csio_get_fcoe_resinfo(struct csio_hw *hw) | |||
1678 | } | 1678 | } |
1679 | 1679 | ||
1680 | rsp = (struct fw_fcoe_res_info_cmd *)(mbp->mb); | 1680 | rsp = (struct fw_fcoe_res_info_cmd *)(mbp->mb); |
1681 | retval = FW_CMD_RETVAL_GET(ntohl(rsp->retval_len16)); | 1681 | retval = FW_CMD_RETVAL_G(ntohl(rsp->retval_len16)); |
1682 | if (retval != FW_SUCCESS) { | 1682 | if (retval != FW_SUCCESS) { |
1683 | csio_err(hw, "FW_FCOE_RES_INFO_CMD failed with ret x%x\n", | 1683 | csio_err(hw, "FW_FCOE_RES_INFO_CMD failed with ret x%x\n", |
1684 | retval); | 1684 | retval); |
diff --git a/drivers/scsi/csiostor/csio_lnode.c b/drivers/scsi/csiostor/csio_lnode.c index ffe9be04dc39..48e45b1ea4e5 100644 --- a/drivers/scsi/csiostor/csio_lnode.c +++ b/drivers/scsi/csiostor/csio_lnode.c | |||
@@ -603,7 +603,7 @@ csio_ln_vnp_read_cbfn(struct csio_hw *hw, struct csio_mb *mbp) | |||
603 | enum fw_retval retval; | 603 | enum fw_retval retval; |
604 | __be32 nport_id; | 604 | __be32 nport_id; |
605 | 605 | ||
606 | retval = FW_CMD_RETVAL_GET(ntohl(rsp->alloc_to_len16)); | 606 | retval = FW_CMD_RETVAL_G(ntohl(rsp->alloc_to_len16)); |
607 | if (retval != FW_SUCCESS) { | 607 | if (retval != FW_SUCCESS) { |
608 | csio_err(hw, "FCOE VNP read cmd returned error:0x%x\n", retval); | 608 | csio_err(hw, "FCOE VNP read cmd returned error:0x%x\n", retval); |
609 | mempool_free(mbp, hw->mb_mempool); | 609 | mempool_free(mbp, hw->mb_mempool); |
@@ -770,7 +770,7 @@ csio_ln_read_fcf_cbfn(struct csio_hw *hw, struct csio_mb *mbp) | |||
770 | (struct fw_fcoe_fcf_cmd *)(mbp->mb); | 770 | (struct fw_fcoe_fcf_cmd *)(mbp->mb); |
771 | enum fw_retval retval; | 771 | enum fw_retval retval; |
772 | 772 | ||
773 | retval = FW_CMD_RETVAL_GET(ntohl(rsp->retval_len16)); | 773 | retval = FW_CMD_RETVAL_G(ntohl(rsp->retval_len16)); |
774 | if (retval != FW_SUCCESS) { | 774 | if (retval != FW_SUCCESS) { |
775 | csio_ln_err(ln, "FCOE FCF cmd failed with ret x%x\n", | 775 | csio_ln_err(ln, "FCOE FCF cmd failed with ret x%x\n", |
776 | retval); | 776 | retval); |
@@ -1506,7 +1506,7 @@ csio_fcoe_fwevt_handler(struct csio_hw *hw, __u8 cpl_op, __be64 *cmd) | |||
1506 | } | 1506 | } |
1507 | } else if (cpl_op == CPL_FW6_PLD) { | 1507 | } else if (cpl_op == CPL_FW6_PLD) { |
1508 | wr = (struct fw_wr_hdr *) (cmd + 4); | 1508 | wr = (struct fw_wr_hdr *) (cmd + 4); |
1509 | if (FW_WR_OP_GET(be32_to_cpu(wr->hi)) | 1509 | if (FW_WR_OP_G(be32_to_cpu(wr->hi)) |
1510 | == FW_RDEV_WR) { | 1510 | == FW_RDEV_WR) { |
1511 | 1511 | ||
1512 | rdev_wr = (struct fw_rdev_wr *) (cmd + 4); | 1512 | rdev_wr = (struct fw_rdev_wr *) (cmd + 4); |
@@ -1574,17 +1574,17 @@ out_pld: | |||
1574 | return; | 1574 | return; |
1575 | } else { | 1575 | } else { |
1576 | csio_warn(hw, "unexpected WR op(0x%x) recv\n", | 1576 | csio_warn(hw, "unexpected WR op(0x%x) recv\n", |
1577 | FW_WR_OP_GET(be32_to_cpu((wr->hi)))); | 1577 | FW_WR_OP_G(be32_to_cpu((wr->hi)))); |
1578 | CSIO_INC_STATS(hw, n_cpl_unexp); | 1578 | CSIO_INC_STATS(hw, n_cpl_unexp); |
1579 | } | 1579 | } |
1580 | } else if (cpl_op == CPL_FW6_MSG) { | 1580 | } else if (cpl_op == CPL_FW6_MSG) { |
1581 | wr = (struct fw_wr_hdr *) (cmd); | 1581 | wr = (struct fw_wr_hdr *) (cmd); |
1582 | if (FW_WR_OP_GET(be32_to_cpu(wr->hi)) == FW_FCOE_ELS_CT_WR) { | 1582 | if (FW_WR_OP_G(be32_to_cpu(wr->hi)) == FW_FCOE_ELS_CT_WR) { |
1583 | csio_ln_mgmt_wr_handler(hw, wr, | 1583 | csio_ln_mgmt_wr_handler(hw, wr, |
1584 | sizeof(struct fw_fcoe_els_ct_wr)); | 1584 | sizeof(struct fw_fcoe_els_ct_wr)); |
1585 | } else { | 1585 | } else { |
1586 | csio_warn(hw, "unexpected WR op(0x%x) recv\n", | 1586 | csio_warn(hw, "unexpected WR op(0x%x) recv\n", |
1587 | FW_WR_OP_GET(be32_to_cpu((wr->hi)))); | 1587 | FW_WR_OP_G(be32_to_cpu((wr->hi)))); |
1588 | CSIO_INC_STATS(hw, n_cpl_unexp); | 1588 | CSIO_INC_STATS(hw, n_cpl_unexp); |
1589 | } | 1589 | } |
1590 | } else { | 1590 | } else { |
@@ -1668,12 +1668,12 @@ csio_ln_prep_ecwr(struct csio_ioreq *io_req, uint32_t wr_len, | |||
1668 | __be32 port_id; | 1668 | __be32 port_id; |
1669 | 1669 | ||
1670 | wr = (struct fw_fcoe_els_ct_wr *)fw_wr; | 1670 | wr = (struct fw_fcoe_els_ct_wr *)fw_wr; |
1671 | wr->op_immdlen = cpu_to_be32(FW_WR_OP(FW_FCOE_ELS_CT_WR) | | 1671 | wr->op_immdlen = cpu_to_be32(FW_WR_OP_V(FW_FCOE_ELS_CT_WR) | |
1672 | FW_FCOE_ELS_CT_WR_IMMDLEN(immd_len)); | 1672 | FW_FCOE_ELS_CT_WR_IMMDLEN(immd_len)); |
1673 | 1673 | ||
1674 | wr_len = DIV_ROUND_UP(wr_len, 16); | 1674 | wr_len = DIV_ROUND_UP(wr_len, 16); |
1675 | wr->flowid_len16 = cpu_to_be32(FW_WR_FLOWID(flow_id) | | 1675 | wr->flowid_len16 = cpu_to_be32(FW_WR_FLOWID_V(flow_id) | |
1676 | FW_WR_LEN16(wr_len)); | 1676 | FW_WR_LEN16_V(wr_len)); |
1677 | wr->els_ct_type = sub_op; | 1677 | wr->els_ct_type = sub_op; |
1678 | wr->ctl_pri = 0; | 1678 | wr->ctl_pri = 0; |
1679 | wr->cp_en_class = 0; | 1679 | wr->cp_en_class = 0; |
diff --git a/drivers/scsi/csiostor/csio_mb.c b/drivers/scsi/csiostor/csio_mb.c index 15b635142546..ffa848987608 100644 --- a/drivers/scsi/csiostor/csio_mb.c +++ b/drivers/scsi/csiostor/csio_mb.c | |||
@@ -59,7 +59,7 @@ csio_mb_fw_retval(struct csio_mb *mbp) | |||
59 | 59 | ||
60 | hdr = (struct fw_cmd_hdr *)(mbp->mb); | 60 | hdr = (struct fw_cmd_hdr *)(mbp->mb); |
61 | 61 | ||
62 | return FW_CMD_RETVAL_GET(ntohl(hdr->lo)); | 62 | return FW_CMD_RETVAL_G(ntohl(hdr->lo)); |
63 | } | 63 | } |
64 | 64 | ||
65 | /* | 65 | /* |
@@ -81,9 +81,9 @@ csio_mb_hello(struct csio_hw *hw, struct csio_mb *mbp, uint32_t tmo, | |||
81 | 81 | ||
82 | CSIO_INIT_MBP(mbp, cmdp, tmo, hw, cbfn, 1); | 82 | CSIO_INIT_MBP(mbp, cmdp, tmo, hw, cbfn, 1); |
83 | 83 | ||
84 | cmdp->op_to_write = htonl(FW_CMD_OP(FW_HELLO_CMD) | | 84 | cmdp->op_to_write = htonl(FW_CMD_OP_V(FW_HELLO_CMD) | |
85 | FW_CMD_REQUEST | FW_CMD_WRITE); | 85 | FW_CMD_REQUEST_F | FW_CMD_WRITE_F); |
86 | cmdp->retval_len16 = htonl(FW_CMD_LEN16(sizeof(*cmdp) / 16)); | 86 | cmdp->retval_len16 = htonl(FW_CMD_LEN16_V(sizeof(*cmdp) / 16)); |
87 | cmdp->err_to_clearinit = htonl( | 87 | cmdp->err_to_clearinit = htonl( |
88 | FW_HELLO_CMD_MASTERDIS(master == CSIO_MASTER_CANT) | | 88 | FW_HELLO_CMD_MASTERDIS(master == CSIO_MASTER_CANT) | |
89 | FW_HELLO_CMD_MASTERFORCE(master == CSIO_MASTER_MUST) | | 89 | FW_HELLO_CMD_MASTERFORCE(master == CSIO_MASTER_MUST) | |
@@ -112,7 +112,7 @@ csio_mb_process_hello_rsp(struct csio_hw *hw, struct csio_mb *mbp, | |||
112 | struct fw_hello_cmd *rsp = (struct fw_hello_cmd *)(mbp->mb); | 112 | struct fw_hello_cmd *rsp = (struct fw_hello_cmd *)(mbp->mb); |
113 | uint32_t value; | 113 | uint32_t value; |
114 | 114 | ||
115 | *retval = FW_CMD_RETVAL_GET(ntohl(rsp->retval_len16)); | 115 | *retval = FW_CMD_RETVAL_G(ntohl(rsp->retval_len16)); |
116 | 116 | ||
117 | if (*retval == FW_SUCCESS) { | 117 | if (*retval == FW_SUCCESS) { |
118 | hw->fwrev = ntohl(rsp->fwrev); | 118 | hw->fwrev = ntohl(rsp->fwrev); |
@@ -144,9 +144,9 @@ csio_mb_bye(struct csio_hw *hw, struct csio_mb *mbp, uint32_t tmo, | |||
144 | 144 | ||
145 | CSIO_INIT_MBP(mbp, cmdp, tmo, hw, cbfn, 1); | 145 | CSIO_INIT_MBP(mbp, cmdp, tmo, hw, cbfn, 1); |
146 | 146 | ||
147 | cmdp->op_to_write = htonl(FW_CMD_OP(FW_BYE_CMD) | | 147 | cmdp->op_to_write = htonl(FW_CMD_OP_V(FW_BYE_CMD) | |
148 | FW_CMD_REQUEST | FW_CMD_WRITE); | 148 | FW_CMD_REQUEST_F | FW_CMD_WRITE_F); |
149 | cmdp->retval_len16 = htonl(FW_CMD_LEN16(sizeof(*cmdp) / 16)); | 149 | cmdp->retval_len16 = htonl(FW_CMD_LEN16_V(sizeof(*cmdp) / 16)); |
150 | 150 | ||
151 | } | 151 | } |
152 | 152 | ||
@@ -167,9 +167,9 @@ csio_mb_reset(struct csio_hw *hw, struct csio_mb *mbp, uint32_t tmo, | |||
167 | 167 | ||
168 | CSIO_INIT_MBP(mbp, cmdp, tmo, hw, cbfn, 1); | 168 | CSIO_INIT_MBP(mbp, cmdp, tmo, hw, cbfn, 1); |
169 | 169 | ||
170 | cmdp->op_to_write = htonl(FW_CMD_OP(FW_RESET_CMD) | | 170 | cmdp->op_to_write = htonl(FW_CMD_OP_V(FW_RESET_CMD) | |
171 | FW_CMD_REQUEST | FW_CMD_WRITE); | 171 | FW_CMD_REQUEST_F | FW_CMD_WRITE_F); |
172 | cmdp->retval_len16 = htonl(FW_CMD_LEN16(sizeof(*cmdp) / 16)); | 172 | cmdp->retval_len16 = htonl(FW_CMD_LEN16_V(sizeof(*cmdp) / 16)); |
173 | cmdp->val = htonl(reset); | 173 | cmdp->val = htonl(reset); |
174 | cmdp->halt_pkd = htonl(halt); | 174 | cmdp->halt_pkd = htonl(halt); |
175 | 175 | ||
@@ -202,12 +202,12 @@ csio_mb_params(struct csio_hw *hw, struct csio_mb *mbp, uint32_t tmo, | |||
202 | 202 | ||
203 | CSIO_INIT_MBP(mbp, cmdp, tmo, hw, cbfn, 1); | 203 | CSIO_INIT_MBP(mbp, cmdp, tmo, hw, cbfn, 1); |
204 | 204 | ||
205 | cmdp->op_to_vfn = htonl(FW_CMD_OP(FW_PARAMS_CMD) | | 205 | cmdp->op_to_vfn = htonl(FW_CMD_OP_V(FW_PARAMS_CMD) | |
206 | FW_CMD_REQUEST | | 206 | FW_CMD_REQUEST_F | |
207 | (wr ? FW_CMD_WRITE : FW_CMD_READ) | | 207 | (wr ? FW_CMD_WRITE_F : FW_CMD_READ_F) | |
208 | FW_PARAMS_CMD_PFN(pf) | | 208 | FW_PARAMS_CMD_PFN(pf) | |
209 | FW_PARAMS_CMD_VFN(vf)); | 209 | FW_PARAMS_CMD_VFN(vf)); |
210 | cmdp->retval_len16 = htonl(FW_CMD_LEN16(sizeof(*cmdp) / 16)); | 210 | cmdp->retval_len16 = htonl(FW_CMD_LEN16_V(sizeof(*cmdp) / 16)); |
211 | 211 | ||
212 | /* Write Params */ | 212 | /* Write Params */ |
213 | if (wr) { | 213 | if (wr) { |
@@ -245,7 +245,7 @@ csio_mb_process_read_params_rsp(struct csio_hw *hw, struct csio_mb *mbp, | |||
245 | uint32_t i; | 245 | uint32_t i; |
246 | __be32 *p = &rsp->param[0].val; | 246 | __be32 *p = &rsp->param[0].val; |
247 | 247 | ||
248 | *retval = FW_CMD_RETVAL_GET(ntohl(rsp->retval_len16)); | 248 | *retval = FW_CMD_RETVAL_G(ntohl(rsp->retval_len16)); |
249 | 249 | ||
250 | if (*retval == FW_SUCCESS) | 250 | if (*retval == FW_SUCCESS) |
251 | for (i = 0; i < nparams; i++, p += 2) | 251 | for (i = 0; i < nparams; i++, p += 2) |
@@ -271,9 +271,9 @@ csio_mb_ldst(struct csio_hw *hw, struct csio_mb *mbp, uint32_t tmo, int reg) | |||
271 | * specified PCI-E Configuration Space register. | 271 | * specified PCI-E Configuration Space register. |
272 | */ | 272 | */ |
273 | ldst_cmd->op_to_addrspace = | 273 | ldst_cmd->op_to_addrspace = |
274 | htonl(FW_CMD_OP(FW_LDST_CMD) | | 274 | htonl(FW_CMD_OP_V(FW_LDST_CMD) | |
275 | FW_CMD_REQUEST | | 275 | FW_CMD_REQUEST_F | |
276 | FW_CMD_READ | | 276 | FW_CMD_READ_F | |
277 | FW_LDST_CMD_ADDRSPACE(FW_LDST_ADDRSPC_FUNC_PCIE)); | 277 | FW_LDST_CMD_ADDRSPACE(FW_LDST_ADDRSPC_FUNC_PCIE)); |
278 | ldst_cmd->cycles_to_len16 = htonl(FW_LEN16(struct fw_ldst_cmd)); | 278 | ldst_cmd->cycles_to_len16 = htonl(FW_LEN16(struct fw_ldst_cmd)); |
279 | ldst_cmd->u.pcie.select_naccess = FW_LDST_CMD_NACCESS(1); | 279 | ldst_cmd->u.pcie.select_naccess = FW_LDST_CMD_NACCESS(1); |
@@ -306,10 +306,10 @@ csio_mb_caps_config(struct csio_hw *hw, struct csio_mb *mbp, uint32_t tmo, | |||
306 | 306 | ||
307 | CSIO_INIT_MBP(mbp, cmdp, tmo, hw, cbfn, wr ? 0 : 1); | 307 | CSIO_INIT_MBP(mbp, cmdp, tmo, hw, cbfn, wr ? 0 : 1); |
308 | 308 | ||
309 | cmdp->op_to_write = htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) | | 309 | cmdp->op_to_write = htonl(FW_CMD_OP_V(FW_CAPS_CONFIG_CMD) | |
310 | FW_CMD_REQUEST | | 310 | FW_CMD_REQUEST_F | |
311 | (wr ? FW_CMD_WRITE : FW_CMD_READ)); | 311 | (wr ? FW_CMD_WRITE_F : FW_CMD_READ_F)); |
312 | cmdp->cfvalid_to_len16 = htonl(FW_CMD_LEN16(sizeof(*cmdp) / 16)); | 312 | cmdp->cfvalid_to_len16 = htonl(FW_CMD_LEN16_V(sizeof(*cmdp) / 16)); |
313 | 313 | ||
314 | /* Read config */ | 314 | /* Read config */ |
315 | if (!wr) | 315 | if (!wr) |
@@ -351,21 +351,21 @@ csio_mb_port(struct csio_hw *hw, struct csio_mb *mbp, uint32_t tmo, | |||
351 | 351 | ||
352 | CSIO_INIT_MBP(mbp, cmdp, tmo, hw, cbfn, 1); | 352 | CSIO_INIT_MBP(mbp, cmdp, tmo, hw, cbfn, 1); |
353 | 353 | ||
354 | cmdp->op_to_portid = htonl(FW_CMD_OP(FW_PORT_CMD) | | 354 | cmdp->op_to_portid = htonl(FW_CMD_OP_V(FW_PORT_CMD) | |
355 | FW_CMD_REQUEST | | 355 | FW_CMD_REQUEST_F | |
356 | (wr ? FW_CMD_EXEC : FW_CMD_READ) | | 356 | (wr ? FW_CMD_EXEC_F : FW_CMD_READ_F) | |
357 | FW_PORT_CMD_PORTID(portid)); | 357 | FW_PORT_CMD_PORTID(portid)); |
358 | if (!wr) { | 358 | if (!wr) { |
359 | cmdp->action_to_len16 = htonl( | 359 | cmdp->action_to_len16 = htonl( |
360 | FW_PORT_CMD_ACTION(FW_PORT_ACTION_GET_PORT_INFO) | | 360 | FW_PORT_CMD_ACTION(FW_PORT_ACTION_GET_PORT_INFO) | |
361 | FW_CMD_LEN16(sizeof(*cmdp) / 16)); | 361 | FW_CMD_LEN16_V(sizeof(*cmdp) / 16)); |
362 | return; | 362 | return; |
363 | } | 363 | } |
364 | 364 | ||
365 | /* Set port */ | 365 | /* Set port */ |
366 | cmdp->action_to_len16 = htonl( | 366 | cmdp->action_to_len16 = htonl( |
367 | FW_PORT_CMD_ACTION(FW_PORT_ACTION_L1_CFG) | | 367 | FW_PORT_CMD_ACTION(FW_PORT_ACTION_L1_CFG) | |
368 | FW_CMD_LEN16(sizeof(*cmdp) / 16)); | 368 | FW_CMD_LEN16_V(sizeof(*cmdp) / 16)); |
369 | 369 | ||
370 | if (fc & PAUSE_RX) | 370 | if (fc & PAUSE_RX) |
371 | lfc |= FW_PORT_CAP_FC_RX; | 371 | lfc |= FW_PORT_CAP_FC_RX; |
@@ -393,7 +393,7 @@ csio_mb_process_read_port_rsp(struct csio_hw *hw, struct csio_mb *mbp, | |||
393 | { | 393 | { |
394 | struct fw_port_cmd *rsp = (struct fw_port_cmd *)(mbp->mb); | 394 | struct fw_port_cmd *rsp = (struct fw_port_cmd *)(mbp->mb); |
395 | 395 | ||
396 | *retval = FW_CMD_RETVAL_GET(ntohl(rsp->action_to_len16)); | 396 | *retval = FW_CMD_RETVAL_G(ntohl(rsp->action_to_len16)); |
397 | 397 | ||
398 | if (*retval == FW_SUCCESS) | 398 | if (*retval == FW_SUCCESS) |
399 | *caps = ntohs(rsp->u.info.pcap); | 399 | *caps = ntohs(rsp->u.info.pcap); |
@@ -415,9 +415,9 @@ csio_mb_initialize(struct csio_hw *hw, struct csio_mb *mbp, uint32_t tmo, | |||
415 | 415 | ||
416 | CSIO_INIT_MBP(mbp, cmdp, tmo, hw, cbfn, 1); | 416 | CSIO_INIT_MBP(mbp, cmdp, tmo, hw, cbfn, 1); |
417 | 417 | ||
418 | cmdp->op_to_write = htonl(FW_CMD_OP(FW_INITIALIZE_CMD) | | 418 | cmdp->op_to_write = htonl(FW_CMD_OP_V(FW_INITIALIZE_CMD) | |
419 | FW_CMD_REQUEST | FW_CMD_WRITE); | 419 | FW_CMD_REQUEST_F | FW_CMD_WRITE_F); |
420 | cmdp->retval_len16 = htonl(FW_CMD_LEN16(sizeof(*cmdp) / 16)); | 420 | cmdp->retval_len16 = htonl(FW_CMD_LEN16_V(sizeof(*cmdp) / 16)); |
421 | 421 | ||
422 | } | 422 | } |
423 | 423 | ||
@@ -443,13 +443,13 @@ csio_mb_iq_alloc(struct csio_hw *hw, struct csio_mb *mbp, void *priv, | |||
443 | 443 | ||
444 | CSIO_INIT_MBP(mbp, cmdp, mb_tmo, priv, cbfn, 1); | 444 | CSIO_INIT_MBP(mbp, cmdp, mb_tmo, priv, cbfn, 1); |
445 | 445 | ||
446 | cmdp->op_to_vfn = htonl(FW_CMD_OP(FW_IQ_CMD) | | 446 | cmdp->op_to_vfn = htonl(FW_CMD_OP_V(FW_IQ_CMD) | |
447 | FW_CMD_REQUEST | FW_CMD_EXEC | | 447 | FW_CMD_REQUEST_F | FW_CMD_EXEC_F | |
448 | FW_IQ_CMD_PFN(iq_params->pfn) | | 448 | FW_IQ_CMD_PFN(iq_params->pfn) | |
449 | FW_IQ_CMD_VFN(iq_params->vfn)); | 449 | FW_IQ_CMD_VFN(iq_params->vfn)); |
450 | 450 | ||
451 | cmdp->alloc_to_len16 = htonl(FW_IQ_CMD_ALLOC | | 451 | cmdp->alloc_to_len16 = htonl(FW_IQ_CMD_ALLOC | |
452 | FW_CMD_LEN16(sizeof(*cmdp) / 16)); | 452 | FW_CMD_LEN16_V(sizeof(*cmdp) / 16)); |
453 | 453 | ||
454 | cmdp->type_to_iqandstindex = htonl( | 454 | cmdp->type_to_iqandstindex = htonl( |
455 | FW_IQ_CMD_VIID(iq_params->viid) | | 455 | FW_IQ_CMD_VIID(iq_params->viid) | |
@@ -499,12 +499,12 @@ csio_mb_iq_write(struct csio_hw *hw, struct csio_mb *mbp, void *priv, | |||
499 | if (!cascaded_req) | 499 | if (!cascaded_req) |
500 | CSIO_INIT_MBP(mbp, cmdp, mb_tmo, priv, cbfn, 1); | 500 | CSIO_INIT_MBP(mbp, cmdp, mb_tmo, priv, cbfn, 1); |
501 | 501 | ||
502 | cmdp->op_to_vfn |= htonl(FW_CMD_OP(FW_IQ_CMD) | | 502 | cmdp->op_to_vfn |= htonl(FW_CMD_OP_V(FW_IQ_CMD) | |
503 | FW_CMD_REQUEST | FW_CMD_WRITE | | 503 | FW_CMD_REQUEST_F | FW_CMD_WRITE_F | |
504 | FW_IQ_CMD_PFN(iq_params->pfn) | | 504 | FW_IQ_CMD_PFN(iq_params->pfn) | |
505 | FW_IQ_CMD_VFN(iq_params->vfn)); | 505 | FW_IQ_CMD_VFN(iq_params->vfn)); |
506 | cmdp->alloc_to_len16 |= htonl(iq_start_stop | | 506 | cmdp->alloc_to_len16 |= htonl(iq_start_stop | |
507 | FW_CMD_LEN16(sizeof(*cmdp) / 16)); | 507 | FW_CMD_LEN16_V(sizeof(*cmdp) / 16)); |
508 | cmdp->iqid |= htons(iq_params->iqid); | 508 | cmdp->iqid |= htons(iq_params->iqid); |
509 | cmdp->fl0id |= htons(iq_params->fl0id); | 509 | cmdp->fl0id |= htons(iq_params->fl0id); |
510 | cmdp->fl1id |= htons(iq_params->fl1id); | 510 | cmdp->fl1id |= htons(iq_params->fl1id); |
@@ -588,7 +588,7 @@ csio_mb_iq_alloc_write_rsp(struct csio_hw *hw, struct csio_mb *mbp, | |||
588 | { | 588 | { |
589 | struct fw_iq_cmd *rsp = (struct fw_iq_cmd *)(mbp->mb); | 589 | struct fw_iq_cmd *rsp = (struct fw_iq_cmd *)(mbp->mb); |
590 | 590 | ||
591 | *ret_val = FW_CMD_RETVAL_GET(ntohl(rsp->alloc_to_len16)); | 591 | *ret_val = FW_CMD_RETVAL_G(ntohl(rsp->alloc_to_len16)); |
592 | if (*ret_val == FW_SUCCESS) { | 592 | if (*ret_val == FW_SUCCESS) { |
593 | iq_params->physiqid = ntohs(rsp->physiqid); | 593 | iq_params->physiqid = ntohs(rsp->physiqid); |
594 | iq_params->iqid = ntohs(rsp->iqid); | 594 | iq_params->iqid = ntohs(rsp->iqid); |
@@ -622,12 +622,12 @@ csio_mb_iq_free(struct csio_hw *hw, struct csio_mb *mbp, void *priv, | |||
622 | 622 | ||
623 | CSIO_INIT_MBP(mbp, cmdp, mb_tmo, priv, cbfn, 1); | 623 | CSIO_INIT_MBP(mbp, cmdp, mb_tmo, priv, cbfn, 1); |
624 | 624 | ||
625 | cmdp->op_to_vfn = htonl(FW_CMD_OP(FW_IQ_CMD) | | 625 | cmdp->op_to_vfn = htonl(FW_CMD_OP_V(FW_IQ_CMD) | |
626 | FW_CMD_REQUEST | FW_CMD_EXEC | | 626 | FW_CMD_REQUEST_F | FW_CMD_EXEC_F | |
627 | FW_IQ_CMD_PFN(iq_params->pfn) | | 627 | FW_IQ_CMD_PFN(iq_params->pfn) | |
628 | FW_IQ_CMD_VFN(iq_params->vfn)); | 628 | FW_IQ_CMD_VFN(iq_params->vfn)); |
629 | cmdp->alloc_to_len16 = htonl(FW_IQ_CMD_FREE | | 629 | cmdp->alloc_to_len16 = htonl(FW_IQ_CMD_FREE | |
630 | FW_CMD_LEN16(sizeof(*cmdp) / 16)); | 630 | FW_CMD_LEN16_V(sizeof(*cmdp) / 16)); |
631 | cmdp->type_to_iqandstindex = htonl(FW_IQ_CMD_TYPE(iq_params->type)); | 631 | cmdp->type_to_iqandstindex = htonl(FW_IQ_CMD_TYPE(iq_params->type)); |
632 | 632 | ||
633 | cmdp->iqid = htons(iq_params->iqid); | 633 | cmdp->iqid = htons(iq_params->iqid); |
@@ -657,12 +657,12 @@ csio_mb_eq_ofld_alloc(struct csio_hw *hw, struct csio_mb *mbp, void *priv, | |||
657 | struct fw_eq_ofld_cmd *cmdp = (struct fw_eq_ofld_cmd *)(mbp->mb); | 657 | struct fw_eq_ofld_cmd *cmdp = (struct fw_eq_ofld_cmd *)(mbp->mb); |
658 | 658 | ||
659 | CSIO_INIT_MBP(mbp, cmdp, mb_tmo, priv, cbfn, 1); | 659 | CSIO_INIT_MBP(mbp, cmdp, mb_tmo, priv, cbfn, 1); |
660 | cmdp->op_to_vfn = htonl(FW_CMD_OP(FW_EQ_OFLD_CMD) | | 660 | cmdp->op_to_vfn = htonl(FW_CMD_OP_V(FW_EQ_OFLD_CMD) | |
661 | FW_CMD_REQUEST | FW_CMD_EXEC | | 661 | FW_CMD_REQUEST_F | FW_CMD_EXEC_F | |
662 | FW_EQ_OFLD_CMD_PFN(eq_ofld_params->pfn) | | 662 | FW_EQ_OFLD_CMD_PFN(eq_ofld_params->pfn) | |
663 | FW_EQ_OFLD_CMD_VFN(eq_ofld_params->vfn)); | 663 | FW_EQ_OFLD_CMD_VFN(eq_ofld_params->vfn)); |
664 | cmdp->alloc_to_len16 = htonl(FW_EQ_OFLD_CMD_ALLOC | | 664 | cmdp->alloc_to_len16 = htonl(FW_EQ_OFLD_CMD_ALLOC | |
665 | FW_CMD_LEN16(sizeof(*cmdp) / 16)); | 665 | FW_CMD_LEN16_V(sizeof(*cmdp) / 16)); |
666 | 666 | ||
667 | } /* csio_mb_eq_ofld_alloc */ | 667 | } /* csio_mb_eq_ofld_alloc */ |
668 | 668 | ||
@@ -704,12 +704,12 @@ csio_mb_eq_ofld_write(struct csio_hw *hw, struct csio_mb *mbp, void *priv, | |||
704 | if (!cascaded_req) | 704 | if (!cascaded_req) |
705 | CSIO_INIT_MBP(mbp, cmdp, mb_tmo, priv, cbfn, 1); | 705 | CSIO_INIT_MBP(mbp, cmdp, mb_tmo, priv, cbfn, 1); |
706 | 706 | ||
707 | cmdp->op_to_vfn |= htonl(FW_CMD_OP(FW_EQ_OFLD_CMD) | | 707 | cmdp->op_to_vfn |= htonl(FW_CMD_OP_V(FW_EQ_OFLD_CMD) | |
708 | FW_CMD_REQUEST | FW_CMD_WRITE | | 708 | FW_CMD_REQUEST_F | FW_CMD_WRITE_F | |
709 | FW_EQ_OFLD_CMD_PFN(eq_ofld_params->pfn) | | 709 | FW_EQ_OFLD_CMD_PFN(eq_ofld_params->pfn) | |
710 | FW_EQ_OFLD_CMD_VFN(eq_ofld_params->vfn)); | 710 | FW_EQ_OFLD_CMD_VFN(eq_ofld_params->vfn)); |
711 | cmdp->alloc_to_len16 |= htonl(eq_start_stop | | 711 | cmdp->alloc_to_len16 |= htonl(eq_start_stop | |
712 | FW_CMD_LEN16(sizeof(*cmdp) / 16)); | 712 | FW_CMD_LEN16_V(sizeof(*cmdp) / 16)); |
713 | 713 | ||
714 | cmdp->eqid_pkd |= htonl(FW_EQ_OFLD_CMD_EQID(eq_ofld_params->eqid)); | 714 | cmdp->eqid_pkd |= htonl(FW_EQ_OFLD_CMD_EQID(eq_ofld_params->eqid)); |
715 | 715 | ||
@@ -773,7 +773,7 @@ csio_mb_eq_ofld_alloc_write_rsp(struct csio_hw *hw, | |||
773 | { | 773 | { |
774 | struct fw_eq_ofld_cmd *rsp = (struct fw_eq_ofld_cmd *)(mbp->mb); | 774 | struct fw_eq_ofld_cmd *rsp = (struct fw_eq_ofld_cmd *)(mbp->mb); |
775 | 775 | ||
776 | *ret_val = FW_CMD_RETVAL_GET(ntohl(rsp->alloc_to_len16)); | 776 | *ret_val = FW_CMD_RETVAL_G(ntohl(rsp->alloc_to_len16)); |
777 | 777 | ||
778 | if (*ret_val == FW_SUCCESS) { | 778 | if (*ret_val == FW_SUCCESS) { |
779 | eq_ofld_params->eqid = FW_EQ_OFLD_CMD_EQID_GET( | 779 | eq_ofld_params->eqid = FW_EQ_OFLD_CMD_EQID_GET( |
@@ -807,12 +807,12 @@ csio_mb_eq_ofld_free(struct csio_hw *hw, struct csio_mb *mbp, void *priv, | |||
807 | 807 | ||
808 | CSIO_INIT_MBP(mbp, cmdp, mb_tmo, priv, cbfn, 1); | 808 | CSIO_INIT_MBP(mbp, cmdp, mb_tmo, priv, cbfn, 1); |
809 | 809 | ||
810 | cmdp->op_to_vfn = htonl(FW_CMD_OP(FW_EQ_OFLD_CMD) | | 810 | cmdp->op_to_vfn = htonl(FW_CMD_OP_V(FW_EQ_OFLD_CMD) | |
811 | FW_CMD_REQUEST | FW_CMD_EXEC | | 811 | FW_CMD_REQUEST_F | FW_CMD_EXEC_F | |
812 | FW_EQ_OFLD_CMD_PFN(eq_ofld_params->pfn) | | 812 | FW_EQ_OFLD_CMD_PFN(eq_ofld_params->pfn) | |
813 | FW_EQ_OFLD_CMD_VFN(eq_ofld_params->vfn)); | 813 | FW_EQ_OFLD_CMD_VFN(eq_ofld_params->vfn)); |
814 | cmdp->alloc_to_len16 = htonl(FW_EQ_OFLD_CMD_FREE | | 814 | cmdp->alloc_to_len16 = htonl(FW_EQ_OFLD_CMD_FREE | |
815 | FW_CMD_LEN16(sizeof(*cmdp) / 16)); | 815 | FW_CMD_LEN16_V(sizeof(*cmdp) / 16)); |
816 | cmdp->eqid_pkd = htonl(FW_EQ_OFLD_CMD_EQID(eq_ofld_params->eqid)); | 816 | cmdp->eqid_pkd = htonl(FW_EQ_OFLD_CMD_EQID(eq_ofld_params->eqid)); |
817 | 817 | ||
818 | } /* csio_mb_eq_ofld_free */ | 818 | } /* csio_mb_eq_ofld_free */ |
@@ -840,15 +840,15 @@ csio_write_fcoe_link_cond_init_mb(struct csio_lnode *ln, struct csio_mb *mbp, | |||
840 | CSIO_INIT_MBP(mbp, cmdp, mb_tmo, ln, cbfn, 1); | 840 | CSIO_INIT_MBP(mbp, cmdp, mb_tmo, ln, cbfn, 1); |
841 | 841 | ||
842 | cmdp->op_to_portid = htonl(( | 842 | cmdp->op_to_portid = htonl(( |
843 | FW_CMD_OP(FW_FCOE_LINK_CMD) | | 843 | FW_CMD_OP_V(FW_FCOE_LINK_CMD) | |
844 | FW_CMD_REQUEST | | 844 | FW_CMD_REQUEST_F | |
845 | FW_CMD_WRITE | | 845 | FW_CMD_WRITE_F | |
846 | FW_FCOE_LINK_CMD_PORTID(port_id))); | 846 | FW_FCOE_LINK_CMD_PORTID(port_id))); |
847 | cmdp->sub_opcode_fcfi = htonl( | 847 | cmdp->sub_opcode_fcfi = htonl( |
848 | FW_FCOE_LINK_CMD_SUB_OPCODE(sub_opcode) | | 848 | FW_FCOE_LINK_CMD_SUB_OPCODE(sub_opcode) | |
849 | FW_FCOE_LINK_CMD_FCFI(fcfi)); | 849 | FW_FCOE_LINK_CMD_FCFI(fcfi)); |
850 | cmdp->lstatus = link_status; | 850 | cmdp->lstatus = link_status; |
851 | cmdp->retval_len16 = htonl(FW_CMD_LEN16(sizeof(*cmdp) / 16)); | 851 | cmdp->retval_len16 = htonl(FW_CMD_LEN16_V(sizeof(*cmdp) / 16)); |
852 | 852 | ||
853 | } /* csio_write_fcoe_link_cond_init_mb */ | 853 | } /* csio_write_fcoe_link_cond_init_mb */ |
854 | 854 | ||
@@ -873,11 +873,11 @@ csio_fcoe_read_res_info_init_mb(struct csio_hw *hw, struct csio_mb *mbp, | |||
873 | 873 | ||
874 | CSIO_INIT_MBP(mbp, cmdp, mb_tmo, hw, cbfn, 1); | 874 | CSIO_INIT_MBP(mbp, cmdp, mb_tmo, hw, cbfn, 1); |
875 | 875 | ||
876 | cmdp->op_to_read = htonl((FW_CMD_OP(FW_FCOE_RES_INFO_CMD) | | 876 | cmdp->op_to_read = htonl((FW_CMD_OP_V(FW_FCOE_RES_INFO_CMD) | |
877 | FW_CMD_REQUEST | | 877 | FW_CMD_REQUEST_F | |
878 | FW_CMD_READ)); | 878 | FW_CMD_READ_F)); |
879 | 879 | ||
880 | cmdp->retval_len16 = htonl(FW_CMD_LEN16(sizeof(*cmdp) / 16)); | 880 | cmdp->retval_len16 = htonl(FW_CMD_LEN16_V(sizeof(*cmdp) / 16)); |
881 | 881 | ||
882 | } /* csio_fcoe_read_res_info_init_mb */ | 882 | } /* csio_fcoe_read_res_info_init_mb */ |
883 | 883 | ||
@@ -908,13 +908,13 @@ csio_fcoe_vnp_alloc_init_mb(struct csio_lnode *ln, struct csio_mb *mbp, | |||
908 | 908 | ||
909 | CSIO_INIT_MBP(mbp, cmdp, mb_tmo, ln, cbfn, 1); | 909 | CSIO_INIT_MBP(mbp, cmdp, mb_tmo, ln, cbfn, 1); |
910 | 910 | ||
911 | cmdp->op_to_fcfi = htonl((FW_CMD_OP(FW_FCOE_VNP_CMD) | | 911 | cmdp->op_to_fcfi = htonl((FW_CMD_OP_V(FW_FCOE_VNP_CMD) | |
912 | FW_CMD_REQUEST | | 912 | FW_CMD_REQUEST_F | |
913 | FW_CMD_EXEC | | 913 | FW_CMD_EXEC_F | |
914 | FW_FCOE_VNP_CMD_FCFI(fcfi))); | 914 | FW_FCOE_VNP_CMD_FCFI(fcfi))); |
915 | 915 | ||
916 | cmdp->alloc_to_len16 = htonl(FW_FCOE_VNP_CMD_ALLOC | | 916 | cmdp->alloc_to_len16 = htonl(FW_FCOE_VNP_CMD_ALLOC | |
917 | FW_CMD_LEN16(sizeof(*cmdp) / 16)); | 917 | FW_CMD_LEN16_V(sizeof(*cmdp) / 16)); |
918 | 918 | ||
919 | cmdp->gen_wwn_to_vnpi = htonl(FW_FCOE_VNP_CMD_VNPI(vnpi)); | 919 | cmdp->gen_wwn_to_vnpi = htonl(FW_FCOE_VNP_CMD_VNPI(vnpi)); |
920 | 920 | ||
@@ -948,11 +948,11 @@ csio_fcoe_vnp_read_init_mb(struct csio_lnode *ln, struct csio_mb *mbp, | |||
948 | (struct fw_fcoe_vnp_cmd *)(mbp->mb); | 948 | (struct fw_fcoe_vnp_cmd *)(mbp->mb); |
949 | 949 | ||
950 | CSIO_INIT_MBP(mbp, cmdp, mb_tmo, ln, cbfn, 1); | 950 | CSIO_INIT_MBP(mbp, cmdp, mb_tmo, ln, cbfn, 1); |
951 | cmdp->op_to_fcfi = htonl(FW_CMD_OP(FW_FCOE_VNP_CMD) | | 951 | cmdp->op_to_fcfi = htonl(FW_CMD_OP_V(FW_FCOE_VNP_CMD) | |
952 | FW_CMD_REQUEST | | 952 | FW_CMD_REQUEST_F | |
953 | FW_CMD_READ | | 953 | FW_CMD_READ_F | |
954 | FW_FCOE_VNP_CMD_FCFI(fcfi)); | 954 | FW_FCOE_VNP_CMD_FCFI(fcfi)); |
955 | cmdp->alloc_to_len16 = htonl(FW_CMD_LEN16(sizeof(*cmdp) / 16)); | 955 | cmdp->alloc_to_len16 = htonl(FW_CMD_LEN16_V(sizeof(*cmdp) / 16)); |
956 | cmdp->gen_wwn_to_vnpi = htonl(FW_FCOE_VNP_CMD_VNPI(vnpi)); | 956 | cmdp->gen_wwn_to_vnpi = htonl(FW_FCOE_VNP_CMD_VNPI(vnpi)); |
957 | } | 957 | } |
958 | 958 | ||
@@ -978,12 +978,12 @@ csio_fcoe_vnp_free_init_mb(struct csio_lnode *ln, struct csio_mb *mbp, | |||
978 | 978 | ||
979 | CSIO_INIT_MBP(mbp, cmdp, mb_tmo, ln, cbfn, 1); | 979 | CSIO_INIT_MBP(mbp, cmdp, mb_tmo, ln, cbfn, 1); |
980 | 980 | ||
981 | cmdp->op_to_fcfi = htonl(FW_CMD_OP(FW_FCOE_VNP_CMD) | | 981 | cmdp->op_to_fcfi = htonl(FW_CMD_OP_V(FW_FCOE_VNP_CMD) | |
982 | FW_CMD_REQUEST | | 982 | FW_CMD_REQUEST_F | |
983 | FW_CMD_EXEC | | 983 | FW_CMD_EXEC_F | |
984 | FW_FCOE_VNP_CMD_FCFI(fcfi)); | 984 | FW_FCOE_VNP_CMD_FCFI(fcfi)); |
985 | cmdp->alloc_to_len16 = htonl(FW_FCOE_VNP_CMD_FREE | | 985 | cmdp->alloc_to_len16 = htonl(FW_FCOE_VNP_CMD_FREE | |
986 | FW_CMD_LEN16(sizeof(*cmdp) / 16)); | 986 | FW_CMD_LEN16_V(sizeof(*cmdp) / 16)); |
987 | cmdp->gen_wwn_to_vnpi = htonl(FW_FCOE_VNP_CMD_VNPI(vnpi)); | 987 | cmdp->gen_wwn_to_vnpi = htonl(FW_FCOE_VNP_CMD_VNPI(vnpi)); |
988 | } | 988 | } |
989 | 989 | ||
@@ -1009,11 +1009,11 @@ csio_fcoe_read_fcf_init_mb(struct csio_lnode *ln, struct csio_mb *mbp, | |||
1009 | 1009 | ||
1010 | CSIO_INIT_MBP(mbp, cmdp, mb_tmo, ln, cbfn, 1); | 1010 | CSIO_INIT_MBP(mbp, cmdp, mb_tmo, ln, cbfn, 1); |
1011 | 1011 | ||
1012 | cmdp->op_to_fcfi = htonl(FW_CMD_OP(FW_FCOE_FCF_CMD) | | 1012 | cmdp->op_to_fcfi = htonl(FW_CMD_OP_V(FW_FCOE_FCF_CMD) | |
1013 | FW_CMD_REQUEST | | 1013 | FW_CMD_REQUEST_F | |
1014 | FW_CMD_READ | | 1014 | FW_CMD_READ_F | |
1015 | FW_FCOE_FCF_CMD_FCFI(fcfi)); | 1015 | FW_FCOE_FCF_CMD_FCFI(fcfi)); |
1016 | cmdp->retval_len16 = htonl(FW_CMD_LEN16(sizeof(*cmdp) / 16)); | 1016 | cmdp->retval_len16 = htonl(FW_CMD_LEN16_V(sizeof(*cmdp) / 16)); |
1017 | 1017 | ||
1018 | } /* csio_fcoe_read_fcf_init_mb */ | 1018 | } /* csio_fcoe_read_fcf_init_mb */ |
1019 | 1019 | ||
@@ -1029,9 +1029,9 @@ csio_fcoe_read_portparams_init_mb(struct csio_hw *hw, struct csio_mb *mbp, | |||
1029 | CSIO_INIT_MBP(mbp, cmdp, mb_tmo, hw, cbfn, 1); | 1029 | CSIO_INIT_MBP(mbp, cmdp, mb_tmo, hw, cbfn, 1); |
1030 | mbp->mb_size = 64; | 1030 | mbp->mb_size = 64; |
1031 | 1031 | ||
1032 | cmdp->op_to_flowid = htonl(FW_CMD_OP(FW_FCOE_STATS_CMD) | | 1032 | cmdp->op_to_flowid = htonl(FW_CMD_OP_V(FW_FCOE_STATS_CMD) | |
1033 | FW_CMD_REQUEST | FW_CMD_READ); | 1033 | FW_CMD_REQUEST_F | FW_CMD_READ_F); |
1034 | cmdp->free_to_len16 = htonl(FW_CMD_LEN16(CSIO_MAX_MB_SIZE/16)); | 1034 | cmdp->free_to_len16 = htonl(FW_CMD_LEN16_V(CSIO_MAX_MB_SIZE/16)); |
1035 | 1035 | ||
1036 | cmdp->u.ctl.nstats_port = FW_FCOE_STATS_CMD_NSTATS(portparams->nstats) | | 1036 | cmdp->u.ctl.nstats_port = FW_FCOE_STATS_CMD_NSTATS(portparams->nstats) | |
1037 | FW_FCOE_STATS_CMD_PORT(portparams->portid); | 1037 | FW_FCOE_STATS_CMD_PORT(portparams->portid); |
@@ -1053,7 +1053,7 @@ csio_mb_process_portparams_rsp(struct csio_hw *hw, | |||
1053 | uint8_t *src; | 1053 | uint8_t *src; |
1054 | uint8_t *dst; | 1054 | uint8_t *dst; |
1055 | 1055 | ||
1056 | *retval = FW_CMD_RETVAL_GET(ntohl(rsp->free_to_len16)); | 1056 | *retval = FW_CMD_RETVAL_G(ntohl(rsp->free_to_len16)); |
1057 | 1057 | ||
1058 | memset(&stats, 0, sizeof(struct fw_fcoe_port_stats)); | 1058 | memset(&stats, 0, sizeof(struct fw_fcoe_port_stats)); |
1059 | 1059 | ||
@@ -1305,7 +1305,7 @@ csio_mb_issue(struct csio_hw *hw, struct csio_mb *mbp) | |||
1305 | hdr = cpu_to_be64(csio_rd_reg64(hw, data_reg)); | 1305 | hdr = cpu_to_be64(csio_rd_reg64(hw, data_reg)); |
1306 | fw_hdr = (struct fw_cmd_hdr *)&hdr; | 1306 | fw_hdr = (struct fw_cmd_hdr *)&hdr; |
1307 | 1307 | ||
1308 | switch (FW_CMD_OP_GET(ntohl(fw_hdr->hi))) { | 1308 | switch (FW_CMD_OP_G(ntohl(fw_hdr->hi))) { |
1309 | case FW_DEBUG_CMD: | 1309 | case FW_DEBUG_CMD: |
1310 | csio_mb_debug_cmd_handler(hw); | 1310 | csio_mb_debug_cmd_handler(hw); |
1311 | continue; | 1311 | continue; |
@@ -1498,7 +1498,7 @@ csio_mb_isr_handler(struct csio_hw *hw) | |||
1498 | hdr = cpu_to_be64(csio_rd_reg64(hw, data_reg)); | 1498 | hdr = cpu_to_be64(csio_rd_reg64(hw, data_reg)); |
1499 | fw_hdr = (struct fw_cmd_hdr *)&hdr; | 1499 | fw_hdr = (struct fw_cmd_hdr *)&hdr; |
1500 | 1500 | ||
1501 | switch (FW_CMD_OP_GET(ntohl(fw_hdr->hi))) { | 1501 | switch (FW_CMD_OP_G(ntohl(fw_hdr->hi))) { |
1502 | case FW_DEBUG_CMD: | 1502 | case FW_DEBUG_CMD: |
1503 | csio_mb_debug_cmd_handler(hw); | 1503 | csio_mb_debug_cmd_handler(hw); |
1504 | return -EINVAL; | 1504 | return -EINVAL; |
@@ -1571,11 +1571,11 @@ csio_mb_tmo_handler(struct csio_hw *hw) | |||
1571 | fw_hdr = (struct fw_cmd_hdr *)(mbp->mb); | 1571 | fw_hdr = (struct fw_cmd_hdr *)(mbp->mb); |
1572 | 1572 | ||
1573 | csio_dbg(hw, "Mailbox num:%x op:0x%x timed out\n", hw->pfn, | 1573 | csio_dbg(hw, "Mailbox num:%x op:0x%x timed out\n", hw->pfn, |
1574 | FW_CMD_OP_GET(ntohl(fw_hdr->hi))); | 1574 | FW_CMD_OP_G(ntohl(fw_hdr->hi))); |
1575 | 1575 | ||
1576 | mbm->mcurrent = NULL; | 1576 | mbm->mcurrent = NULL; |
1577 | CSIO_INC_STATS(mbm, n_tmo); | 1577 | CSIO_INC_STATS(mbm, n_tmo); |
1578 | fw_hdr->lo = htonl(FW_CMD_RETVAL(FW_ETIMEDOUT)); | 1578 | fw_hdr->lo = htonl(FW_CMD_RETVAL_V(FW_ETIMEDOUT)); |
1579 | 1579 | ||
1580 | return mbp; | 1580 | return mbp; |
1581 | } | 1581 | } |
@@ -1624,10 +1624,10 @@ csio_mb_cancel_all(struct csio_hw *hw, struct list_head *cbfn_q) | |||
1624 | hdr = (struct fw_cmd_hdr *)(mbp->mb); | 1624 | hdr = (struct fw_cmd_hdr *)(mbp->mb); |
1625 | 1625 | ||
1626 | csio_dbg(hw, "Cancelling pending mailbox num %x op:%x\n", | 1626 | csio_dbg(hw, "Cancelling pending mailbox num %x op:%x\n", |
1627 | hw->pfn, FW_CMD_OP_GET(ntohl(hdr->hi))); | 1627 | hw->pfn, FW_CMD_OP_G(ntohl(hdr->hi))); |
1628 | 1628 | ||
1629 | CSIO_INC_STATS(mbm, n_cancel); | 1629 | CSIO_INC_STATS(mbm, n_cancel); |
1630 | hdr->lo = htonl(FW_CMD_RETVAL(FW_HOSTERROR)); | 1630 | hdr->lo = htonl(FW_CMD_RETVAL_V(FW_HOSTERROR)); |
1631 | } | 1631 | } |
1632 | } | 1632 | } |
1633 | 1633 | ||
diff --git a/drivers/scsi/csiostor/csio_scsi.c b/drivers/scsi/csiostor/csio_scsi.c index 86103c8475d8..b37c69a2772a 100644 --- a/drivers/scsi/csiostor/csio_scsi.c +++ b/drivers/scsi/csiostor/csio_scsi.c | |||
@@ -230,10 +230,10 @@ csio_scsi_init_cmd_wr(struct csio_ioreq *req, void *addr, uint32_t size) | |||
230 | struct csio_dma_buf *dma_buf; | 230 | struct csio_dma_buf *dma_buf; |
231 | uint8_t imm = csio_hw_to_scsim(hw)->proto_cmd_len; | 231 | uint8_t imm = csio_hw_to_scsim(hw)->proto_cmd_len; |
232 | 232 | ||
233 | wr->op_immdlen = cpu_to_be32(FW_WR_OP(FW_SCSI_CMD_WR) | | 233 | wr->op_immdlen = cpu_to_be32(FW_WR_OP_V(FW_SCSI_CMD_WR) | |
234 | FW_SCSI_CMD_WR_IMMDLEN(imm)); | 234 | FW_SCSI_CMD_WR_IMMDLEN(imm)); |
235 | wr->flowid_len16 = cpu_to_be32(FW_WR_FLOWID(rn->flowid) | | 235 | wr->flowid_len16 = cpu_to_be32(FW_WR_FLOWID_V(rn->flowid) | |
236 | FW_WR_LEN16( | 236 | FW_WR_LEN16_V( |
237 | DIV_ROUND_UP(size, 16))); | 237 | DIV_ROUND_UP(size, 16))); |
238 | 238 | ||
239 | wr->cookie = (uintptr_t) req; | 239 | wr->cookie = (uintptr_t) req; |
@@ -391,10 +391,10 @@ csio_scsi_init_read_wr(struct csio_ioreq *req, void *wrp, uint32_t size) | |||
391 | uint8_t imm = csio_hw_to_scsim(hw)->proto_cmd_len; | 391 | uint8_t imm = csio_hw_to_scsim(hw)->proto_cmd_len; |
392 | struct scsi_cmnd *scmnd = csio_scsi_cmnd(req); | 392 | struct scsi_cmnd *scmnd = csio_scsi_cmnd(req); |
393 | 393 | ||
394 | wr->op_immdlen = cpu_to_be32(FW_WR_OP(FW_SCSI_READ_WR) | | 394 | wr->op_immdlen = cpu_to_be32(FW_WR_OP_V(FW_SCSI_READ_WR) | |
395 | FW_SCSI_READ_WR_IMMDLEN(imm)); | 395 | FW_SCSI_READ_WR_IMMDLEN(imm)); |
396 | wr->flowid_len16 = cpu_to_be32(FW_WR_FLOWID(rn->flowid) | | 396 | wr->flowid_len16 = cpu_to_be32(FW_WR_FLOWID_V(rn->flowid) | |
397 | FW_WR_LEN16(DIV_ROUND_UP(size, 16))); | 397 | FW_WR_LEN16_V(DIV_ROUND_UP(size, 16))); |
398 | wr->cookie = (uintptr_t)req; | 398 | wr->cookie = (uintptr_t)req; |
399 | wr->iqid = cpu_to_be16(csio_q_physiqid(hw, req->iq_idx)); | 399 | wr->iqid = cpu_to_be16(csio_q_physiqid(hw, req->iq_idx)); |
400 | wr->tmo_val = (uint8_t)(req->tmo); | 400 | wr->tmo_val = (uint8_t)(req->tmo); |
@@ -444,10 +444,10 @@ csio_scsi_init_write_wr(struct csio_ioreq *req, void *wrp, uint32_t size) | |||
444 | uint8_t imm = csio_hw_to_scsim(hw)->proto_cmd_len; | 444 | uint8_t imm = csio_hw_to_scsim(hw)->proto_cmd_len; |
445 | struct scsi_cmnd *scmnd = csio_scsi_cmnd(req); | 445 | struct scsi_cmnd *scmnd = csio_scsi_cmnd(req); |
446 | 446 | ||
447 | wr->op_immdlen = cpu_to_be32(FW_WR_OP(FW_SCSI_WRITE_WR) | | 447 | wr->op_immdlen = cpu_to_be32(FW_WR_OP_V(FW_SCSI_WRITE_WR) | |
448 | FW_SCSI_WRITE_WR_IMMDLEN(imm)); | 448 | FW_SCSI_WRITE_WR_IMMDLEN(imm)); |
449 | wr->flowid_len16 = cpu_to_be32(FW_WR_FLOWID(rn->flowid) | | 449 | wr->flowid_len16 = cpu_to_be32(FW_WR_FLOWID_V(rn->flowid) | |
450 | FW_WR_LEN16(DIV_ROUND_UP(size, 16))); | 450 | FW_WR_LEN16_V(DIV_ROUND_UP(size, 16))); |
451 | wr->cookie = (uintptr_t)req; | 451 | wr->cookie = (uintptr_t)req; |
452 | wr->iqid = cpu_to_be16(csio_q_physiqid(hw, req->iq_idx)); | 452 | wr->iqid = cpu_to_be16(csio_q_physiqid(hw, req->iq_idx)); |
453 | wr->tmo_val = (uint8_t)(req->tmo); | 453 | wr->tmo_val = (uint8_t)(req->tmo); |
@@ -674,9 +674,9 @@ csio_scsi_init_abrt_cls_wr(struct csio_ioreq *req, void *addr, uint32_t size, | |||
674 | struct csio_rnode *rn = req->rnode; | 674 | struct csio_rnode *rn = req->rnode; |
675 | struct fw_scsi_abrt_cls_wr *wr = (struct fw_scsi_abrt_cls_wr *)addr; | 675 | struct fw_scsi_abrt_cls_wr *wr = (struct fw_scsi_abrt_cls_wr *)addr; |
676 | 676 | ||
677 | wr->op_immdlen = cpu_to_be32(FW_WR_OP(FW_SCSI_ABRT_CLS_WR)); | 677 | wr->op_immdlen = cpu_to_be32(FW_WR_OP_V(FW_SCSI_ABRT_CLS_WR)); |
678 | wr->flowid_len16 = cpu_to_be32(FW_WR_FLOWID(rn->flowid) | | 678 | wr->flowid_len16 = cpu_to_be32(FW_WR_FLOWID_V(rn->flowid) | |
679 | FW_WR_LEN16( | 679 | FW_WR_LEN16_V( |
680 | DIV_ROUND_UP(size, 16))); | 680 | DIV_ROUND_UP(size, 16))); |
681 | 681 | ||
682 | wr->cookie = (uintptr_t) req; | 682 | wr->cookie = (uintptr_t) req; |
diff --git a/drivers/scsi/csiostor/csio_wr.h b/drivers/scsi/csiostor/csio_wr.h index 8d30e7ac1f5e..0c0dd9a658cc 100644 --- a/drivers/scsi/csiostor/csio_wr.h +++ b/drivers/scsi/csiostor/csio_wr.h | |||
@@ -101,7 +101,7 @@ | |||
101 | 101 | ||
102 | /* WR status is at the same position as retval in a CMD header */ | 102 | /* WR status is at the same position as retval in a CMD header */ |
103 | #define csio_wr_status(_wr) \ | 103 | #define csio_wr_status(_wr) \ |
104 | (FW_CMD_RETVAL_GET(ntohl(((struct fw_cmd_hdr *)(_wr))->lo))) | 104 | (FW_CMD_RETVAL_G(ntohl(((struct fw_cmd_hdr *)(_wr))->lo))) |
105 | 105 | ||
106 | struct csio_hw; | 106 | struct csio_hw; |
107 | 107 | ||
diff --git a/drivers/scsi/cxgbi/cxgb4i/cxgb4i.c b/drivers/scsi/cxgbi/cxgb4i/cxgb4i.c index 3e0a0d315f72..ccacf09c2c16 100644 --- a/drivers/scsi/cxgbi/cxgb4i/cxgb4i.c +++ b/drivers/scsi/cxgbi/cxgb4i/cxgb4i.c | |||
@@ -499,10 +499,10 @@ static inline void send_tx_flowc_wr(struct cxgbi_sock *csk) | |||
499 | skb = alloc_wr(flowclen, 0, GFP_ATOMIC); | 499 | skb = alloc_wr(flowclen, 0, GFP_ATOMIC); |
500 | flowc = (struct fw_flowc_wr *)skb->head; | 500 | flowc = (struct fw_flowc_wr *)skb->head; |
501 | flowc->op_to_nparams = | 501 | flowc->op_to_nparams = |
502 | htonl(FW_WR_OP(FW_FLOWC_WR) | FW_FLOWC_WR_NPARAMS(8)); | 502 | htonl(FW_WR_OP_V(FW_FLOWC_WR) | FW_FLOWC_WR_NPARAMS_V(8)); |
503 | flowc->flowid_len16 = | 503 | flowc->flowid_len16 = |
504 | htonl(FW_WR_LEN16(DIV_ROUND_UP(72, 16)) | | 504 | htonl(FW_WR_LEN16_V(DIV_ROUND_UP(72, 16)) | |
505 | FW_WR_FLOWID(csk->tid)); | 505 | FW_WR_FLOWID_V(csk->tid)); |
506 | flowc->mnemval[0].mnemonic = FW_FLOWC_MNEM_PFNVFN; | 506 | flowc->mnemval[0].mnemonic = FW_FLOWC_MNEM_PFNVFN; |
507 | flowc->mnemval[0].val = htonl(csk->cdev->pfvf); | 507 | flowc->mnemval[0].val = htonl(csk->cdev->pfvf); |
508 | flowc->mnemval[1].mnemonic = FW_FLOWC_MNEM_CH; | 508 | flowc->mnemval[1].mnemonic = FW_FLOWC_MNEM_CH; |
@@ -542,30 +542,31 @@ static inline void make_tx_data_wr(struct cxgbi_sock *csk, struct sk_buff *skb, | |||
542 | { | 542 | { |
543 | struct fw_ofld_tx_data_wr *req; | 543 | struct fw_ofld_tx_data_wr *req; |
544 | unsigned int submode = cxgbi_skcb_ulp_mode(skb) & 3; | 544 | unsigned int submode = cxgbi_skcb_ulp_mode(skb) & 3; |
545 | unsigned int wr_ulp_mode = 0; | 545 | unsigned int wr_ulp_mode = 0, val; |
546 | 546 | ||
547 | req = (struct fw_ofld_tx_data_wr *)__skb_push(skb, sizeof(*req)); | 547 | req = (struct fw_ofld_tx_data_wr *)__skb_push(skb, sizeof(*req)); |
548 | 548 | ||
549 | if (is_ofld_imm(skb)) { | 549 | if (is_ofld_imm(skb)) { |
550 | req->op_to_immdlen = htonl(FW_WR_OP(FW_OFLD_TX_DATA_WR) | | 550 | req->op_to_immdlen = htonl(FW_WR_OP_V(FW_OFLD_TX_DATA_WR) | |
551 | FW_WR_COMPL(1) | | 551 | FW_WR_COMPL_F | |
552 | FW_WR_IMMDLEN(dlen)); | 552 | FW_WR_IMMDLEN_V(dlen)); |
553 | req->flowid_len16 = htonl(FW_WR_FLOWID(csk->tid) | | 553 | req->flowid_len16 = htonl(FW_WR_FLOWID_V(csk->tid) | |
554 | FW_WR_LEN16(credits)); | 554 | FW_WR_LEN16_V(credits)); |
555 | } else { | 555 | } else { |
556 | req->op_to_immdlen = | 556 | req->op_to_immdlen = |
557 | cpu_to_be32(FW_WR_OP(FW_OFLD_TX_DATA_WR) | | 557 | cpu_to_be32(FW_WR_OP_V(FW_OFLD_TX_DATA_WR) | |
558 | FW_WR_COMPL(1) | | 558 | FW_WR_COMPL_F | |
559 | FW_WR_IMMDLEN(0)); | 559 | FW_WR_IMMDLEN_V(0)); |
560 | req->flowid_len16 = | 560 | req->flowid_len16 = |
561 | cpu_to_be32(FW_WR_FLOWID(csk->tid) | | 561 | cpu_to_be32(FW_WR_FLOWID_V(csk->tid) | |
562 | FW_WR_LEN16(credits)); | 562 | FW_WR_LEN16_V(credits)); |
563 | } | 563 | } |
564 | if (submode) | 564 | if (submode) |
565 | wr_ulp_mode = FW_OFLD_TX_DATA_WR_ULPMODE(ULP2_MODE_ISCSI) | | 565 | wr_ulp_mode = FW_OFLD_TX_DATA_WR_ULPMODE_V(ULP2_MODE_ISCSI) | |
566 | FW_OFLD_TX_DATA_WR_ULPSUBMODE(submode); | 566 | FW_OFLD_TX_DATA_WR_ULPSUBMODE_V(submode); |
567 | val = skb_peek(&csk->write_queue) ? 0 : 1; | ||
567 | req->tunnel_to_proxy = htonl(wr_ulp_mode | | 568 | req->tunnel_to_proxy = htonl(wr_ulp_mode | |
568 | FW_OFLD_TX_DATA_WR_SHOVE(skb_peek(&csk->write_queue) ? 0 : 1)); | 569 | FW_OFLD_TX_DATA_WR_SHOVE_V(val)); |
569 | req->plen = htonl(len); | 570 | req->plen = htonl(len); |
570 | if (!cxgbi_sock_flag(csk, CTPF_TX_DATA_SENT)) | 571 | if (!cxgbi_sock_flag(csk, CTPF_TX_DATA_SENT)) |
571 | cxgbi_sock_set_flag(csk, CTPF_TX_DATA_SENT); | 572 | cxgbi_sock_set_flag(csk, CTPF_TX_DATA_SENT); |