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-rw-r--r--arch/mips/include/asm/cpu-features.h3
-rw-r--r--arch/mips/math-emu/cp1emu.c8
2 files changed, 6 insertions, 5 deletions
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index e686131ff995..0d8208de9a3f 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -220,7 +220,8 @@
220#define cpu_has_mips_4_5_r (cpu_has_mips_4 | cpu_has_mips_5_r) 220#define cpu_has_mips_4_5_r (cpu_has_mips_4 | cpu_has_mips_5_r)
221#define cpu_has_mips_5_r (cpu_has_mips_5 | cpu_has_mips_r) 221#define cpu_has_mips_5_r (cpu_has_mips_5 | cpu_has_mips_r)
222 222
223#define cpu_has_mips_4_5_r2 (cpu_has_mips_4_5 | cpu_has_mips_r2) 223#define cpu_has_mips_4_5_r2_r6 (cpu_has_mips_4_5 | cpu_has_mips_r2 | \
224 cpu_has_mips_r6)
224 225
225#define cpu_has_mips32 (cpu_has_mips32r1 | cpu_has_mips32r2 | cpu_has_mips32r6) 226#define cpu_has_mips32 (cpu_has_mips32r1 | cpu_has_mips32r2 | cpu_has_mips32r6)
226#define cpu_has_mips64 (cpu_has_mips64r1 | cpu_has_mips64r2 | cpu_has_mips64r6) 227#define cpu_has_mips64 (cpu_has_mips64r1 | cpu_has_mips64r2 | cpu_has_mips64r6)
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index 3c341b08d120..b30bf65c7d7d 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -1561,14 +1561,14 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1561 * achieve full IEEE-754 accuracy - however this emulator does. 1561 * achieve full IEEE-754 accuracy - however this emulator does.
1562 */ 1562 */
1563 case frsqrt_op: 1563 case frsqrt_op:
1564 if (!cpu_has_mips_4_5_r2) 1564 if (!cpu_has_mips_4_5_r2_r6)
1565 return SIGILL; 1565 return SIGILL;
1566 1566
1567 handler.u = fpemu_sp_rsqrt; 1567 handler.u = fpemu_sp_rsqrt;
1568 goto scopuop; 1568 goto scopuop;
1569 1569
1570 case frecip_op: 1570 case frecip_op:
1571 if (!cpu_has_mips_4_5_r2) 1571 if (!cpu_has_mips_4_5_r2_r6)
1572 return SIGILL; 1572 return SIGILL;
1573 1573
1574 handler.u = fpemu_sp_recip; 1574 handler.u = fpemu_sp_recip;
@@ -1763,13 +1763,13 @@ copcsr:
1763 * achieve full IEEE-754 accuracy - however this emulator does. 1763 * achieve full IEEE-754 accuracy - however this emulator does.
1764 */ 1764 */
1765 case frsqrt_op: 1765 case frsqrt_op:
1766 if (!cpu_has_mips_4_5_r2) 1766 if (!cpu_has_mips_4_5_r2_r6)
1767 return SIGILL; 1767 return SIGILL;
1768 1768
1769 handler.u = fpemu_dp_rsqrt; 1769 handler.u = fpemu_dp_rsqrt;
1770 goto dcopuop; 1770 goto dcopuop;
1771 case frecip_op: 1771 case frecip_op:
1772 if (!cpu_has_mips_4_5_r2) 1772 if (!cpu_has_mips_4_5_r2_r6)
1773 return SIGILL; 1773 return SIGILL;
1774 1774
1775 handler.u = fpemu_dp_recip; 1775 handler.u = fpemu_dp_recip;