diff options
| -rw-r--r-- | arch/blackfin/mach-bf537/include/mach/defBF534.h | 622 | ||||
| -rw-r--r-- | arch/blackfin/mach-bf538/include/mach/defBF539.h | 621 | ||||
| -rw-r--r-- | arch/blackfin/mach-bf548/include/mach/defBF54x_base.h | 671 |
3 files changed, 0 insertions, 1914 deletions
diff --git a/arch/blackfin/mach-bf537/include/mach/defBF534.h b/arch/blackfin/mach-bf537/include/mach/defBF534.h index 066d5c261f47..cf396ea40092 100644 --- a/arch/blackfin/mach-bf537/include/mach/defBF534.h +++ b/arch/blackfin/mach-bf537/include/mach/defBF534.h | |||
| @@ -1702,628 +1702,6 @@ | |||
| 1702 | #define RCV_HALF 0x0004 /* Receive FIFO Has 1 Byte To Read */ | 1702 | #define RCV_HALF 0x0004 /* Receive FIFO Has 1 Byte To Read */ |
| 1703 | #define RCV_FULL 0x000C /* Receive FIFO Full (2 Bytes To Read) */ | 1703 | #define RCV_FULL 0x000C /* Receive FIFO Full (2 Bytes To Read) */ |
| 1704 | 1704 | ||
| 1705 | /* ************ CONTROLLER AREA NETWORK (CAN) MASKS ***************/ | ||
| 1706 | /* CAN_CONTROL Masks */ | ||
| 1707 | #define SRS 0x0001 /* Software Reset */ | ||
| 1708 | #define DNM 0x0002 /* Device Net Mode */ | ||
| 1709 | #define ABO 0x0004 /* Auto-Bus On Enable */ | ||
| 1710 | #define TXPRIO 0x0008 /* TX Priority (Priority/Mailbox*) */ | ||
| 1711 | #define WBA 0x0010 /* Wake-Up On CAN Bus Activity Enable */ | ||
| 1712 | #define SMR 0x0020 /* Sleep Mode Request */ | ||
| 1713 | #define CSR 0x0040 /* CAN Suspend Mode Request */ | ||
| 1714 | #define CCR 0x0080 /* CAN Configuration Mode Request */ | ||
| 1715 | |||
| 1716 | /* CAN_STATUS Masks */ | ||
| 1717 | #define WT 0x0001 /* TX Warning Flag */ | ||
| 1718 | #define WR 0x0002 /* RX Warning Flag */ | ||
| 1719 | #define EP 0x0004 /* Error Passive Mode */ | ||
| 1720 | #define EBO 0x0008 /* Error Bus Off Mode */ | ||
| 1721 | #define SMA 0x0020 /* Sleep Mode Acknowledge */ | ||
| 1722 | #define CSA 0x0040 /* Suspend Mode Acknowledge */ | ||
| 1723 | #define CCA 0x0080 /* Configuration Mode Acknowledge */ | ||
| 1724 | #define MBPTR 0x1F00 /* Mailbox Pointer */ | ||
| 1725 | #define TRM 0x4000 /* Transmit Mode */ | ||
| 1726 | #define REC 0x8000 /* Receive Mode */ | ||
| 1727 | |||
| 1728 | /* CAN_CLOCK Masks */ | ||
| 1729 | #define BRP 0x03FF /* Bit-Rate Pre-Scaler */ | ||
| 1730 | |||
| 1731 | /* CAN_TIMING Masks */ | ||
| 1732 | #define TSEG1 0x000F /* Time Segment 1 */ | ||
| 1733 | #define TSEG2 0x0070 /* Time Segment 2 */ | ||
| 1734 | #define SAM 0x0080 /* Sampling */ | ||
| 1735 | #define SJW 0x0300 /* Synchronization Jump Width */ | ||
| 1736 | |||
| 1737 | /* CAN_DEBUG Masks */ | ||
| 1738 | #define DEC 0x0001 /* Disable CAN Error Counters */ | ||
| 1739 | #define DRI 0x0002 /* Disable CAN RX Input */ | ||
| 1740 | #define DTO 0x0004 /* Disable CAN TX Output */ | ||
| 1741 | #define DIL 0x0008 /* Disable CAN Internal Loop */ | ||
| 1742 | #define MAA 0x0010 /* Mode Auto-Acknowledge Enable */ | ||
| 1743 | #define MRB 0x0020 /* Mode Read Back Enable */ | ||
| 1744 | #define CDE 0x8000 /* CAN Debug Enable */ | ||
| 1745 | |||
| 1746 | /* CAN_CEC Masks */ | ||
| 1747 | #define RXECNT 0x00FF /* Receive Error Counter */ | ||
| 1748 | #define TXECNT 0xFF00 /* Transmit Error Counter */ | ||
| 1749 | |||
| 1750 | /* CAN_INTR Masks */ | ||
| 1751 | #define MBRIRQ 0x0001 /* Mailbox Receive Interrupt */ | ||
| 1752 | #define MBRIF MBRIRQ /* legacy */ | ||
| 1753 | #define MBTIRQ 0x0002 /* Mailbox Transmit Interrupt */ | ||
| 1754 | #define MBTIF MBTIRQ /* legacy */ | ||
| 1755 | #define GIRQ 0x0004 /* Global Interrupt */ | ||
| 1756 | #define SMACK 0x0008 /* Sleep Mode Acknowledge */ | ||
| 1757 | #define CANTX 0x0040 /* CAN TX Bus Value */ | ||
| 1758 | #define CANRX 0x0080 /* CAN RX Bus Value */ | ||
| 1759 | |||
| 1760 | /* CAN_MBxx_ID1 and CAN_MBxx_ID0 Masks */ | ||
| 1761 | #define DFC 0xFFFF /* Data Filtering Code (If Enabled) (ID0) */ | ||
| 1762 | #define EXTID_LO 0xFFFF /* Lower 16 Bits of Extended Identifier (ID0) */ | ||
| 1763 | #define EXTID_HI 0x0003 /* Upper 2 Bits of Extended Identifier (ID1) */ | ||
| 1764 | #define BASEID 0x1FFC /* Base Identifier */ | ||
| 1765 | #define IDE 0x2000 /* Identifier Extension */ | ||
| 1766 | #define RTR 0x4000 /* Remote Frame Transmission Request */ | ||
| 1767 | #define AME 0x8000 /* Acceptance Mask Enable */ | ||
| 1768 | |||
| 1769 | /* CAN_MBxx_TIMESTAMP Masks */ | ||
| 1770 | #define TSV 0xFFFF /* Timestamp */ | ||
| 1771 | |||
| 1772 | /* CAN_MBxx_LENGTH Masks */ | ||
| 1773 | #define DLC 0x000F /* Data Length Code */ | ||
| 1774 | |||
| 1775 | /* CAN_AMxxH and CAN_AMxxL Masks */ | ||
| 1776 | #define DFM 0xFFFF /* Data Field Mask (If Enabled) (CAN_AMxxL) */ | ||
| 1777 | #define EXTID_LO 0xFFFF /* Lower 16 Bits of Extended Identifier (CAN_AMxxL) */ | ||
| 1778 | #define EXTID_HI 0x0003 /* Upper 2 Bits of Extended Identifier (CAN_AMxxH) */ | ||
| 1779 | #define BASEID 0x1FFC /* Base Identifier */ | ||
| 1780 | #define AMIDE 0x2000 /* Acceptance Mask ID Extension Enable */ | ||
| 1781 | #define FMD 0x4000 /* Full Mask Data Field Enable */ | ||
| 1782 | #define FDF 0x8000 /* Filter On Data Field Enable */ | ||
| 1783 | |||
| 1784 | /* CAN_MC1 Masks */ | ||
| 1785 | #define MC0 0x0001 /* Enable Mailbox 0 */ | ||
| 1786 | #define MC1 0x0002 /* Enable Mailbox 1 */ | ||
| 1787 | #define MC2 0x0004 /* Enable Mailbox 2 */ | ||
| 1788 | #define MC3 0x0008 /* Enable Mailbox 3 */ | ||
| 1789 | #define MC4 0x0010 /* Enable Mailbox 4 */ | ||
| 1790 | #define MC5 0x0020 /* Enable Mailbox 5 */ | ||
| 1791 | #define MC6 0x0040 /* Enable Mailbox 6 */ | ||
| 1792 | #define MC7 0x0080 /* Enable Mailbox 7 */ | ||
| 1793 | #define MC8 0x0100 /* Enable Mailbox 8 */ | ||
| 1794 | #define MC9 0x0200 /* Enable Mailbox 9 */ | ||
| 1795 | #define MC10 0x0400 /* Enable Mailbox 10 */ | ||
| 1796 | #define MC11 0x0800 /* Enable Mailbox 11 */ | ||
| 1797 | #define MC12 0x1000 /* Enable Mailbox 12 */ | ||
| 1798 | #define MC13 0x2000 /* Enable Mailbox 13 */ | ||
| 1799 | #define MC14 0x4000 /* Enable Mailbox 14 */ | ||
| 1800 | #define MC15 0x8000 /* Enable Mailbox 15 */ | ||
| 1801 | |||
| 1802 | /* CAN_MC2 Masks */ | ||
| 1803 | #define MC16 0x0001 /* Enable Mailbox 16 */ | ||
| 1804 | #define MC17 0x0002 /* Enable Mailbox 17 */ | ||
| 1805 | #define MC18 0x0004 /* Enable Mailbox 18 */ | ||
| 1806 | #define MC19 0x0008 /* Enable Mailbox 19 */ | ||
| 1807 | #define MC20 0x0010 /* Enable Mailbox 20 */ | ||
| 1808 | #define MC21 0x0020 /* Enable Mailbox 21 */ | ||
| 1809 | #define MC22 0x0040 /* Enable Mailbox 22 */ | ||
| 1810 | #define MC23 0x0080 /* Enable Mailbox 23 */ | ||
| 1811 | #define MC24 0x0100 /* Enable Mailbox 24 */ | ||
| 1812 | #define MC25 0x0200 /* Enable Mailbox 25 */ | ||
| 1813 | #define MC26 0x0400 /* Enable Mailbox 26 */ | ||
| 1814 | #define MC27 0x0800 /* Enable Mailbox 27 */ | ||
| 1815 | #define MC28 0x1000 /* Enable Mailbox 28 */ | ||
| 1816 | #define MC29 0x2000 /* Enable Mailbox 29 */ | ||
| 1817 | #define MC30 0x4000 /* Enable Mailbox 30 */ | ||
| 1818 | #define MC31 0x8000 /* Enable Mailbox 31 */ | ||
| 1819 | |||
| 1820 | /* CAN_MD1 Masks */ | ||
| 1821 | #define MD0 0x0001 /* Enable Mailbox 0 For Receive */ | ||
| 1822 | #define MD1 0x0002 /* Enable Mailbox 1 For Receive */ | ||
| 1823 | #define MD2 0x0004 /* Enable Mailbox 2 For Receive */ | ||
| 1824 | #define MD3 0x0008 /* Enable Mailbox 3 For Receive */ | ||
| 1825 | #define MD4 0x0010 /* Enable Mailbox 4 For Receive */ | ||
| 1826 | #define MD5 0x0020 /* Enable Mailbox 5 For Receive */ | ||
| 1827 | #define MD6 0x0040 /* Enable Mailbox 6 For Receive */ | ||
| 1828 | #define MD7 0x0080 /* Enable Mailbox 7 For Receive */ | ||
| 1829 | #define MD8 0x0100 /* Enable Mailbox 8 For Receive */ | ||
| 1830 | #define MD9 0x0200 /* Enable Mailbox 9 For Receive */ | ||
| 1831 | #define MD10 0x0400 /* Enable Mailbox 10 For Receive */ | ||
| 1832 | #define MD11 0x0800 /* Enable Mailbox 11 For Receive */ | ||
| 1833 | #define MD12 0x1000 /* Enable Mailbox 12 For Receive */ | ||
| 1834 | #define MD13 0x2000 /* Enable Mailbox 13 For Receive */ | ||
| 1835 | #define MD14 0x4000 /* Enable Mailbox 14 For Receive */ | ||
| 1836 | #define MD15 0x8000 /* Enable Mailbox 15 For Receive */ | ||
| 1837 | |||
| 1838 | /* CAN_MD2 Masks */ | ||
| 1839 | #define MD16 0x0001 /* Enable Mailbox 16 For Receive */ | ||
| 1840 | #define MD17 0x0002 /* Enable Mailbox 17 For Receive */ | ||
| 1841 | #define MD18 0x0004 /* Enable Mailbox 18 For Receive */ | ||
| 1842 | #define MD19 0x0008 /* Enable Mailbox 19 For Receive */ | ||
| 1843 | #define MD20 0x0010 /* Enable Mailbox 20 For Receive */ | ||
| 1844 | #define MD21 0x0020 /* Enable Mailbox 21 For Receive */ | ||
| 1845 | #define MD22 0x0040 /* Enable Mailbox 22 For Receive */ | ||
| 1846 | #define MD23 0x0080 /* Enable Mailbox 23 For Receive */ | ||
| 1847 | #define MD24 0x0100 /* Enable Mailbox 24 For Receive */ | ||
| 1848 | #define MD25 0x0200 /* Enable Mailbox 25 For Receive */ | ||
| 1849 | #define MD26 0x0400 /* Enable Mailbox 26 For Receive */ | ||
| 1850 | #define MD27 0x0800 /* Enable Mailbox 27 For Receive */ | ||
| 1851 | #define MD28 0x1000 /* Enable Mailbox 28 For Receive */ | ||
| 1852 | #define MD29 0x2000 /* Enable Mailbox 29 For Receive */ | ||
| 1853 | #define MD30 0x4000 /* Enable Mailbox 30 For Receive */ | ||
| 1854 | #define MD31 0x8000 /* Enable Mailbox 31 For Receive */ | ||
| 1855 | |||
| 1856 | /* CAN_RMP1 Masks */ | ||
| 1857 | #define RMP0 0x0001 /* RX Message Pending In Mailbox 0 */ | ||
| 1858 | #define RMP1 0x0002 /* RX Message Pending In Mailbox 1 */ | ||
| 1859 | #define RMP2 0x0004 /* RX Message Pending In Mailbox 2 */ | ||
| 1860 | #define RMP3 0x0008 /* RX Message Pending In Mailbox 3 */ | ||
| 1861 | #define RMP4 0x0010 /* RX Message Pending In Mailbox 4 */ | ||
| 1862 | #define RMP5 0x0020 /* RX Message Pending In Mailbox 5 */ | ||
| 1863 | #define RMP6 0x0040 /* RX Message Pending In Mailbox 6 */ | ||
| 1864 | #define RMP7 0x0080 /* RX Message Pending In Mailbox 7 */ | ||
| 1865 | #define RMP8 0x0100 /* RX Message Pending In Mailbox 8 */ | ||
| 1866 | #define RMP9 0x0200 /* RX Message Pending In Mailbox 9 */ | ||
| 1867 | #define RMP10 0x0400 /* RX Message Pending In Mailbox 10 */ | ||
| 1868 | #define RMP11 0x0800 /* RX Message Pending In Mailbox 11 */ | ||
| 1869 | #define RMP12 0x1000 /* RX Message Pending In Mailbox 12 */ | ||
| 1870 | #define RMP13 0x2000 /* RX Message Pending In Mailbox 13 */ | ||
| 1871 | #define RMP14 0x4000 /* RX Message Pending In Mailbox 14 */ | ||
| 1872 | #define RMP15 0x8000 /* RX Message Pending In Mailbox 15 */ | ||
| 1873 | |||
| 1874 | /* CAN_RMP2 Masks */ | ||
| 1875 | #define RMP16 0x0001 /* RX Message Pending In Mailbox 16 */ | ||
| 1876 | #define RMP17 0x0002 /* RX Message Pending In Mailbox 17 */ | ||
| 1877 | #define RMP18 0x0004 /* RX Message Pending In Mailbox 18 */ | ||
| 1878 | #define RMP19 0x0008 /* RX Message Pending In Mailbox 19 */ | ||
| 1879 | #define RMP20 0x0010 /* RX Message Pending In Mailbox 20 */ | ||
| 1880 | #define RMP21 0x0020 /* RX Message Pending In Mailbox 21 */ | ||
| 1881 | #define RMP22 0x0040 /* RX Message Pending In Mailbox 22 */ | ||
| 1882 | #define RMP23 0x0080 /* RX Message Pending In Mailbox 23 */ | ||
| 1883 | #define RMP24 0x0100 /* RX Message Pending In Mailbox 24 */ | ||
| 1884 | #define RMP25 0x0200 /* RX Message Pending In Mailbox 25 */ | ||
| 1885 | #define RMP26 0x0400 /* RX Message Pending In Mailbox 26 */ | ||
| 1886 | #define RMP27 0x0800 /* RX Message Pending In Mailbox 27 */ | ||
| 1887 | #define RMP28 0x1000 /* RX Message Pending In Mailbox 28 */ | ||
| 1888 | #define RMP29 0x2000 /* RX Message Pending In Mailbox 29 */ | ||
| 1889 | #define RMP30 0x4000 /* RX Message Pending In Mailbox 30 */ | ||
| 1890 | #define RMP31 0x8000 /* RX Message Pending In Mailbox 31 */ | ||
| 1891 | |||
| 1892 | /* CAN_RML1 Masks */ | ||
| 1893 | #define RML0 0x0001 /* RX Message Lost In Mailbox 0 */ | ||
| 1894 | #define RML1 0x0002 /* RX Message Lost In Mailbox 1 */ | ||
| 1895 | #define RML2 0x0004 /* RX Message Lost In Mailbox 2 */ | ||
| 1896 | #define RML3 0x0008 /* RX Message Lost In Mailbox 3 */ | ||
| 1897 | #define RML4 0x0010 /* RX Message Lost In Mailbox 4 */ | ||
| 1898 | #define RML5 0x0020 /* RX Message Lost In Mailbox 5 */ | ||
| 1899 | #define RML6 0x0040 /* RX Message Lost In Mailbox 6 */ | ||
| 1900 | #define RML7 0x0080 /* RX Message Lost In Mailbox 7 */ | ||
| 1901 | #define RML8 0x0100 /* RX Message Lost In Mailbox 8 */ | ||
| 1902 | #define RML9 0x0200 /* RX Message Lost In Mailbox 9 */ | ||
| 1903 | #define RML10 0x0400 /* RX Message Lost In Mailbox 10 */ | ||
| 1904 | #define RML11 0x0800 /* RX Message Lost In Mailbox 11 */ | ||
| 1905 | #define RML12 0x1000 /* RX Message Lost In Mailbox 12 */ | ||
| 1906 | #define RML13 0x2000 /* RX Message Lost In Mailbox 13 */ | ||
| 1907 | #define RML14 0x4000 /* RX Message Lost In Mailbox 14 */ | ||
| 1908 | #define RML15 0x8000 /* RX Message Lost In Mailbox 15 */ | ||
| 1909 | |||
| 1910 | /* CAN_RML2 Masks */ | ||
| 1911 | #define RML16 0x0001 /* RX Message Lost In Mailbox 16 */ | ||
| 1912 | #define RML17 0x0002 /* RX Message Lost In Mailbox 17 */ | ||
| 1913 | #define RML18 0x0004 /* RX Message Lost In Mailbox 18 */ | ||
| 1914 | #define RML19 0x0008 /* RX Message Lost In Mailbox 19 */ | ||
| 1915 | #define RML20 0x0010 /* RX Message Lost In Mailbox 20 */ | ||
| 1916 | #define RML21 0x0020 /* RX Message Lost In Mailbox 21 */ | ||
| 1917 | #define RML22 0x0040 /* RX Message Lost In Mailbox 22 */ | ||
| 1918 | #define RML23 0x0080 /* RX Message Lost In Mailbox 23 */ | ||
| 1919 | #define RML24 0x0100 /* RX Message Lost In Mailbox 24 */ | ||
| 1920 | #define RML25 0x0200 /* RX Message Lost In Mailbox 25 */ | ||
| 1921 | #define RML26 0x0400 /* RX Message Lost In Mailbox 26 */ | ||
| 1922 | #define RML27 0x0800 /* RX Message Lost In Mailbox 27 */ | ||
| 1923 | #define RML28 0x1000 /* RX Message Lost In Mailbox 28 */ | ||
| 1924 | #define RML29 0x2000 /* RX Message Lost In Mailbox 29 */ | ||
| 1925 | #define RML30 0x4000 /* RX Message Lost In Mailbox 30 */ | ||
| 1926 | #define RML31 0x8000 /* RX Message Lost In Mailbox 31 */ | ||
| 1927 | |||
| 1928 | /* CAN_OPSS1 Masks */ | ||
| 1929 | #define OPSS0 0x0001 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 0 */ | ||
| 1930 | #define OPSS1 0x0002 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 1 */ | ||
| 1931 | #define OPSS2 0x0004 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 2 */ | ||
| 1932 | #define OPSS3 0x0008 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 3 */ | ||
| 1933 | #define OPSS4 0x0010 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 4 */ | ||
| 1934 | #define OPSS5 0x0020 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 5 */ | ||
| 1935 | #define OPSS6 0x0040 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 6 */ | ||
| 1936 | #define OPSS7 0x0080 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 7 */ | ||
| 1937 | #define OPSS8 0x0100 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 8 */ | ||
| 1938 | #define OPSS9 0x0200 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 9 */ | ||
| 1939 | #define OPSS10 0x0400 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 10 */ | ||
| 1940 | #define OPSS11 0x0800 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 11 */ | ||
| 1941 | #define OPSS12 0x1000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 12 */ | ||
| 1942 | #define OPSS13 0x2000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 13 */ | ||
| 1943 | #define OPSS14 0x4000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 14 */ | ||
| 1944 | #define OPSS15 0x8000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 15 */ | ||
| 1945 | |||
| 1946 | /* CAN_OPSS2 Masks */ | ||
| 1947 | #define OPSS16 0x0001 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 16 */ | ||
| 1948 | #define OPSS17 0x0002 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 17 */ | ||
| 1949 | #define OPSS18 0x0004 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 18 */ | ||
| 1950 | #define OPSS19 0x0008 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 19 */ | ||
| 1951 | #define OPSS20 0x0010 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 20 */ | ||
| 1952 | #define OPSS21 0x0020 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 21 */ | ||
| 1953 | #define OPSS22 0x0040 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 22 */ | ||
| 1954 | #define OPSS23 0x0080 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 23 */ | ||
| 1955 | #define OPSS24 0x0100 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 24 */ | ||
| 1956 | #define OPSS25 0x0200 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 25 */ | ||
| 1957 | #define OPSS26 0x0400 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 26 */ | ||
| 1958 | #define OPSS27 0x0800 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 27 */ | ||
| 1959 | #define OPSS28 0x1000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 28 */ | ||
| 1960 | #define OPSS29 0x2000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 29 */ | ||
| 1961 | #define OPSS30 0x4000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 30 */ | ||
| 1962 | #define OPSS31 0x8000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 31 */ | ||
| 1963 | |||
| 1964 | /* CAN_TRR1 Masks */ | ||
| 1965 | #define TRR0 0x0001 /* Deny But Don't Lock Access To Mailbox 0 */ | ||
| 1966 | #define TRR1 0x0002 /* Deny But Don't Lock Access To Mailbox 1 */ | ||
| 1967 | #define TRR2 0x0004 /* Deny But Don't Lock Access To Mailbox 2 */ | ||
| 1968 | #define TRR3 0x0008 /* Deny But Don't Lock Access To Mailbox 3 */ | ||
| 1969 | #define TRR4 0x0010 /* Deny But Don't Lock Access To Mailbox 4 */ | ||
| 1970 | #define TRR5 0x0020 /* Deny But Don't Lock Access To Mailbox 5 */ | ||
| 1971 | #define TRR6 0x0040 /* Deny But Don't Lock Access To Mailbox 6 */ | ||
| 1972 | #define TRR7 0x0080 /* Deny But Don't Lock Access To Mailbox 7 */ | ||
| 1973 | #define TRR8 0x0100 /* Deny But Don't Lock Access To Mailbox 8 */ | ||
| 1974 | #define TRR9 0x0200 /* Deny But Don't Lock Access To Mailbox 9 */ | ||
| 1975 | #define TRR10 0x0400 /* Deny But Don't Lock Access To Mailbox 10 */ | ||
| 1976 | #define TRR11 0x0800 /* Deny But Don't Lock Access To Mailbox 11 */ | ||
| 1977 | #define TRR12 0x1000 /* Deny But Don't Lock Access To Mailbox 12 */ | ||
| 1978 | #define TRR13 0x2000 /* Deny But Don't Lock Access To Mailbox 13 */ | ||
| 1979 | #define TRR14 0x4000 /* Deny But Don't Lock Access To Mailbox 14 */ | ||
| 1980 | #define TRR15 0x8000 /* Deny But Don't Lock Access To Mailbox 15 */ | ||
| 1981 | |||
| 1982 | /* CAN_TRR2 Masks */ | ||
| 1983 | #define TRR16 0x0001 /* Deny But Don't Lock Access To Mailbox 16 */ | ||
| 1984 | #define TRR17 0x0002 /* Deny But Don't Lock Access To Mailbox 17 */ | ||
| 1985 | #define TRR18 0x0004 /* Deny But Don't Lock Access To Mailbox 18 */ | ||
| 1986 | #define TRR19 0x0008 /* Deny But Don't Lock Access To Mailbox 19 */ | ||
| 1987 | #define TRR20 0x0010 /* Deny But Don't Lock Access To Mailbox 20 */ | ||
| 1988 | #define TRR21 0x0020 /* Deny But Don't Lock Access To Mailbox 21 */ | ||
| 1989 | #define TRR22 0x0040 /* Deny But Don't Lock Access To Mailbox 22 */ | ||
| 1990 | #define TRR23 0x0080 /* Deny But Don't Lock Access To Mailbox 23 */ | ||
| 1991 | #define TRR24 0x0100 /* Deny But Don't Lock Access To Mailbox 24 */ | ||
| 1992 | #define TRR25 0x0200 /* Deny But Don't Lock Access To Mailbox 25 */ | ||
| 1993 | #define TRR26 0x0400 /* Deny But Don't Lock Access To Mailbox 26 */ | ||
| 1994 | #define TRR27 0x0800 /* Deny But Don't Lock Access To Mailbox 27 */ | ||
| 1995 | #define TRR28 0x1000 /* Deny But Don't Lock Access To Mailbox 28 */ | ||
| 1996 | #define TRR29 0x2000 /* Deny But Don't Lock Access To Mailbox 29 */ | ||
| 1997 | #define TRR30 0x4000 /* Deny But Don't Lock Access To Mailbox 30 */ | ||
| 1998 | #define TRR31 0x8000 /* Deny But Don't Lock Access To Mailbox 31 */ | ||
| 1999 | |||
| 2000 | /* CAN_TRS1 Masks */ | ||
| 2001 | #define TRS0 0x0001 /* Remote Frame Request For Mailbox 0 */ | ||
| 2002 | #define TRS1 0x0002 /* Remote Frame Request For Mailbox 1 */ | ||
| 2003 | #define TRS2 0x0004 /* Remote Frame Request For Mailbox 2 */ | ||
| 2004 | #define TRS3 0x0008 /* Remote Frame Request For Mailbox 3 */ | ||
| 2005 | #define TRS4 0x0010 /* Remote Frame Request For Mailbox 4 */ | ||
| 2006 | #define TRS5 0x0020 /* Remote Frame Request For Mailbox 5 */ | ||
| 2007 | #define TRS6 0x0040 /* Remote Frame Request For Mailbox 6 */ | ||
| 2008 | #define TRS7 0x0080 /* Remote Frame Request For Mailbox 7 */ | ||
| 2009 | #define TRS8 0x0100 /* Remote Frame Request For Mailbox 8 */ | ||
| 2010 | #define TRS9 0x0200 /* Remote Frame Request For Mailbox 9 */ | ||
| 2011 | #define TRS10 0x0400 /* Remote Frame Request For Mailbox 10 */ | ||
| 2012 | #define TRS11 0x0800 /* Remote Frame Request For Mailbox 11 */ | ||
| 2013 | #define TRS12 0x1000 /* Remote Frame Request For Mailbox 12 */ | ||
| 2014 | #define TRS13 0x2000 /* Remote Frame Request For Mailbox 13 */ | ||
| 2015 | #define TRS14 0x4000 /* Remote Frame Request For Mailbox 14 */ | ||
| 2016 | #define TRS15 0x8000 /* Remote Frame Request For Mailbox 15 */ | ||
| 2017 | |||
| 2018 | /* CAN_TRS2 Masks */ | ||
| 2019 | #define TRS16 0x0001 /* Remote Frame Request For Mailbox 16 */ | ||
| 2020 | #define TRS17 0x0002 /* Remote Frame Request For Mailbox 17 */ | ||
| 2021 | #define TRS18 0x0004 /* Remote Frame Request For Mailbox 18 */ | ||
| 2022 | #define TRS19 0x0008 /* Remote Frame Request For Mailbox 19 */ | ||
| 2023 | #define TRS20 0x0010 /* Remote Frame Request For Mailbox 20 */ | ||
| 2024 | #define TRS21 0x0020 /* Remote Frame Request For Mailbox 21 */ | ||
| 2025 | #define TRS22 0x0040 /* Remote Frame Request For Mailbox 22 */ | ||
| 2026 | #define TRS23 0x0080 /* Remote Frame Request For Mailbox 23 */ | ||
| 2027 | #define TRS24 0x0100 /* Remote Frame Request For Mailbox 24 */ | ||
| 2028 | #define TRS25 0x0200 /* Remote Frame Request For Mailbox 25 */ | ||
| 2029 | #define TRS26 0x0400 /* Remote Frame Request For Mailbox 26 */ | ||
| 2030 | #define TRS27 0x0800 /* Remote Frame Request For Mailbox 27 */ | ||
| 2031 | #define TRS28 0x1000 /* Remote Frame Request For Mailbox 28 */ | ||
| 2032 | #define TRS29 0x2000 /* Remote Frame Request For Mailbox 29 */ | ||
| 2033 | #define TRS30 0x4000 /* Remote Frame Request For Mailbox 30 */ | ||
| 2034 | #define TRS31 0x8000 /* Remote Frame Request For Mailbox 31 */ | ||
| 2035 | |||
| 2036 | /* CAN_AA1 Masks */ | ||
| 2037 | #define AA0 0x0001 /* Aborted Message In Mailbox 0 */ | ||
| 2038 | #define AA1 0x0002 /* Aborted Message In Mailbox 1 */ | ||
| 2039 | #define AA2 0x0004 /* Aborted Message In Mailbox 2 */ | ||
| 2040 | #define AA3 0x0008 /* Aborted Message In Mailbox 3 */ | ||
| 2041 | #define AA4 0x0010 /* Aborted Message In Mailbox 4 */ | ||
| 2042 | #define AA5 0x0020 /* Aborted Message In Mailbox 5 */ | ||
| 2043 | #define AA6 0x0040 /* Aborted Message In Mailbox 6 */ | ||
| 2044 | #define AA7 0x0080 /* Aborted Message In Mailbox 7 */ | ||
| 2045 | #define AA8 0x0100 /* Aborted Message In Mailbox 8 */ | ||
| 2046 | #define AA9 0x0200 /* Aborted Message In Mailbox 9 */ | ||
| 2047 | #define AA10 0x0400 /* Aborted Message In Mailbox 10 */ | ||
| 2048 | #define AA11 0x0800 /* Aborted Message In Mailbox 11 */ | ||
| 2049 | #define AA12 0x1000 /* Aborted Message In Mailbox 12 */ | ||
| 2050 | #define AA13 0x2000 /* Aborted Message In Mailbox 13 */ | ||
| 2051 | #define AA14 0x4000 /* Aborted Message In Mailbox 14 */ | ||
| 2052 | #define AA15 0x8000 /* Aborted Message In Mailbox 15 */ | ||
| 2053 | |||
| 2054 | /* CAN_AA2 Masks */ | ||
| 2055 | #define AA16 0x0001 /* Aborted Message In Mailbox 16 */ | ||
| 2056 | #define AA17 0x0002 /* Aborted Message In Mailbox 17 */ | ||
| 2057 | #define AA18 0x0004 /* Aborted Message In Mailbox 18 */ | ||
| 2058 | #define AA19 0x0008 /* Aborted Message In Mailbox 19 */ | ||
| 2059 | #define AA20 0x0010 /* Aborted Message In Mailbox 20 */ | ||
| 2060 | #define AA21 0x0020 /* Aborted Message In Mailbox 21 */ | ||
| 2061 | #define AA22 0x0040 /* Aborted Message In Mailbox 22 */ | ||
| 2062 | #define AA23 0x0080 /* Aborted Message In Mailbox 23 */ | ||
| 2063 | #define AA24 0x0100 /* Aborted Message In Mailbox 24 */ | ||
| 2064 | #define AA25 0x0200 /* Aborted Message In Mailbox 25 */ | ||
| 2065 | #define AA26 0x0400 /* Aborted Message In Mailbox 26 */ | ||
| 2066 | #define AA27 0x0800 /* Aborted Message In Mailbox 27 */ | ||
| 2067 | #define AA28 0x1000 /* Aborted Message In Mailbox 28 */ | ||
| 2068 | #define AA29 0x2000 /* Aborted Message In Mailbox 29 */ | ||
| 2069 | #define AA30 0x4000 /* Aborted Message In Mailbox 30 */ | ||
| 2070 | #define AA31 0x8000 /* Aborted Message In Mailbox 31 */ | ||
| 2071 | |||
| 2072 | /* CAN_TA1 Masks */ | ||
| 2073 | #define TA0 0x0001 /* Transmit Successful From Mailbox 0 */ | ||
| 2074 | #define TA1 0x0002 /* Transmit Successful From Mailbox 1 */ | ||
| 2075 | #define TA2 0x0004 /* Transmit Successful From Mailbox 2 */ | ||
| 2076 | #define TA3 0x0008 /* Transmit Successful From Mailbox 3 */ | ||
| 2077 | #define TA4 0x0010 /* Transmit Successful From Mailbox 4 */ | ||
| 2078 | #define TA5 0x0020 /* Transmit Successful From Mailbox 5 */ | ||
| 2079 | #define TA6 0x0040 /* Transmit Successful From Mailbox 6 */ | ||
| 2080 | #define TA7 0x0080 /* Transmit Successful From Mailbox 7 */ | ||
| 2081 | #define TA8 0x0100 /* Transmit Successful From Mailbox 8 */ | ||
| 2082 | #define TA9 0x0200 /* Transmit Successful From Mailbox 9 */ | ||
| 2083 | #define TA10 0x0400 /* Transmit Successful From Mailbox 10 */ | ||
| 2084 | #define TA11 0x0800 /* Transmit Successful From Mailbox 11 */ | ||
| 2085 | #define TA12 0x1000 /* Transmit Successful From Mailbox 12 */ | ||
| 2086 | #define TA13 0x2000 /* Transmit Successful From Mailbox 13 */ | ||
| 2087 | #define TA14 0x4000 /* Transmit Successful From Mailbox 14 */ | ||
| 2088 | #define TA15 0x8000 /* Transmit Successful From Mailbox 15 */ | ||
| 2089 | |||
| 2090 | /* CAN_TA2 Masks */ | ||
| 2091 | #define TA16 0x0001 /* Transmit Successful From Mailbox 16 */ | ||
| 2092 | #define TA17 0x0002 /* Transmit Successful From Mailbox 17 */ | ||
| 2093 | #define TA18 0x0004 /* Transmit Successful From Mailbox 18 */ | ||
| 2094 | #define TA19 0x0008 /* Transmit Successful From Mailbox 19 */ | ||
| 2095 | #define TA20 0x0010 /* Transmit Successful From Mailbox 20 */ | ||
| 2096 | #define TA21 0x0020 /* Transmit Successful From Mailbox 21 */ | ||
| 2097 | #define TA22 0x0040 /* Transmit Successful From Mailbox 22 */ | ||
| 2098 | #define TA23 0x0080 /* Transmit Successful From Mailbox 23 */ | ||
| 2099 | #define TA24 0x0100 /* Transmit Successful From Mailbox 24 */ | ||
| 2100 | #define TA25 0x0200 /* Transmit Successful From Mailbox 25 */ | ||
| 2101 | #define TA26 0x0400 /* Transmit Successful From Mailbox 26 */ | ||
| 2102 | #define TA27 0x0800 /* Transmit Successful From Mailbox 27 */ | ||
| 2103 | #define TA28 0x1000 /* Transmit Successful From Mailbox 28 */ | ||
| 2104 | #define TA29 0x2000 /* Transmit Successful From Mailbox 29 */ | ||
| 2105 | #define TA30 0x4000 /* Transmit Successful From Mailbox 30 */ | ||
| 2106 | #define TA31 0x8000 /* Transmit Successful From Mailbox 31 */ | ||
| 2107 | |||
| 2108 | /* CAN_MBTD Masks */ | ||
| 2109 | #define TDPTR 0x001F /* Mailbox To Temporarily Disable */ | ||
| 2110 | #define TDA 0x0040 /* Temporary Disable Acknowledge */ | ||
| 2111 | #define TDR 0x0080 /* Temporary Disable Request */ | ||
| 2112 | |||
| 2113 | /* CAN_RFH1 Masks */ | ||
| 2114 | #define RFH0 0x0001 /* Enable Automatic Remote Frame Handling For Mailbox 0 */ | ||
| 2115 | #define RFH1 0x0002 /* Enable Automatic Remote Frame Handling For Mailbox 1 */ | ||
| 2116 | #define RFH2 0x0004 /* Enable Automatic Remote Frame Handling For Mailbox 2 */ | ||
| 2117 | #define RFH3 0x0008 /* Enable Automatic Remote Frame Handling For Mailbox 3 */ | ||
| 2118 | #define RFH4 0x0010 /* Enable Automatic Remote Frame Handling For Mailbox 4 */ | ||
| 2119 | #define RFH5 0x0020 /* Enable Automatic Remote Frame Handling For Mailbox 5 */ | ||
| 2120 | #define RFH6 0x0040 /* Enable Automatic Remote Frame Handling For Mailbox 6 */ | ||
| 2121 | #define RFH7 0x0080 /* Enable Automatic Remote Frame Handling For Mailbox 7 */ | ||
| 2122 | #define RFH8 0x0100 /* Enable Automatic Remote Frame Handling For Mailbox 8 */ | ||
| 2123 | #define RFH9 0x0200 /* Enable Automatic Remote Frame Handling For Mailbox 9 */ | ||
| 2124 | #define RFH10 0x0400 /* Enable Automatic Remote Frame Handling For Mailbox 10 */ | ||
| 2125 | #define RFH11 0x0800 /* Enable Automatic Remote Frame Handling For Mailbox 11 */ | ||
| 2126 | #define RFH12 0x1000 /* Enable Automatic Remote Frame Handling For Mailbox 12 */ | ||
| 2127 | #define RFH13 0x2000 /* Enable Automatic Remote Frame Handling For Mailbox 13 */ | ||
| 2128 | #define RFH14 0x4000 /* Enable Automatic Remote Frame Handling For Mailbox 14 */ | ||
| 2129 | #define RFH15 0x8000 /* Enable Automatic Remote Frame Handling For Mailbox 15 */ | ||
| 2130 | |||
| 2131 | /* CAN_RFH2 Masks */ | ||
| 2132 | #define RFH16 0x0001 /* Enable Automatic Remote Frame Handling For Mailbox 16 */ | ||
| 2133 | #define RFH17 0x0002 /* Enable Automatic Remote Frame Handling For Mailbox 17 */ | ||
| 2134 | #define RFH18 0x0004 /* Enable Automatic Remote Frame Handling For Mailbox 18 */ | ||
| 2135 | #define RFH19 0x0008 /* Enable Automatic Remote Frame Handling For Mailbox 19 */ | ||
| 2136 | #define RFH20 0x0010 /* Enable Automatic Remote Frame Handling For Mailbox 20 */ | ||
| 2137 | #define RFH21 0x0020 /* Enable Automatic Remote Frame Handling For Mailbox 21 */ | ||
| 2138 | #define RFH22 0x0040 /* Enable Automatic Remote Frame Handling For Mailbox 22 */ | ||
| 2139 | #define RFH23 0x0080 /* Enable Automatic Remote Frame Handling For Mailbox 23 */ | ||
| 2140 | #define RFH24 0x0100 /* Enable Automatic Remote Frame Handling For Mailbox 24 */ | ||
| 2141 | #define RFH25 0x0200 /* Enable Automatic Remote Frame Handling For Mailbox 25 */ | ||
| 2142 | #define RFH26 0x0400 /* Enable Automatic Remote Frame Handling For Mailbox 26 */ | ||
| 2143 | #define RFH27 0x0800 /* Enable Automatic Remote Frame Handling For Mailbox 27 */ | ||
| 2144 | #define RFH28 0x1000 /* Enable Automatic Remote Frame Handling For Mailbox 28 */ | ||
| 2145 | #define RFH29 0x2000 /* Enable Automatic Remote Frame Handling For Mailbox 29 */ | ||
| 2146 | #define RFH30 0x4000 /* Enable Automatic Remote Frame Handling For Mailbox 30 */ | ||
| 2147 | #define RFH31 0x8000 /* Enable Automatic Remote Frame Handling For Mailbox 31 */ | ||
| 2148 | |||
| 2149 | /* CAN_MBTIF1 Masks */ | ||
| 2150 | #define MBTIF0 0x0001 /* TX Interrupt Active In Mailbox 0 */ | ||
| 2151 | #define MBTIF1 0x0002 /* TX Interrupt Active In Mailbox 1 */ | ||
| 2152 | #define MBTIF2 0x0004 /* TX Interrupt Active In Mailbox 2 */ | ||
| 2153 | #define MBTIF3 0x0008 /* TX Interrupt Active In Mailbox 3 */ | ||
| 2154 | #define MBTIF4 0x0010 /* TX Interrupt Active In Mailbox 4 */ | ||
| 2155 | #define MBTIF5 0x0020 /* TX Interrupt Active In Mailbox 5 */ | ||
| 2156 | #define MBTIF6 0x0040 /* TX Interrupt Active In Mailbox 6 */ | ||
| 2157 | #define MBTIF7 0x0080 /* TX Interrupt Active In Mailbox 7 */ | ||
| 2158 | #define MBTIF8 0x0100 /* TX Interrupt Active In Mailbox 8 */ | ||
| 2159 | #define MBTIF9 0x0200 /* TX Interrupt Active In Mailbox 9 */ | ||
| 2160 | #define MBTIF10 0x0400 /* TX Interrupt Active In Mailbox 10 */ | ||
| 2161 | #define MBTIF11 0x0800 /* TX Interrupt Active In Mailbox 11 */ | ||
| 2162 | #define MBTIF12 0x1000 /* TX Interrupt Active In Mailbox 12 */ | ||
| 2163 | #define MBTIF13 0x2000 /* TX Interrupt Active In Mailbox 13 */ | ||
| 2164 | #define MBTIF14 0x4000 /* TX Interrupt Active In Mailbox 14 */ | ||
| 2165 | #define MBTIF15 0x8000 /* TX Interrupt Active In Mailbox 15 */ | ||
| 2166 | |||
| 2167 | /* CAN_MBTIF2 Masks */ | ||
| 2168 | #define MBTIF16 0x0001 /* TX Interrupt Active In Mailbox 16 */ | ||
| 2169 | #define MBTIF17 0x0002 /* TX Interrupt Active In Mailbox 17 */ | ||
| 2170 | #define MBTIF18 0x0004 /* TX Interrupt Active In Mailbox 18 */ | ||
| 2171 | #define MBTIF19 0x0008 /* TX Interrupt Active In Mailbox 19 */ | ||
| 2172 | #define MBTIF20 0x0010 /* TX Interrupt Active In Mailbox 20 */ | ||
| 2173 | #define MBTIF21 0x0020 /* TX Interrupt Active In Mailbox 21 */ | ||
| 2174 | #define MBTIF22 0x0040 /* TX Interrupt Active In Mailbox 22 */ | ||
| 2175 | #define MBTIF23 0x0080 /* TX Interrupt Active In Mailbox 23 */ | ||
| 2176 | #define MBTIF24 0x0100 /* TX Interrupt Active In Mailbox 24 */ | ||
| 2177 | #define MBTIF25 0x0200 /* TX Interrupt Active In Mailbox 25 */ | ||
| 2178 | #define MBTIF26 0x0400 /* TX Interrupt Active In Mailbox 26 */ | ||
| 2179 | #define MBTIF27 0x0800 /* TX Interrupt Active In Mailbox 27 */ | ||
| 2180 | #define MBTIF28 0x1000 /* TX Interrupt Active In Mailbox 28 */ | ||
| 2181 | #define MBTIF29 0x2000 /* TX Interrupt Active In Mailbox 29 */ | ||
| 2182 | #define MBTIF30 0x4000 /* TX Interrupt Active In Mailbox 30 */ | ||
| 2183 | #define MBTIF31 0x8000 /* TX Interrupt Active In Mailbox 31 */ | ||
| 2184 | |||
| 2185 | /* CAN_MBRIF1 Masks */ | ||
| 2186 | #define MBRIF0 0x0001 /* RX Interrupt Active In Mailbox 0 */ | ||
| 2187 | #define MBRIF1 0x0002 /* RX Interrupt Active In Mailbox 1 */ | ||
| 2188 | #define MBRIF2 0x0004 /* RX Interrupt Active In Mailbox 2 */ | ||
| 2189 | #define MBRIF3 0x0008 /* RX Interrupt Active In Mailbox 3 */ | ||
| 2190 | #define MBRIF4 0x0010 /* RX Interrupt Active In Mailbox 4 */ | ||
| 2191 | #define MBRIF5 0x0020 /* RX Interrupt Active In Mailbox 5 */ | ||
| 2192 | #define MBRIF6 0x0040 /* RX Interrupt Active In Mailbox 6 */ | ||
| 2193 | #define MBRIF7 0x0080 /* RX Interrupt Active In Mailbox 7 */ | ||
| 2194 | #define MBRIF8 0x0100 /* RX Interrupt Active In Mailbox 8 */ | ||
| 2195 | #define MBRIF9 0x0200 /* RX Interrupt Active In Mailbox 9 */ | ||
| 2196 | #define MBRIF10 0x0400 /* RX Interrupt Active In Mailbox 10 */ | ||
| 2197 | #define MBRIF11 0x0800 /* RX Interrupt Active In Mailbox 11 */ | ||
| 2198 | #define MBRIF12 0x1000 /* RX Interrupt Active In Mailbox 12 */ | ||
| 2199 | #define MBRIF13 0x2000 /* RX Interrupt Active In Mailbox 13 */ | ||
| 2200 | #define MBRIF14 0x4000 /* RX Interrupt Active In Mailbox 14 */ | ||
| 2201 | #define MBRIF15 0x8000 /* RX Interrupt Active In Mailbox 15 */ | ||
| 2202 | |||
| 2203 | /* CAN_MBRIF2 Masks */ | ||
| 2204 | #define MBRIF16 0x0001 /* RX Interrupt Active In Mailbox 16 */ | ||
| 2205 | #define MBRIF17 0x0002 /* RX Interrupt Active In Mailbox 17 */ | ||
| 2206 | #define MBRIF18 0x0004 /* RX Interrupt Active In Mailbox 18 */ | ||
| 2207 | #define MBRIF19 0x0008 /* RX Interrupt Active In Mailbox 19 */ | ||
| 2208 | #define MBRIF20 0x0010 /* RX Interrupt Active In Mailbox 20 */ | ||
| 2209 | #define MBRIF21 0x0020 /* RX Interrupt Active In Mailbox 21 */ | ||
| 2210 | #define MBRIF22 0x0040 /* RX Interrupt Active In Mailbox 22 */ | ||
| 2211 | #define MBRIF23 0x0080 /* RX Interrupt Active In Mailbox 23 */ | ||
| 2212 | #define MBRIF24 0x0100 /* RX Interrupt Active In Mailbox 24 */ | ||
| 2213 | #define MBRIF25 0x0200 /* RX Interrupt Active In Mailbox 25 */ | ||
| 2214 | #define MBRIF26 0x0400 /* RX Interrupt Active In Mailbox 26 */ | ||
| 2215 | #define MBRIF27 0x0800 /* RX Interrupt Active In Mailbox 27 */ | ||
| 2216 | #define MBRIF28 0x1000 /* RX Interrupt Active In Mailbox 28 */ | ||
| 2217 | #define MBRIF29 0x2000 /* RX Interrupt Active In Mailbox 29 */ | ||
| 2218 | #define MBRIF30 0x4000 /* RX Interrupt Active In Mailbox 30 */ | ||
| 2219 | #define MBRIF31 0x8000 /* RX Interrupt Active In Mailbox 31 */ | ||
| 2220 | |||
| 2221 | /* CAN_MBIM1 Masks */ | ||
| 2222 | #define MBIM0 0x0001 /* Enable Interrupt For Mailbox 0 */ | ||
| 2223 | #define MBIM1 0x0002 /* Enable Interrupt For Mailbox 1 */ | ||
| 2224 | #define MBIM2 0x0004 /* Enable Interrupt For Mailbox 2 */ | ||
| 2225 | #define MBIM3 0x0008 /* Enable Interrupt For Mailbox 3 */ | ||
| 2226 | #define MBIM4 0x0010 /* Enable Interrupt For Mailbox 4 */ | ||
| 2227 | #define MBIM5 0x0020 /* Enable Interrupt For Mailbox 5 */ | ||
| 2228 | #define MBIM6 0x0040 /* Enable Interrupt For Mailbox 6 */ | ||
| 2229 | #define MBIM7 0x0080 /* Enable Interrupt For Mailbox 7 */ | ||
| 2230 | #define MBIM8 0x0100 /* Enable Interrupt For Mailbox 8 */ | ||
| 2231 | #define MBIM9 0x0200 /* Enable Interrupt For Mailbox 9 */ | ||
| 2232 | #define MBIM10 0x0400 /* Enable Interrupt For Mailbox 10 */ | ||
| 2233 | #define MBIM11 0x0800 /* Enable Interrupt For Mailbox 11 */ | ||
| 2234 | #define MBIM12 0x1000 /* Enable Interrupt For Mailbox 12 */ | ||
| 2235 | #define MBIM13 0x2000 /* Enable Interrupt For Mailbox 13 */ | ||
| 2236 | #define MBIM14 0x4000 /* Enable Interrupt For Mailbox 14 */ | ||
| 2237 | #define MBIM15 0x8000 /* Enable Interrupt For Mailbox 15 */ | ||
| 2238 | |||
| 2239 | /* CAN_MBIM2 Masks */ | ||
| 2240 | #define MBIM16 0x0001 /* Enable Interrupt For Mailbox 16 */ | ||
| 2241 | #define MBIM17 0x0002 /* Enable Interrupt For Mailbox 17 */ | ||
| 2242 | #define MBIM18 0x0004 /* Enable Interrupt For Mailbox 18 */ | ||
| 2243 | #define MBIM19 0x0008 /* Enable Interrupt For Mailbox 19 */ | ||
| 2244 | #define MBIM20 0x0010 /* Enable Interrupt For Mailbox 20 */ | ||
| 2245 | #define MBIM21 0x0020 /* Enable Interrupt For Mailbox 21 */ | ||
| 2246 | #define MBIM22 0x0040 /* Enable Interrupt For Mailbox 22 */ | ||
| 2247 | #define MBIM23 0x0080 /* Enable Interrupt For Mailbox 23 */ | ||
| 2248 | #define MBIM24 0x0100 /* Enable Interrupt For Mailbox 24 */ | ||
| 2249 | #define MBIM25 0x0200 /* Enable Interrupt For Mailbox 25 */ | ||
| 2250 | #define MBIM26 0x0400 /* Enable Interrupt For Mailbox 26 */ | ||
| 2251 | #define MBIM27 0x0800 /* Enable Interrupt For Mailbox 27 */ | ||
| 2252 | #define MBIM28 0x1000 /* Enable Interrupt For Mailbox 28 */ | ||
| 2253 | #define MBIM29 0x2000 /* Enable Interrupt For Mailbox 29 */ | ||
| 2254 | #define MBIM30 0x4000 /* Enable Interrupt For Mailbox 30 */ | ||
| 2255 | #define MBIM31 0x8000 /* Enable Interrupt For Mailbox 31 */ | ||
| 2256 | |||
| 2257 | /* CAN_GIM Masks */ | ||
| 2258 | #define EWTIM 0x0001 /* Enable TX Error Count Interrupt */ | ||
| 2259 | #define EWRIM 0x0002 /* Enable RX Error Count Interrupt */ | ||
| 2260 | #define EPIM 0x0004 /* Enable Error-Passive Mode Interrupt */ | ||
| 2261 | #define BOIM 0x0008 /* Enable Bus Off Interrupt */ | ||
| 2262 | #define WUIM 0x0010 /* Enable Wake-Up Interrupt */ | ||
| 2263 | #define UIAIM 0x0020 /* Enable Access To Unimplemented Address Interrupt */ | ||
| 2264 | #define AAIM 0x0040 /* Enable Abort Acknowledge Interrupt */ | ||
| 2265 | #define RMLIM 0x0080 /* Enable RX Message Lost Interrupt */ | ||
| 2266 | #define UCEIM 0x0100 /* Enable Universal Counter Overflow Interrupt */ | ||
| 2267 | #define EXTIM 0x0200 /* Enable External Trigger Output Interrupt */ | ||
| 2268 | #define ADIM 0x0400 /* Enable Access Denied Interrupt */ | ||
| 2269 | |||
| 2270 | /* CAN_GIS Masks */ | ||
| 2271 | #define EWTIS 0x0001 /* TX Error Count IRQ Status */ | ||
| 2272 | #define EWRIS 0x0002 /* RX Error Count IRQ Status */ | ||
| 2273 | #define EPIS 0x0004 /* Error-Passive Mode IRQ Status */ | ||
| 2274 | #define BOIS 0x0008 /* Bus Off IRQ Status */ | ||
| 2275 | #define WUIS 0x0010 /* Wake-Up IRQ Status */ | ||
| 2276 | #define UIAIS 0x0020 /* Access To Unimplemented Address IRQ Status */ | ||
| 2277 | #define AAIS 0x0040 /* Abort Acknowledge IRQ Status */ | ||
| 2278 | #define RMLIS 0x0080 /* RX Message Lost IRQ Status */ | ||
| 2279 | #define UCEIS 0x0100 /* Universal Counter Overflow IRQ Status */ | ||
| 2280 | #define EXTIS 0x0200 /* External Trigger Output IRQ Status */ | ||
| 2281 | #define ADIS 0x0400 /* Access Denied IRQ Status */ | ||
| 2282 | |||
| 2283 | /* CAN_GIF Masks */ | ||
| 2284 | #define EWTIF 0x0001 /* TX Error Count IRQ Flag */ | ||
| 2285 | #define EWRIF 0x0002 /* RX Error Count IRQ Flag */ | ||
| 2286 | #define EPIF 0x0004 /* Error-Passive Mode IRQ Flag */ | ||
| 2287 | #define BOIF 0x0008 /* Bus Off IRQ Flag */ | ||
| 2288 | #define WUIF 0x0010 /* Wake-Up IRQ Flag */ | ||
| 2289 | #define UIAIF 0x0020 /* Access To Unimplemented Address IRQ Flag */ | ||
| 2290 | #define AAIF 0x0040 /* Abort Acknowledge IRQ Flag */ | ||
| 2291 | #define RMLIF 0x0080 /* RX Message Lost IRQ Flag */ | ||
| 2292 | #define UCEIF 0x0100 /* Universal Counter Overflow IRQ Flag */ | ||
| 2293 | #define EXTIF 0x0200 /* External Trigger Output IRQ Flag */ | ||
| 2294 | #define ADIF 0x0400 /* Access Denied IRQ Flag */ | ||
| 2295 | |||
| 2296 | /* CAN_UCCNF Masks */ | ||
| 2297 | #define UCCNF 0x000F /* Universal Counter Mode */ | ||
| 2298 | #define UC_STAMP 0x0001 /* Timestamp Mode */ | ||
| 2299 | #define UC_WDOG 0x0002 /* Watchdog Mode */ | ||
| 2300 | #define UC_AUTOTX 0x0003 /* Auto-Transmit Mode */ | ||
| 2301 | #define UC_ERROR 0x0006 /* CAN Error Frame Count */ | ||
| 2302 | #define UC_OVER 0x0007 /* CAN Overload Frame Count */ | ||
| 2303 | #define UC_LOST 0x0008 /* Arbitration Lost During TX Count */ | ||
| 2304 | #define UC_AA 0x0009 /* TX Abort Count */ | ||
| 2305 | #define UC_TA 0x000A /* TX Successful Count */ | ||
| 2306 | #define UC_REJECT 0x000B /* RX Message Rejected Count */ | ||
| 2307 | #define UC_RML 0x000C /* RX Message Lost Count */ | ||
| 2308 | #define UC_RX 0x000D /* Total Successful RX Messages Count */ | ||
| 2309 | #define UC_RMP 0x000E /* Successful RX W/Matching ID Count */ | ||
| 2310 | #define UC_ALL 0x000F /* Correct Message On CAN Bus Line Count */ | ||
| 2311 | #define UCRC 0x0020 /* Universal Counter Reload/Clear */ | ||
| 2312 | #define UCCT 0x0040 /* Universal Counter CAN Trigger */ | ||
| 2313 | #define UCE 0x0080 /* Universal Counter Enable */ | ||
| 2314 | |||
| 2315 | /* CAN_ESR Masks */ | ||
| 2316 | #define ACKE 0x0004 /* Acknowledge Error */ | ||
| 2317 | #define SER 0x0008 /* Stuff Error */ | ||
| 2318 | #define CRCE 0x0010 /* CRC Error */ | ||
| 2319 | #define SA0 0x0020 /* Stuck At Dominant Error */ | ||
| 2320 | #define BEF 0x0040 /* Bit Error Flag */ | ||
| 2321 | #define FER 0x0080 /* Form Error Flag */ | ||
| 2322 | |||
| 2323 | /* CAN_EWR Masks */ | ||
| 2324 | #define EWLREC 0x00FF /* RX Error Count Limit (For EWRIS) */ | ||
| 2325 | #define EWLTEC 0xFF00 /* TX Error Count Limit (For EWTIS) */ | ||
| 2326 | |||
| 2327 | /* ******************* PIN CONTROL REGISTER MASKS ************************/ | 1705 | /* ******************* PIN CONTROL REGISTER MASKS ************************/ |
| 2328 | /* PORT_MUX Masks */ | 1706 | /* PORT_MUX Masks */ |
| 2329 | #define PJSE 0x0001 /* Port J SPI/SPORT Enable */ | 1707 | #define PJSE 0x0001 /* Port J SPI/SPORT Enable */ |
diff --git a/arch/blackfin/mach-bf538/include/mach/defBF539.h b/arch/blackfin/mach-bf538/include/mach/defBF539.h index fac563e6f62f..d7061d9f2a83 100644 --- a/arch/blackfin/mach-bf538/include/mach/defBF539.h +++ b/arch/blackfin/mach-bf538/include/mach/defBF539.h | |||
| @@ -2418,625 +2418,4 @@ | |||
| 2418 | #define RCV_HALF 0x0004 /* Receive FIFO Has 1 Byte To Read */ | 2418 | #define RCV_HALF 0x0004 /* Receive FIFO Has 1 Byte To Read */ |
| 2419 | #define RCV_FULL 0x000C /* Receive FIFO Full (2 Bytes To Read) */ | 2419 | #define RCV_FULL 0x000C /* Receive FIFO Full (2 Bytes To Read) */ |
| 2420 | 2420 | ||
| 2421 | |||
| 2422 | /* ************ CONTROLLER AREA NETWORK (CAN) MASKS ***************/ | ||
| 2423 | /* CAN_CONTROL Masks */ | ||
| 2424 | #define SRS 0x0001 /* Software Reset */ | ||
| 2425 | #define DNM 0x0002 /* Device Net Mode */ | ||
| 2426 | #define ABO 0x0004 /* Auto-Bus On Enable */ | ||
| 2427 | #define WBA 0x0010 /* Wake-Up On CAN Bus Activity Enable */ | ||
| 2428 | #define SMR 0x0020 /* Sleep Mode Request */ | ||
| 2429 | #define CSR 0x0040 /* CAN Suspend Mode Request */ | ||
| 2430 | #define CCR 0x0080 /* CAN Configuration Mode Request */ | ||
| 2431 | |||
| 2432 | /* CAN_STATUS Masks */ | ||
| 2433 | #define WT 0x0001 /* TX Warning Flag */ | ||
| 2434 | #define WR 0x0002 /* RX Warning Flag */ | ||
| 2435 | #define EP 0x0004 /* Error Passive Mode */ | ||
| 2436 | #define EBO 0x0008 /* Error Bus Off Mode */ | ||
| 2437 | #define CSA 0x0040 /* Suspend Mode Acknowledge */ | ||
| 2438 | #define CCA 0x0080 /* Configuration Mode Acknowledge */ | ||
| 2439 | #define MBPTR 0x1F00 /* Mailbox Pointer */ | ||
| 2440 | #define TRM 0x4000 /* Transmit Mode */ | ||
| 2441 | #define REC 0x8000 /* Receive Mode */ | ||
| 2442 | |||
| 2443 | /* CAN_CLOCK Masks */ | ||
| 2444 | #define BRP 0x03FF /* Bit-Rate Pre-Scaler */ | ||
| 2445 | |||
| 2446 | /* CAN_TIMING Masks */ | ||
| 2447 | #define TSEG1 0x000F /* Time Segment 1 */ | ||
| 2448 | #define TSEG2 0x0070 /* Time Segment 2 */ | ||
| 2449 | #define SAM 0x0080 /* Sampling */ | ||
| 2450 | #define SJW 0x0300 /* Synchronization Jump Width */ | ||
| 2451 | |||
| 2452 | /* CAN_DEBUG Masks */ | ||
| 2453 | #define DEC 0x0001 /* Disable CAN Error Counters */ | ||
| 2454 | #define DRI 0x0002 /* Disable CAN RX Input */ | ||
| 2455 | #define DTO 0x0004 /* Disable CAN TX Output */ | ||
| 2456 | #define DIL 0x0008 /* Disable CAN Internal Loop */ | ||
| 2457 | #define MAA 0x0010 /* Mode Auto-Acknowledge Enable */ | ||
| 2458 | #define MRB 0x0020 /* Mode Read Back Enable */ | ||
| 2459 | #define CDE 0x8000 /* CAN Debug Enable */ | ||
| 2460 | |||
| 2461 | /* CAN_CEC Masks */ | ||
| 2462 | #define RXECNT 0x00FF /* Receive Error Counter */ | ||
| 2463 | #define TXECNT 0xFF00 /* Transmit Error Counter */ | ||
| 2464 | |||
| 2465 | /* CAN_INTR Masks */ | ||
| 2466 | #define MBRIRQ 0x0001 /* Mailbox Receive Interrupt */ | ||
| 2467 | #define MBRIF MBRIRQ /* legacy */ | ||
| 2468 | #define MBTIRQ 0x0002 /* Mailbox Transmit Interrupt */ | ||
| 2469 | #define MBTIF MBTIRQ /* legacy */ | ||
| 2470 | #define GIRQ 0x0004 /* Global Interrupt */ | ||
| 2471 | #define SMACK 0x0008 /* Sleep Mode Acknowledge */ | ||
| 2472 | #define CANTX 0x0040 /* CAN TX Bus Value */ | ||
| 2473 | #define CANRX 0x0080 /* CAN RX Bus Value */ | ||
| 2474 | |||
| 2475 | /* CAN_MBxx_ID1 and CAN_MBxx_ID0 Masks */ | ||
| 2476 | #define DFC 0xFFFF /* Data Filtering Code (If Enabled) (ID0) */ | ||
| 2477 | #define EXTID_LO 0xFFFF /* Lower 16 Bits of Extended Identifier (ID0) */ | ||
| 2478 | #define EXTID_HI 0x0003 /* Upper 2 Bits of Extended Identifier (ID1) */ | ||
| 2479 | #define BASEID 0x1FFC /* Base Identifier */ | ||
| 2480 | #define IDE 0x2000 /* Identifier Extension */ | ||
| 2481 | #define RTR 0x4000 /* Remote Frame Transmission Request */ | ||
| 2482 | #define AME 0x8000 /* Acceptance Mask Enable */ | ||
| 2483 | |||
| 2484 | /* CAN_MBxx_TIMESTAMP Masks */ | ||
| 2485 | #define TSV 0xFFFF /* Timestamp */ | ||
| 2486 | |||
| 2487 | /* CAN_MBxx_LENGTH Masks */ | ||
| 2488 | #define DLC 0x000F /* Data Length Code */ | ||
| 2489 | |||
| 2490 | /* CAN_AMxxH and CAN_AMxxL Masks */ | ||
| 2491 | #define DFM 0xFFFF /* Data Field Mask (If Enabled) (CAN_AMxxL) */ | ||
| 2492 | #define EXTID_LO 0xFFFF /* Lower 16 Bits of Extended Identifier (CAN_AMxxL) */ | ||
| 2493 | #define EXTID_HI 0x0003 /* Upper 2 Bits of Extended Identifier (CAN_AMxxH) */ | ||
| 2494 | #define BASEID 0x1FFC /* Base Identifier */ | ||
| 2495 | #define AMIDE 0x2000 /* Acceptance Mask ID Extension Enable */ | ||
| 2496 | #define FMD 0x4000 /* Full Mask Data Field Enable */ | ||
| 2497 | #define FDF 0x8000 /* Filter On Data Field Enable */ | ||
| 2498 | |||
| 2499 | /* CAN_MC1 Masks */ | ||
| 2500 | #define MC0 0x0001 /* Enable Mailbox 0 */ | ||
| 2501 | #define MC1 0x0002 /* Enable Mailbox 1 */ | ||
| 2502 | #define MC2 0x0004 /* Enable Mailbox 2 */ | ||
| 2503 | #define MC3 0x0008 /* Enable Mailbox 3 */ | ||
| 2504 | #define MC4 0x0010 /* Enable Mailbox 4 */ | ||
| 2505 | #define MC5 0x0020 /* Enable Mailbox 5 */ | ||
| 2506 | #define MC6 0x0040 /* Enable Mailbox 6 */ | ||
| 2507 | #define MC7 0x0080 /* Enable Mailbox 7 */ | ||
| 2508 | #define MC8 0x0100 /* Enable Mailbox 8 */ | ||
| 2509 | #define MC9 0x0200 /* Enable Mailbox 9 */ | ||
| 2510 | #define MC10 0x0400 /* Enable Mailbox 10 */ | ||
| 2511 | #define MC11 0x0800 /* Enable Mailbox 11 */ | ||
| 2512 | #define MC12 0x1000 /* Enable Mailbox 12 */ | ||
| 2513 | #define MC13 0x2000 /* Enable Mailbox 13 */ | ||
| 2514 | #define MC14 0x4000 /* Enable Mailbox 14 */ | ||
| 2515 | #define MC15 0x8000 /* Enable Mailbox 15 */ | ||
| 2516 | |||
| 2517 | /* CAN_MC2 Masks */ | ||
| 2518 | #define MC16 0x0001 /* Enable Mailbox 16 */ | ||
| 2519 | #define MC17 0x0002 /* Enable Mailbox 17 */ | ||
| 2520 | #define MC18 0x0004 /* Enable Mailbox 18 */ | ||
| 2521 | #define MC19 0x0008 /* Enable Mailbox 19 */ | ||
| 2522 | #define MC20 0x0010 /* Enable Mailbox 20 */ | ||
| 2523 | #define MC21 0x0020 /* Enable Mailbox 21 */ | ||
| 2524 | #define MC22 0x0040 /* Enable Mailbox 22 */ | ||
| 2525 | #define MC23 0x0080 /* Enable Mailbox 23 */ | ||
| 2526 | #define MC24 0x0100 /* Enable Mailbox 24 */ | ||
| 2527 | #define MC25 0x0200 /* Enable Mailbox 25 */ | ||
| 2528 | #define MC26 0x0400 /* Enable Mailbox 26 */ | ||
| 2529 | #define MC27 0x0800 /* Enable Mailbox 27 */ | ||
| 2530 | #define MC28 0x1000 /* Enable Mailbox 28 */ | ||
| 2531 | #define MC29 0x2000 /* Enable Mailbox 29 */ | ||
| 2532 | #define MC30 0x4000 /* Enable Mailbox 30 */ | ||
| 2533 | #define MC31 0x8000 /* Enable Mailbox 31 */ | ||
| 2534 | |||
| 2535 | /* CAN_MD1 Masks */ | ||
| 2536 | #define MD0 0x0001 /* Enable Mailbox 0 For Receive */ | ||
| 2537 | #define MD1 0x0002 /* Enable Mailbox 1 For Receive */ | ||
| 2538 | #define MD2 0x0004 /* Enable Mailbox 2 For Receive */ | ||
| 2539 | #define MD3 0x0008 /* Enable Mailbox 3 For Receive */ | ||
| 2540 | #define MD4 0x0010 /* Enable Mailbox 4 For Receive */ | ||
| 2541 | #define MD5 0x0020 /* Enable Mailbox 5 For Receive */ | ||
| 2542 | #define MD6 0x0040 /* Enable Mailbox 6 For Receive */ | ||
| 2543 | #define MD7 0x0080 /* Enable Mailbox 7 For Receive */ | ||
| 2544 | #define MD8 0x0100 /* Enable Mailbox 8 For Receive */ | ||
| 2545 | #define MD9 0x0200 /* Enable Mailbox 9 For Receive */ | ||
| 2546 | #define MD10 0x0400 /* Enable Mailbox 10 For Receive */ | ||
| 2547 | #define MD11 0x0800 /* Enable Mailbox 11 For Receive */ | ||
| 2548 | #define MD12 0x1000 /* Enable Mailbox 12 For Receive */ | ||
| 2549 | #define MD13 0x2000 /* Enable Mailbox 13 For Receive */ | ||
| 2550 | #define MD14 0x4000 /* Enable Mailbox 14 For Receive */ | ||
| 2551 | #define MD15 0x8000 /* Enable Mailbox 15 For Receive */ | ||
| 2552 | |||
| 2553 | /* CAN_MD2 Masks */ | ||
| 2554 | #define MD16 0x0001 /* Enable Mailbox 16 For Receive */ | ||
| 2555 | #define MD17 0x0002 /* Enable Mailbox 17 For Receive */ | ||
| 2556 | #define MD18 0x0004 /* Enable Mailbox 18 For Receive */ | ||
| 2557 | #define MD19 0x0008 /* Enable Mailbox 19 For Receive */ | ||
| 2558 | #define MD20 0x0010 /* Enable Mailbox 20 For Receive */ | ||
| 2559 | #define MD21 0x0020 /* Enable Mailbox 21 For Receive */ | ||
| 2560 | #define MD22 0x0040 /* Enable Mailbox 22 For Receive */ | ||
| 2561 | #define MD23 0x0080 /* Enable Mailbox 23 For Receive */ | ||
| 2562 | #define MD24 0x0100 /* Enable Mailbox 24 For Receive */ | ||
| 2563 | #define MD25 0x0200 /* Enable Mailbox 25 For Receive */ | ||
| 2564 | #define MD26 0x0400 /* Enable Mailbox 26 For Receive */ | ||
| 2565 | #define MD27 0x0800 /* Enable Mailbox 27 For Receive */ | ||
| 2566 | #define MD28 0x1000 /* Enable Mailbox 28 For Receive */ | ||
| 2567 | #define MD29 0x2000 /* Enable Mailbox 29 For Receive */ | ||
| 2568 | #define MD30 0x4000 /* Enable Mailbox 30 For Receive */ | ||
| 2569 | #define MD31 0x8000 /* Enable Mailbox 31 For Receive */ | ||
| 2570 | |||
| 2571 | /* CAN_RMP1 Masks */ | ||
| 2572 | #define RMP0 0x0001 /* RX Message Pending In Mailbox 0 */ | ||
| 2573 | #define RMP1 0x0002 /* RX Message Pending In Mailbox 1 */ | ||
| 2574 | #define RMP2 0x0004 /* RX Message Pending In Mailbox 2 */ | ||
| 2575 | #define RMP3 0x0008 /* RX Message Pending In Mailbox 3 */ | ||
| 2576 | #define RMP4 0x0010 /* RX Message Pending In Mailbox 4 */ | ||
| 2577 | #define RMP5 0x0020 /* RX Message Pending In Mailbox 5 */ | ||
| 2578 | #define RMP6 0x0040 /* RX Message Pending In Mailbox 6 */ | ||
| 2579 | #define RMP7 0x0080 /* RX Message Pending In Mailbox 7 */ | ||
| 2580 | #define RMP8 0x0100 /* RX Message Pending In Mailbox 8 */ | ||
| 2581 | #define RMP9 0x0200 /* RX Message Pending In Mailbox 9 */ | ||
| 2582 | #define RMP10 0x0400 /* RX Message Pending In Mailbox 10 */ | ||
| 2583 | #define RMP11 0x0800 /* RX Message Pending In Mailbox 11 */ | ||
| 2584 | #define RMP12 0x1000 /* RX Message Pending In Mailbox 12 */ | ||
| 2585 | #define RMP13 0x2000 /* RX Message Pending In Mailbox 13 */ | ||
| 2586 | #define RMP14 0x4000 /* RX Message Pending In Mailbox 14 */ | ||
| 2587 | #define RMP15 0x8000 /* RX Message Pending In Mailbox 15 */ | ||
| 2588 | |||
| 2589 | /* CAN_RMP2 Masks */ | ||
| 2590 | #define RMP16 0x0001 /* RX Message Pending In Mailbox 16 */ | ||
| 2591 | #define RMP17 0x0002 /* RX Message Pending In Mailbox 17 */ | ||
| 2592 | #define RMP18 0x0004 /* RX Message Pending In Mailbox 18 */ | ||
| 2593 | #define RMP19 0x0008 /* RX Message Pending In Mailbox 19 */ | ||
| 2594 | #define RMP20 0x0010 /* RX Message Pending In Mailbox 20 */ | ||
| 2595 | #define RMP21 0x0020 /* RX Message Pending In Mailbox 21 */ | ||
| 2596 | #define RMP22 0x0040 /* RX Message Pending In Mailbox 22 */ | ||
| 2597 | #define RMP23 0x0080 /* RX Message Pending In Mailbox 23 */ | ||
| 2598 | #define RMP24 0x0100 /* RX Message Pending In Mailbox 24 */ | ||
| 2599 | #define RMP25 0x0200 /* RX Message Pending In Mailbox 25 */ | ||
| 2600 | #define RMP26 0x0400 /* RX Message Pending In Mailbox 26 */ | ||
| 2601 | #define RMP27 0x0800 /* RX Message Pending In Mailbox 27 */ | ||
| 2602 | #define RMP28 0x1000 /* RX Message Pending In Mailbox 28 */ | ||
| 2603 | #define RMP29 0x2000 /* RX Message Pending In Mailbox 29 */ | ||
| 2604 | #define RMP30 0x4000 /* RX Message Pending In Mailbox 30 */ | ||
| 2605 | #define RMP31 0x8000 /* RX Message Pending In Mailbox 31 */ | ||
| 2606 | |||
| 2607 | /* CAN_RML1 Masks */ | ||
| 2608 | #define RML0 0x0001 /* RX Message Lost In Mailbox 0 */ | ||
| 2609 | #define RML1 0x0002 /* RX Message Lost In Mailbox 1 */ | ||
| 2610 | #define RML2 0x0004 /* RX Message Lost In Mailbox 2 */ | ||
| 2611 | #define RML3 0x0008 /* RX Message Lost In Mailbox 3 */ | ||
| 2612 | #define RML4 0x0010 /* RX Message Lost In Mailbox 4 */ | ||
| 2613 | #define RML5 0x0020 /* RX Message Lost In Mailbox 5 */ | ||
| 2614 | #define RML6 0x0040 /* RX Message Lost In Mailbox 6 */ | ||
| 2615 | #define RML7 0x0080 /* RX Message Lost In Mailbox 7 */ | ||
| 2616 | #define RML8 0x0100 /* RX Message Lost In Mailbox 8 */ | ||
| 2617 | #define RML9 0x0200 /* RX Message Lost In Mailbox 9 */ | ||
| 2618 | #define RML10 0x0400 /* RX Message Lost In Mailbox 10 */ | ||
| 2619 | #define RML11 0x0800 /* RX Message Lost In Mailbox 11 */ | ||
| 2620 | #define RML12 0x1000 /* RX Message Lost In Mailbox 12 */ | ||
| 2621 | #define RML13 0x2000 /* RX Message Lost In Mailbox 13 */ | ||
| 2622 | #define RML14 0x4000 /* RX Message Lost In Mailbox 14 */ | ||
| 2623 | #define RML15 0x8000 /* RX Message Lost In Mailbox 15 */ | ||
| 2624 | |||
| 2625 | /* CAN_RML2 Masks */ | ||
| 2626 | #define RML16 0x0001 /* RX Message Lost In Mailbox 16 */ | ||
| 2627 | #define RML17 0x0002 /* RX Message Lost In Mailbox 17 */ | ||
| 2628 | #define RML18 0x0004 /* RX Message Lost In Mailbox 18 */ | ||
| 2629 | #define RML19 0x0008 /* RX Message Lost In Mailbox 19 */ | ||
| 2630 | #define RML20 0x0010 /* RX Message Lost In Mailbox 20 */ | ||
| 2631 | #define RML21 0x0020 /* RX Message Lost In Mailbox 21 */ | ||
| 2632 | #define RML22 0x0040 /* RX Message Lost In Mailbox 22 */ | ||
| 2633 | #define RML23 0x0080 /* RX Message Lost In Mailbox 23 */ | ||
| 2634 | #define RML24 0x0100 /* RX Message Lost In Mailbox 24 */ | ||
| 2635 | #define RML25 0x0200 /* RX Message Lost In Mailbox 25 */ | ||
| 2636 | #define RML26 0x0400 /* RX Message Lost In Mailbox 26 */ | ||
| 2637 | #define RML27 0x0800 /* RX Message Lost In Mailbox 27 */ | ||
| 2638 | #define RML28 0x1000 /* RX Message Lost In Mailbox 28 */ | ||
| 2639 | #define RML29 0x2000 /* RX Message Lost In Mailbox 29 */ | ||
| 2640 | #define RML30 0x4000 /* RX Message Lost In Mailbox 30 */ | ||
| 2641 | #define RML31 0x8000 /* RX Message Lost In Mailbox 31 */ | ||
| 2642 | |||
| 2643 | /* CAN_OPSS1 Masks */ | ||
| 2644 | #define OPSS0 0x0001 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 0 */ | ||
| 2645 | #define OPSS1 0x0002 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 1 */ | ||
| 2646 | #define OPSS2 0x0004 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 2 */ | ||
| 2647 | #define OPSS3 0x0008 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 3 */ | ||
| 2648 | #define OPSS4 0x0010 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 4 */ | ||
| 2649 | #define OPSS5 0x0020 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 5 */ | ||
| 2650 | #define OPSS6 0x0040 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 6 */ | ||
| 2651 | #define OPSS7 0x0080 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 7 */ | ||
| 2652 | #define OPSS8 0x0100 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 8 */ | ||
| 2653 | #define OPSS9 0x0200 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 9 */ | ||
| 2654 | #define OPSS10 0x0400 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 10 */ | ||
| 2655 | #define OPSS11 0x0800 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 11 */ | ||
| 2656 | #define OPSS12 0x1000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 12 */ | ||
| 2657 | #define OPSS13 0x2000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 13 */ | ||
| 2658 | #define OPSS14 0x4000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 14 */ | ||
| 2659 | #define OPSS15 0x8000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 15 */ | ||
| 2660 | |||
| 2661 | /* CAN_OPSS2 Masks */ | ||
| 2662 | #define OPSS16 0x0001 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 16 */ | ||
| 2663 | #define OPSS17 0x0002 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 17 */ | ||
| 2664 | #define OPSS18 0x0004 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 18 */ | ||
| 2665 | #define OPSS19 0x0008 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 19 */ | ||
| 2666 | #define OPSS20 0x0010 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 20 */ | ||
| 2667 | #define OPSS21 0x0020 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 21 */ | ||
| 2668 | #define OPSS22 0x0040 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 22 */ | ||
| 2669 | #define OPSS23 0x0080 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 23 */ | ||
| 2670 | #define OPSS24 0x0100 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 24 */ | ||
| 2671 | #define OPSS25 0x0200 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 25 */ | ||
| 2672 | #define OPSS26 0x0400 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 26 */ | ||
| 2673 | #define OPSS27 0x0800 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 27 */ | ||
| 2674 | #define OPSS28 0x1000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 28 */ | ||
| 2675 | #define OPSS29 0x2000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 29 */ | ||
| 2676 | #define OPSS30 0x4000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 30 */ | ||
| 2677 | #define OPSS31 0x8000 /* Enable RX Overwrite Protection or TX Single-Shot For Mailbox 31 */ | ||
| 2678 | |||
| 2679 | /* CAN_TRR1 Masks */ | ||
| 2680 | #define TRR0 0x0001 /* Deny But Don't Lock Access To Mailbox 0 */ | ||
| 2681 | #define TRR1 0x0002 /* Deny But Don't Lock Access To Mailbox 1 */ | ||
| 2682 | #define TRR2 0x0004 /* Deny But Don't Lock Access To Mailbox 2 */ | ||
| 2683 | #define TRR3 0x0008 /* Deny But Don't Lock Access To Mailbox 3 */ | ||
| 2684 | #define TRR4 0x0010 /* Deny But Don't Lock Access To Mailbox 4 */ | ||
| 2685 | #define TRR5 0x0020 /* Deny But Don't Lock Access To Mailbox 5 */ | ||
| 2686 | #define TRR6 0x0040 /* Deny But Don't Lock Access To Mailbox 6 */ | ||
| 2687 | #define TRR7 0x0080 /* Deny But Don't Lock Access To Mailbox 7 */ | ||
| 2688 | #define TRR8 0x0100 /* Deny But Don't Lock Access To Mailbox 8 */ | ||
| 2689 | #define TRR9 0x0200 /* Deny But Don't Lock Access To Mailbox 9 */ | ||
| 2690 | #define TRR10 0x0400 /* Deny But Don't Lock Access To Mailbox 10 */ | ||
| 2691 | #define TRR11 0x0800 /* Deny But Don't Lock Access To Mailbox 11 */ | ||
| 2692 | #define TRR12 0x1000 /* Deny But Don't Lock Access To Mailbox 12 */ | ||
| 2693 | #define TRR13 0x2000 /* Deny But Don't Lock Access To Mailbox 13 */ | ||
| 2694 | #define TRR14 0x4000 /* Deny But Don't Lock Access To Mailbox 14 */ | ||
| 2695 | #define TRR15 0x8000 /* Deny But Don't Lock Access To Mailbox 15 */ | ||
| 2696 | |||
| 2697 | /* CAN_TRR2 Masks */ | ||
| 2698 | #define TRR16 0x0001 /* Deny But Don't Lock Access To Mailbox 16 */ | ||
| 2699 | #define TRR17 0x0002 /* Deny But Don't Lock Access To Mailbox 17 */ | ||
| 2700 | #define TRR18 0x0004 /* Deny But Don't Lock Access To Mailbox 18 */ | ||
| 2701 | #define TRR19 0x0008 /* Deny But Don't Lock Access To Mailbox 19 */ | ||
| 2702 | #define TRR20 0x0010 /* Deny But Don't Lock Access To Mailbox 20 */ | ||
| 2703 | #define TRR21 0x0020 /* Deny But Don't Lock Access To Mailbox 21 */ | ||
| 2704 | #define TRR22 0x0040 /* Deny But Don't Lock Access To Mailbox 22 */ | ||
| 2705 | #define TRR23 0x0080 /* Deny But Don't Lock Access To Mailbox 23 */ | ||
| 2706 | #define TRR24 0x0100 /* Deny But Don't Lock Access To Mailbox 24 */ | ||
| 2707 | #define TRR25 0x0200 /* Deny But Don't Lock Access To Mailbox 25 */ | ||
| 2708 | #define TRR26 0x0400 /* Deny But Don't Lock Access To Mailbox 26 */ | ||
| 2709 | #define TRR27 0x0800 /* Deny But Don't Lock Access To Mailbox 27 */ | ||
| 2710 | #define TRR28 0x1000 /* Deny But Don't Lock Access To Mailbox 28 */ | ||
| 2711 | #define TRR29 0x2000 /* Deny But Don't Lock Access To Mailbox 29 */ | ||
| 2712 | #define TRR30 0x4000 /* Deny But Don't Lock Access To Mailbox 30 */ | ||
| 2713 | #define TRR31 0x8000 /* Deny But Don't Lock Access To Mailbox 31 */ | ||
| 2714 | |||
| 2715 | /* CAN_TRS1 Masks */ | ||
| 2716 | #define TRS0 0x0001 /* Remote Frame Request For Mailbox 0 */ | ||
| 2717 | #define TRS1 0x0002 /* Remote Frame Request For Mailbox 1 */ | ||
| 2718 | #define TRS2 0x0004 /* Remote Frame Request For Mailbox 2 */ | ||
| 2719 | #define TRS3 0x0008 /* Remote Frame Request For Mailbox 3 */ | ||
| 2720 | #define TRS4 0x0010 /* Remote Frame Request For Mailbox 4 */ | ||
| 2721 | #define TRS5 0x0020 /* Remote Frame Request For Mailbox 5 */ | ||
| 2722 | #define TRS6 0x0040 /* Remote Frame Request For Mailbox 6 */ | ||
| 2723 | #define TRS7 0x0080 /* Remote Frame Request For Mailbox 7 */ | ||
| 2724 | #define TRS8 0x0100 /* Remote Frame Request For Mailbox 8 */ | ||
| 2725 | #define TRS9 0x0200 /* Remote Frame Request For Mailbox 9 */ | ||
| 2726 | #define TRS10 0x0400 /* Remote Frame Request For Mailbox 10 */ | ||
| 2727 | #define TRS11 0x0800 /* Remote Frame Request For Mailbox 11 */ | ||
| 2728 | #define TRS12 0x1000 /* Remote Frame Request For Mailbox 12 */ | ||
| 2729 | #define TRS13 0x2000 /* Remote Frame Request For Mailbox 13 */ | ||
| 2730 | #define TRS14 0x4000 /* Remote Frame Request For Mailbox 14 */ | ||
| 2731 | #define TRS15 0x8000 /* Remote Frame Request For Mailbox 15 */ | ||
| 2732 | |||
| 2733 | /* CAN_TRS2 Masks */ | ||
| 2734 | #define TRS16 0x0001 /* Remote Frame Request For Mailbox 16 */ | ||
| 2735 | #define TRS17 0x0002 /* Remote Frame Request For Mailbox 17 */ | ||
| 2736 | #define TRS18 0x0004 /* Remote Frame Request For Mailbox 18 */ | ||
| 2737 | #define TRS19 0x0008 /* Remote Frame Request For Mailbox 19 */ | ||
| 2738 | #define TRS20 0x0010 /* Remote Frame Request For Mailbox 20 */ | ||
| 2739 | #define TRS21 0x0020 /* Remote Frame Request For Mailbox 21 */ | ||
| 2740 | #define TRS22 0x0040 /* Remote Frame Request For Mailbox 22 */ | ||
| 2741 | #define TRS23 0x0080 /* Remote Frame Request For Mailbox 23 */ | ||
| 2742 | #define TRS24 0x0100 /* Remote Frame Request For Mailbox 24 */ | ||
| 2743 | #define TRS25 0x0200 /* Remote Frame Request For Mailbox 25 */ | ||
| 2744 | #define TRS26 0x0400 /* Remote Frame Request For Mailbox 26 */ | ||
| 2745 | #define TRS27 0x0800 /* Remote Frame Request For Mailbox 27 */ | ||
| 2746 | #define TRS28 0x1000 /* Remote Frame Request For Mailbox 28 */ | ||
| 2747 | #define TRS29 0x2000 /* Remote Frame Request For Mailbox 29 */ | ||
| 2748 | #define TRS30 0x4000 /* Remote Frame Request For Mailbox 30 */ | ||
| 2749 | #define TRS31 0x8000 /* Remote Frame Request For Mailbox 31 */ | ||
| 2750 | |||
| 2751 | /* CAN_AA1 Masks */ | ||
| 2752 | #define AA0 0x0001 /* Aborted Message In Mailbox 0 */ | ||
| 2753 | #define AA1 0x0002 /* Aborted Message In Mailbox 1 */ | ||
| 2754 | #define AA2 0x0004 /* Aborted Message In Mailbox 2 */ | ||
| 2755 | #define AA3 0x0008 /* Aborted Message In Mailbox 3 */ | ||
| 2756 | #define AA4 0x0010 /* Aborted Message In Mailbox 4 */ | ||
| 2757 | #define AA5 0x0020 /* Aborted Message In Mailbox 5 */ | ||
| 2758 | #define AA6 0x0040 /* Aborted Message In Mailbox 6 */ | ||
| 2759 | #define AA7 0x0080 /* Aborted Message In Mailbox 7 */ | ||
| 2760 | #define AA8 0x0100 /* Aborted Message In Mailbox 8 */ | ||
| 2761 | #define AA9 0x0200 /* Aborted Message In Mailbox 9 */ | ||
| 2762 | #define AA10 0x0400 /* Aborted Message In Mailbox 10 */ | ||
| 2763 | #define AA11 0x0800 /* Aborted Message In Mailbox 11 */ | ||
| 2764 | #define AA12 0x1000 /* Aborted Message In Mailbox 12 */ | ||
| 2765 | #define AA13 0x2000 /* Aborted Message In Mailbox 13 */ | ||
| 2766 | #define AA14 0x4000 /* Aborted Message In Mailbox 14 */ | ||
| 2767 | #define AA15 0x8000 /* Aborted Message In Mailbox 15 */ | ||
| 2768 | |||
| 2769 | /* CAN_AA2 Masks */ | ||
| 2770 | #define AA16 0x0001 /* Aborted Message In Mailbox 16 */ | ||
| 2771 | #define AA17 0x0002 /* Aborted Message In Mailbox 17 */ | ||
| 2772 | #define AA18 0x0004 /* Aborted Message In Mailbox 18 */ | ||
| 2773 | #define AA19 0x0008 /* Aborted Message In Mailbox 19 */ | ||
| 2774 | #define AA20 0x0010 /* Aborted Message In Mailbox 20 */ | ||
| 2775 | #define AA21 0x0020 /* Aborted Message In Mailbox 21 */ | ||
| 2776 | #define AA22 0x0040 /* Aborted Message In Mailbox 22 */ | ||
| 2777 | #define AA23 0x0080 /* Aborted Message In Mailbox 23 */ | ||
| 2778 | #define AA24 0x0100 /* Aborted Message In Mailbox 24 */ | ||
| 2779 | #define AA25 0x0200 /* Aborted Message In Mailbox 25 */ | ||
| 2780 | #define AA26 0x0400 /* Aborted Message In Mailbox 26 */ | ||
| 2781 | #define AA27 0x0800 /* Aborted Message In Mailbox 27 */ | ||
| 2782 | #define AA28 0x1000 /* Aborted Message In Mailbox 28 */ | ||
| 2783 | #define AA29 0x2000 /* Aborted Message In Mailbox 29 */ | ||
| 2784 | #define AA30 0x4000 /* Aborted Message In Mailbox 30 */ | ||
| 2785 | #define AA31 0x8000 /* Aborted Message In Mailbox 31 */ | ||
| 2786 | |||
| 2787 | /* CAN_TA1 Masks */ | ||
| 2788 | #define TA0 0x0001 /* Transmit Successful From Mailbox 0 */ | ||
| 2789 | #define TA1 0x0002 /* Transmit Successful From Mailbox 1 */ | ||
| 2790 | #define TA2 0x0004 /* Transmit Successful From Mailbox 2 */ | ||
| 2791 | #define TA3 0x0008 /* Transmit Successful From Mailbox 3 */ | ||
| 2792 | #define TA4 0x0010 /* Transmit Successful From Mailbox 4 */ | ||
| 2793 | #define TA5 0x0020 /* Transmit Successful From Mailbox 5 */ | ||
| 2794 | #define TA6 0x0040 /* Transmit Successful From Mailbox 6 */ | ||
| 2795 | #define TA7 0x0080 /* Transmit Successful From Mailbox 7 */ | ||
| 2796 | #define TA8 0x0100 /* Transmit Successful From Mailbox 8 */ | ||
| 2797 | #define TA9 0x0200 /* Transmit Successful From Mailbox 9 */ | ||
| 2798 | #define TA10 0x0400 /* Transmit Successful From Mailbox 10 */ | ||
| 2799 | #define TA11 0x0800 /* Transmit Successful From Mailbox 11 */ | ||
| 2800 | #define TA12 0x1000 /* Transmit Successful From Mailbox 12 */ | ||
| 2801 | #define TA13 0x2000 /* Transmit Successful From Mailbox 13 */ | ||
| 2802 | #define TA14 0x4000 /* Transmit Successful From Mailbox 14 */ | ||
| 2803 | #define TA15 0x8000 /* Transmit Successful From Mailbox 15 */ | ||
| 2804 | |||
| 2805 | /* CAN_TA2 Masks */ | ||
| 2806 | #define TA16 0x0001 /* Transmit Successful From Mailbox 16 */ | ||
| 2807 | #define TA17 0x0002 /* Transmit Successful From Mailbox 17 */ | ||
| 2808 | #define TA18 0x0004 /* Transmit Successful From Mailbox 18 */ | ||
| 2809 | #define TA19 0x0008 /* Transmit Successful From Mailbox 19 */ | ||
| 2810 | #define TA20 0x0010 /* Transmit Successful From Mailbox 20 */ | ||
| 2811 | #define TA21 0x0020 /* Transmit Successful From Mailbox 21 */ | ||
| 2812 | #define TA22 0x0040 /* Transmit Successful From Mailbox 22 */ | ||
| 2813 | #define TA23 0x0080 /* Transmit Successful From Mailbox 23 */ | ||
| 2814 | #define TA24 0x0100 /* Transmit Successful From Mailbox 24 */ | ||
| 2815 | #define TA25 0x0200 /* Transmit Successful From Mailbox 25 */ | ||
| 2816 | #define TA26 0x0400 /* Transmit Successful From Mailbox 26 */ | ||
| 2817 | #define TA27 0x0800 /* Transmit Successful From Mailbox 27 */ | ||
| 2818 | #define TA28 0x1000 /* Transmit Successful From Mailbox 28 */ | ||
| 2819 | #define TA29 0x2000 /* Transmit Successful From Mailbox 29 */ | ||
| 2820 | #define TA30 0x4000 /* Transmit Successful From Mailbox 30 */ | ||
| 2821 | #define TA31 0x8000 /* Transmit Successful From Mailbox 31 */ | ||
| 2822 | |||
| 2823 | /* CAN_MBTD Masks */ | ||
| 2824 | #define TDPTR 0x001F /* Mailbox To Temporarily Disable */ | ||
| 2825 | #define TDA 0x0040 /* Temporary Disable Acknowledge */ | ||
| 2826 | #define TDR 0x0080 /* Temporary Disable Request */ | ||
| 2827 | |||
| 2828 | /* CAN_RFH1 Masks */ | ||
| 2829 | #define RFH0 0x0001 /* Enable Automatic Remote Frame Handling For Mailbox 0 */ | ||
| 2830 | #define RFH1 0x0002 /* Enable Automatic Remote Frame Handling For Mailbox 1 */ | ||
| 2831 | #define RFH2 0x0004 /* Enable Automatic Remote Frame Handling For Mailbox 2 */ | ||
| 2832 | #define RFH3 0x0008 /* Enable Automatic Remote Frame Handling For Mailbox 3 */ | ||
| 2833 | #define RFH4 0x0010 /* Enable Automatic Remote Frame Handling For Mailbox 4 */ | ||
| 2834 | #define RFH5 0x0020 /* Enable Automatic Remote Frame Handling For Mailbox 5 */ | ||
| 2835 | #define RFH6 0x0040 /* Enable Automatic Remote Frame Handling For Mailbox 6 */ | ||
| 2836 | #define RFH7 0x0080 /* Enable Automatic Remote Frame Handling For Mailbox 7 */ | ||
| 2837 | #define RFH8 0x0100 /* Enable Automatic Remote Frame Handling For Mailbox 8 */ | ||
| 2838 | #define RFH9 0x0200 /* Enable Automatic Remote Frame Handling For Mailbox 9 */ | ||
| 2839 | #define RFH10 0x0400 /* Enable Automatic Remote Frame Handling For Mailbox 10 */ | ||
| 2840 | #define RFH11 0x0800 /* Enable Automatic Remote Frame Handling For Mailbox 11 */ | ||
| 2841 | #define RFH12 0x1000 /* Enable Automatic Remote Frame Handling For Mailbox 12 */ | ||
| 2842 | #define RFH13 0x2000 /* Enable Automatic Remote Frame Handling For Mailbox 13 */ | ||
| 2843 | #define RFH14 0x4000 /* Enable Automatic Remote Frame Handling For Mailbox 14 */ | ||
| 2844 | #define RFH15 0x8000 /* Enable Automatic Remote Frame Handling For Mailbox 15 */ | ||
| 2845 | |||
| 2846 | /* CAN_RFH2 Masks */ | ||
| 2847 | #define RFH16 0x0001 /* Enable Automatic Remote Frame Handling For Mailbox 16 */ | ||
| 2848 | #define RFH17 0x0002 /* Enable Automatic Remote Frame Handling For Mailbox 17 */ | ||
| 2849 | #define RFH18 0x0004 /* Enable Automatic Remote Frame Handling For Mailbox 18 */ | ||
| 2850 | #define RFH19 0x0008 /* Enable Automatic Remote Frame Handling For Mailbox 19 */ | ||
| 2851 | #define RFH20 0x0010 /* Enable Automatic Remote Frame Handling For Mailbox 20 */ | ||
| 2852 | #define RFH21 0x0020 /* Enable Automatic Remote Frame Handling For Mailbox 21 */ | ||
| 2853 | #define RFH22 0x0040 /* Enable Automatic Remote Frame Handling For Mailbox 22 */ | ||
| 2854 | #define RFH23 0x0080 /* Enable Automatic Remote Frame Handling For Mailbox 23 */ | ||
| 2855 | #define RFH24 0x0100 /* Enable Automatic Remote Frame Handling For Mailbox 24 */ | ||
| 2856 | #define RFH25 0x0200 /* Enable Automatic Remote Frame Handling For Mailbox 25 */ | ||
| 2857 | #define RFH26 0x0400 /* Enable Automatic Remote Frame Handling For Mailbox 26 */ | ||
| 2858 | #define RFH27 0x0800 /* Enable Automatic Remote Frame Handling For Mailbox 27 */ | ||
| 2859 | #define RFH28 0x1000 /* Enable Automatic Remote Frame Handling For Mailbox 28 */ | ||
| 2860 | #define RFH29 0x2000 /* Enable Automatic Remote Frame Handling For Mailbox 29 */ | ||
| 2861 | #define RFH30 0x4000 /* Enable Automatic Remote Frame Handling For Mailbox 30 */ | ||
| 2862 | #define RFH31 0x8000 /* Enable Automatic Remote Frame Handling For Mailbox 31 */ | ||
| 2863 | |||
| 2864 | /* CAN_MBTIF1 Masks */ | ||
| 2865 | #define MBTIF0 0x0001 /* TX Interrupt Active In Mailbox 0 */ | ||
| 2866 | #define MBTIF1 0x0002 /* TX Interrupt Active In Mailbox 1 */ | ||
| 2867 | #define MBTIF2 0x0004 /* TX Interrupt Active In Mailbox 2 */ | ||
| 2868 | #define MBTIF3 0x0008 /* TX Interrupt Active In Mailbox 3 */ | ||
| 2869 | #define MBTIF4 0x0010 /* TX Interrupt Active In Mailbox 4 */ | ||
| 2870 | #define MBTIF5 0x0020 /* TX Interrupt Active In Mailbox 5 */ | ||
| 2871 | #define MBTIF6 0x0040 /* TX Interrupt Active In Mailbox 6 */ | ||
| 2872 | #define MBTIF7 0x0080 /* TX Interrupt Active In Mailbox 7 */ | ||
| 2873 | #define MBTIF8 0x0100 /* TX Interrupt Active In Mailbox 8 */ | ||
| 2874 | #define MBTIF9 0x0200 /* TX Interrupt Active In Mailbox 9 */ | ||
| 2875 | #define MBTIF10 0x0400 /* TX Interrupt Active In Mailbox 10 */ | ||
| 2876 | #define MBTIF11 0x0800 /* TX Interrupt Active In Mailbox 11 */ | ||
| 2877 | #define MBTIF12 0x1000 /* TX Interrupt Active In Mailbox 12 */ | ||
| 2878 | #define MBTIF13 0x2000 /* TX Interrupt Active In Mailbox 13 */ | ||
| 2879 | #define MBTIF14 0x4000 /* TX Interrupt Active In Mailbox 14 */ | ||
| 2880 | #define MBTIF15 0x8000 /* TX Interrupt Active In Mailbox 15 */ | ||
| 2881 | |||
| 2882 | /* CAN_MBTIF2 Masks */ | ||
| 2883 | #define MBTIF16 0x0001 /* TX Interrupt Active In Mailbox 16 */ | ||
| 2884 | #define MBTIF17 0x0002 /* TX Interrupt Active In Mailbox 17 */ | ||
| 2885 | #define MBTIF18 0x0004 /* TX Interrupt Active In Mailbox 18 */ | ||
| 2886 | #define MBTIF19 0x0008 /* TX Interrupt Active In Mailbox 19 */ | ||
| 2887 | #define MBTIF20 0x0010 /* TX Interrupt Active In Mailbox 20 */ | ||
| 2888 | #define MBTIF21 0x0020 /* TX Interrupt Active In Mailbox 21 */ | ||
| 2889 | #define MBTIF22 0x0040 /* TX Interrupt Active In Mailbox 22 */ | ||
| 2890 | #define MBTIF23 0x0080 /* TX Interrupt Active In Mailbox 23 */ | ||
| 2891 | #define MBTIF24 0x0100 /* TX Interrupt Active In Mailbox 24 */ | ||
| 2892 | #define MBTIF25 0x0200 /* TX Interrupt Active In Mailbox 25 */ | ||
| 2893 | #define MBTIF26 0x0400 /* TX Interrupt Active In Mailbox 26 */ | ||
| 2894 | #define MBTIF27 0x0800 /* TX Interrupt Active In Mailbox 27 */ | ||
| 2895 | #define MBTIF28 0x1000 /* TX Interrupt Active In Mailbox 28 */ | ||
| 2896 | #define MBTIF29 0x2000 /* TX Interrupt Active In Mailbox 29 */ | ||
| 2897 | #define MBTIF30 0x4000 /* TX Interrupt Active In Mailbox 30 */ | ||
| 2898 | #define MBTIF31 0x8000 /* TX Interrupt Active In Mailbox 31 */ | ||
| 2899 | |||
| 2900 | /* CAN_MBRIF1 Masks */ | ||
| 2901 | #define MBRIF0 0x0001 /* RX Interrupt Active In Mailbox 0 */ | ||
| 2902 | #define MBRIF1 0x0002 /* RX Interrupt Active In Mailbox 1 */ | ||
| 2903 | #define MBRIF2 0x0004 /* RX Interrupt Active In Mailbox 2 */ | ||
| 2904 | #define MBRIF3 0x0008 /* RX Interrupt Active In Mailbox 3 */ | ||
| 2905 | #define MBRIF4 0x0010 /* RX Interrupt Active In Mailbox 4 */ | ||
| 2906 | #define MBRIF5 0x0020 /* RX Interrupt Active In Mailbox 5 */ | ||
| 2907 | #define MBRIF6 0x0040 /* RX Interrupt Active In Mailbox 6 */ | ||
| 2908 | #define MBRIF7 0x0080 /* RX Interrupt Active In Mailbox 7 */ | ||
| 2909 | #define MBRIF8 0x0100 /* RX Interrupt Active In Mailbox 8 */ | ||
| 2910 | #define MBRIF9 0x0200 /* RX Interrupt Active In Mailbox 9 */ | ||
| 2911 | #define MBRIF10 0x0400 /* RX Interrupt Active In Mailbox 10 */ | ||
| 2912 | #define MBRIF11 0x0800 /* RX Interrupt Active In Mailbox 11 */ | ||
| 2913 | #define MBRIF12 0x1000 /* RX Interrupt Active In Mailbox 12 */ | ||
| 2914 | #define MBRIF13 0x2000 /* RX Interrupt Active In Mailbox 13 */ | ||
| 2915 | #define MBRIF14 0x4000 /* RX Interrupt Active In Mailbox 14 */ | ||
| 2916 | #define MBRIF15 0x8000 /* RX Interrupt Active In Mailbox 15 */ | ||
| 2917 | |||
| 2918 | /* CAN_MBRIF2 Masks */ | ||
| 2919 | #define MBRIF16 0x0001 /* RX Interrupt Active In Mailbox 16 */ | ||
| 2920 | #define MBRIF17 0x0002 /* RX Interrupt Active In Mailbox 17 */ | ||
| 2921 | #define MBRIF18 0x0004 /* RX Interrupt Active In Mailbox 18 */ | ||
| 2922 | #define MBRIF19 0x0008 /* RX Interrupt Active In Mailbox 19 */ | ||
| 2923 | #define MBRIF20 0x0010 /* RX Interrupt Active In Mailbox 20 */ | ||
| 2924 | #define MBRIF21 0x0020 /* RX Interrupt Active In Mailbox 21 */ | ||
| 2925 | #define MBRIF22 0x0040 /* RX Interrupt Active In Mailbox 22 */ | ||
| 2926 | #define MBRIF23 0x0080 /* RX Interrupt Active In Mailbox 23 */ | ||
| 2927 | #define MBRIF24 0x0100 /* RX Interrupt Active In Mailbox 24 */ | ||
| 2928 | #define MBRIF25 0x0200 /* RX Interrupt Active In Mailbox 25 */ | ||
| 2929 | #define MBRIF26 0x0400 /* RX Interrupt Active In Mailbox 26 */ | ||
| 2930 | #define MBRIF27 0x0800 /* RX Interrupt Active In Mailbox 27 */ | ||
| 2931 | #define MBRIF28 0x1000 /* RX Interrupt Active In Mailbox 28 */ | ||
| 2932 | #define MBRIF29 0x2000 /* RX Interrupt Active In Mailbox 29 */ | ||
| 2933 | #define MBRIF30 0x4000 /* RX Interrupt Active In Mailbox 30 */ | ||
| 2934 | #define MBRIF31 0x8000 /* RX Interrupt Active In Mailbox 31 */ | ||
| 2935 | |||
| 2936 | /* CAN_MBIM1 Masks */ | ||
| 2937 | #define MBIM0 0x0001 /* Enable Interrupt For Mailbox 0 */ | ||
| 2938 | #define MBIM1 0x0002 /* Enable Interrupt For Mailbox 1 */ | ||
| 2939 | #define MBIM2 0x0004 /* Enable Interrupt For Mailbox 2 */ | ||
| 2940 | #define MBIM3 0x0008 /* Enable Interrupt For Mailbox 3 */ | ||
| 2941 | #define MBIM4 0x0010 /* Enable Interrupt For Mailbox 4 */ | ||
| 2942 | #define MBIM5 0x0020 /* Enable Interrupt For Mailbox 5 */ | ||
| 2943 | #define MBIM6 0x0040 /* Enable Interrupt For Mailbox 6 */ | ||
| 2944 | #define MBIM7 0x0080 /* Enable Interrupt For Mailbox 7 */ | ||
| 2945 | #define MBIM8 0x0100 /* Enable Interrupt For Mailbox 8 */ | ||
| 2946 | #define MBIM9 0x0200 /* Enable Interrupt For Mailbox 9 */ | ||
| 2947 | #define MBIM10 0x0400 /* Enable Interrupt For Mailbox 10 */ | ||
| 2948 | #define MBIM11 0x0800 /* Enable Interrupt For Mailbox 11 */ | ||
| 2949 | #define MBIM12 0x1000 /* Enable Interrupt For Mailbox 12 */ | ||
| 2950 | #define MBIM13 0x2000 /* Enable Interrupt For Mailbox 13 */ | ||
| 2951 | #define MBIM14 0x4000 /* Enable Interrupt For Mailbox 14 */ | ||
| 2952 | #define MBIM15 0x8000 /* Enable Interrupt For Mailbox 15 */ | ||
| 2953 | |||
| 2954 | /* CAN_MBIM2 Masks */ | ||
| 2955 | #define MBIM16 0x0001 /* Enable Interrupt For Mailbox 16 */ | ||
| 2956 | #define MBIM17 0x0002 /* Enable Interrupt For Mailbox 17 */ | ||
| 2957 | #define MBIM18 0x0004 /* Enable Interrupt For Mailbox 18 */ | ||
| 2958 | #define MBIM19 0x0008 /* Enable Interrupt For Mailbox 19 */ | ||
| 2959 | #define MBIM20 0x0010 /* Enable Interrupt For Mailbox 20 */ | ||
| 2960 | #define MBIM21 0x0020 /* Enable Interrupt For Mailbox 21 */ | ||
| 2961 | #define MBIM22 0x0040 /* Enable Interrupt For Mailbox 22 */ | ||
| 2962 | #define MBIM23 0x0080 /* Enable Interrupt For Mailbox 23 */ | ||
| 2963 | #define MBIM24 0x0100 /* Enable Interrupt For Mailbox 24 */ | ||
| 2964 | #define MBIM25 0x0200 /* Enable Interrupt For Mailbox 25 */ | ||
| 2965 | #define MBIM26 0x0400 /* Enable Interrupt For Mailbox 26 */ | ||
| 2966 | #define MBIM27 0x0800 /* Enable Interrupt For Mailbox 27 */ | ||
| 2967 | #define MBIM28 0x1000 /* Enable Interrupt For Mailbox 28 */ | ||
| 2968 | #define MBIM29 0x2000 /* Enable Interrupt For Mailbox 29 */ | ||
| 2969 | #define MBIM30 0x4000 /* Enable Interrupt For Mailbox 30 */ | ||
| 2970 | #define MBIM31 0x8000 /* Enable Interrupt For Mailbox 31 */ | ||
| 2971 | |||
| 2972 | /* CAN_GIM Masks */ | ||
| 2973 | #define EWTIM 0x0001 /* Enable TX Error Count Interrupt */ | ||
| 2974 | #define EWRIM 0x0002 /* Enable RX Error Count Interrupt */ | ||
| 2975 | #define EPIM 0x0004 /* Enable Error-Passive Mode Interrupt */ | ||
| 2976 | #define BOIM 0x0008 /* Enable Bus Off Interrupt */ | ||
| 2977 | #define WUIM 0x0010 /* Enable Wake-Up Interrupt */ | ||
| 2978 | #define UIAIM 0x0020 /* Enable Access To Unimplemented Address Interrupt */ | ||
| 2979 | #define AAIM 0x0040 /* Enable Abort Acknowledge Interrupt */ | ||
| 2980 | #define RMLIM 0x0080 /* Enable RX Message Lost Interrupt */ | ||
| 2981 | #define UCEIM 0x0100 /* Enable Universal Counter Overflow Interrupt */ | ||
| 2982 | #define EXTIM 0x0200 /* Enable External Trigger Output Interrupt */ | ||
| 2983 | #define ADIM 0x0400 /* Enable Access Denied Interrupt */ | ||
| 2984 | |||
| 2985 | /* CAN_GIS Masks */ | ||
| 2986 | #define EWTIS 0x0001 /* TX Error Count IRQ Status */ | ||
| 2987 | #define EWRIS 0x0002 /* RX Error Count IRQ Status */ | ||
| 2988 | #define EPIS 0x0004 /* Error-Passive Mode IRQ Status */ | ||
| 2989 | #define BOIS 0x0008 /* Bus Off IRQ Status */ | ||
| 2990 | #define WUIS 0x0010 /* Wake-Up IRQ Status */ | ||
| 2991 | #define UIAIS 0x0020 /* Access To Unimplemented Address IRQ Status */ | ||
| 2992 | #define AAIS 0x0040 /* Abort Acknowledge IRQ Status */ | ||
| 2993 | #define RMLIS 0x0080 /* RX Message Lost IRQ Status */ | ||
| 2994 | #define UCEIS 0x0100 /* Universal Counter Overflow IRQ Status */ | ||
| 2995 | #define EXTIS 0x0200 /* External Trigger Output IRQ Status */ | ||
| 2996 | #define ADIS 0x0400 /* Access Denied IRQ Status */ | ||
| 2997 | |||
| 2998 | /* CAN_GIF Masks */ | ||
| 2999 | #define EWTIF 0x0001 /* TX Error Count IRQ Flag */ | ||
| 3000 | #define EWRIF 0x0002 /* RX Error Count IRQ Flag */ | ||
| 3001 | #define EPIF 0x0004 /* Error-Passive Mode IRQ Flag */ | ||
| 3002 | #define BOIF 0x0008 /* Bus Off IRQ Flag */ | ||
| 3003 | #define WUIF 0x0010 /* Wake-Up IRQ Flag */ | ||
| 3004 | #define UIAIF 0x0020 /* Access To Unimplemented Address IRQ Flag */ | ||
| 3005 | #define AAIF 0x0040 /* Abort Acknowledge IRQ Flag */ | ||
| 3006 | #define RMLIF 0x0080 /* RX Message Lost IRQ Flag */ | ||
| 3007 | #define UCEIF 0x0100 /* Universal Counter Overflow IRQ Flag */ | ||
| 3008 | #define EXTIF 0x0200 /* External Trigger Output IRQ Flag */ | ||
| 3009 | #define ADIF 0x0400 /* Access Denied IRQ Flag */ | ||
| 3010 | |||
| 3011 | /* CAN_UCCNF Masks */ | ||
| 3012 | #define UCCNF 0x000F /* Universal Counter Mode */ | ||
| 3013 | #define UC_STAMP 0x0001 /* Timestamp Mode */ | ||
| 3014 | #define UC_WDOG 0x0002 /* Watchdog Mode */ | ||
| 3015 | #define UC_AUTOTX 0x0003 /* Auto-Transmit Mode */ | ||
| 3016 | #define UC_ERROR 0x0006 /* CAN Error Frame Count */ | ||
| 3017 | #define UC_OVER 0x0007 /* CAN Overload Frame Count */ | ||
| 3018 | #define UC_LOST 0x0008 /* Arbitration Lost During TX Count */ | ||
| 3019 | #define UC_AA 0x0009 /* TX Abort Count */ | ||
| 3020 | #define UC_TA 0x000A /* TX Successful Count */ | ||
| 3021 | #define UC_REJECT 0x000B /* RX Message Rejected Count */ | ||
| 3022 | #define UC_RML 0x000C /* RX Message Lost Count */ | ||
| 3023 | #define UC_RX 0x000D /* Total Successful RX Messages Count */ | ||
| 3024 | #define UC_RMP 0x000E /* Successful RX W/Matching ID Count */ | ||
| 3025 | #define UC_ALL 0x000F /* Correct Message On CAN Bus Line Count */ | ||
| 3026 | #define UCRC 0x0020 /* Universal Counter Reload/Clear */ | ||
| 3027 | #define UCCT 0x0040 /* Universal Counter CAN Trigger */ | ||
| 3028 | #define UCE 0x0080 /* Universal Counter Enable */ | ||
| 3029 | |||
| 3030 | /* CAN_ESR Masks */ | ||
| 3031 | #define ACKE 0x0004 /* Acknowledge Error */ | ||
| 3032 | #define SER 0x0008 /* Stuff Error */ | ||
| 3033 | #define CRCE 0x0010 /* CRC Error */ | ||
| 3034 | #define SA0 0x0020 /* Stuck At Dominant Error */ | ||
| 3035 | #define BEF 0x0040 /* Bit Error Flag */ | ||
| 3036 | #define FER 0x0080 /* Form Error Flag */ | ||
| 3037 | |||
| 3038 | /* CAN_EWR Masks */ | ||
| 3039 | #define EWLREC 0x00FF /* RX Error Count Limit (For EWRIS) */ | ||
| 3040 | #define EWLTEC 0xFF00 /* TX Error Count Limit (For EWTIS) */ | ||
| 3041 | |||
| 3042 | #endif /* _DEF_BF539_H */ | 2421 | #endif /* _DEF_BF539_H */ |
diff --git a/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h b/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h index ab04d137fd8b..0ed06c2366fe 100644 --- a/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h +++ b/arch/blackfin/mach-bf548/include/mach/defBF54x_base.h | |||
| @@ -2104,677 +2104,6 @@ | |||
| 2104 | 2104 | ||
| 2105 | #define ECCCNT 0x3ff /* Transfer Count */ | 2105 | #define ECCCNT 0x3ff /* Transfer Count */ |
| 2106 | 2106 | ||
| 2107 | /* Bit masks for CAN0_CONTROL */ | ||
| 2108 | |||
| 2109 | #define SRS 0x1 /* Software Reset */ | ||
| 2110 | #define DNM 0x2 /* DeviceNet Mode */ | ||
| 2111 | #define ABO 0x4 /* Auto Bus On */ | ||
| 2112 | #define WBA 0x10 /* Wakeup On CAN Bus Activity */ | ||
| 2113 | #define SMR 0x20 /* Sleep Mode Request */ | ||
| 2114 | #define CSR 0x40 /* CAN Suspend Mode Request */ | ||
| 2115 | #define CCR 0x80 /* CAN Configuration Mode Request */ | ||
| 2116 | |||
| 2117 | /* Bit masks for CAN0_STATUS */ | ||
| 2118 | |||
| 2119 | #define WT 0x1 /* CAN Transmit Warning Flag */ | ||
| 2120 | #define WR 0x2 /* CAN Receive Warning Flag */ | ||
| 2121 | #define EP 0x4 /* CAN Error Passive Mode */ | ||
| 2122 | #define EBO 0x8 /* CAN Error Bus Off Mode */ | ||
| 2123 | #define CSA 0x40 /* CAN Suspend Mode Acknowledge */ | ||
| 2124 | #define CCA 0x80 /* CAN Configuration Mode Acknowledge */ | ||
| 2125 | #define MBPTR 0x1f00 /* Mailbox Pointer */ | ||
| 2126 | #define TRM 0x4000 /* Transmit Mode Status */ | ||
| 2127 | #define REC 0x8000 /* Receive Mode Status */ | ||
| 2128 | |||
| 2129 | /* Bit masks for CAN0_DEBUG */ | ||
| 2130 | |||
| 2131 | #define DEC 0x1 /* Disable Transmit/Receive Error Counters */ | ||
| 2132 | #define DRI 0x2 /* Disable CANRX Input Pin */ | ||
| 2133 | #define DTO 0x4 /* Disable CANTX Output Pin */ | ||
| 2134 | #define DIL 0x8 /* Disable Internal Loop */ | ||
| 2135 | #define MAA 0x10 /* Mode Auto-Acknowledge */ | ||
| 2136 | #define MRB 0x20 /* Mode Read Back */ | ||
| 2137 | #define CDE 0x8000 /* CAN Debug Mode Enable */ | ||
| 2138 | |||
| 2139 | /* Bit masks for CAN0_CLOCK */ | ||
| 2140 | |||
| 2141 | #define BRP 0x3ff /* CAN Bit Rate Prescaler */ | ||
| 2142 | |||
| 2143 | /* Bit masks for CAN0_TIMING */ | ||
| 2144 | |||
| 2145 | #define SJW 0x300 /* Synchronization Jump Width */ | ||
| 2146 | #define SAM 0x80 /* Sampling */ | ||
| 2147 | #define TSEG2 0x70 /* Time Segment 2 */ | ||
| 2148 | #define TSEG1 0xf /* Time Segment 1 */ | ||
| 2149 | |||
| 2150 | /* Bit masks for CAN0_INTR */ | ||
| 2151 | |||
| 2152 | #define CANRX 0x80 /* Serial Input From Transceiver */ | ||
| 2153 | #define CANTX 0x40 /* Serial Output To Transceiver */ | ||
| 2154 | #define SMACK 0x8 /* Sleep Mode Acknowledge */ | ||
| 2155 | #define GIRQ 0x4 /* Global Interrupt Request Status */ | ||
| 2156 | #define MBTIRQ 0x2 /* Mailbox Transmit Interrupt Request */ | ||
| 2157 | #define MBRIRQ 0x1 /* Mailbox Receive Interrupt Request */ | ||
| 2158 | |||
| 2159 | /* Bit masks for CAN0_GIM */ | ||
| 2160 | |||
| 2161 | #define EWTIM 0x1 /* Error Warning Transmit Interrupt Mask */ | ||
| 2162 | #define EWRIM 0x2 /* Error Warning Receive Interrupt Mask */ | ||
| 2163 | #define EPIM 0x4 /* Error Passive Interrupt Mask */ | ||
| 2164 | #define BOIM 0x8 /* Bus Off Interrupt Mask */ | ||
| 2165 | #define WUIM 0x10 /* Wakeup Interrupt Mask */ | ||
| 2166 | #define UIAIM 0x20 /* Unimplemented Address Interrupt Mask */ | ||
| 2167 | #define AAIM 0x40 /* Abort Acknowledge Interrupt Mask */ | ||
| 2168 | #define RMLIM 0x80 /* Receive Message Lost Interrupt Mask */ | ||
| 2169 | #define UCEIM 0x100 /* Universal Counter Exceeded Interrupt Mask */ | ||
| 2170 | #define ADIM 0x400 /* Access Denied Interrupt Mask */ | ||
| 2171 | |||
| 2172 | /* Bit masks for CAN0_GIS */ | ||
| 2173 | |||
| 2174 | #define EWTIS 0x1 /* Error Warning Transmit Interrupt Status */ | ||
| 2175 | #define EWRIS 0x2 /* Error Warning Receive Interrupt Status */ | ||
| 2176 | #define EPIS 0x4 /* Error Passive Interrupt Status */ | ||
| 2177 | #define BOIS 0x8 /* Bus Off Interrupt Status */ | ||
| 2178 | #define WUIS 0x10 /* Wakeup Interrupt Status */ | ||
| 2179 | #define UIAIS 0x20 /* Unimplemented Address Interrupt Status */ | ||
| 2180 | #define AAIS 0x40 /* Abort Acknowledge Interrupt Status */ | ||
| 2181 | #define RMLIS 0x80 /* Receive Message Lost Interrupt Status */ | ||
| 2182 | #define UCEIS 0x100 /* Universal Counter Exceeded Interrupt Status */ | ||
| 2183 | #define ADIS 0x400 /* Access Denied Interrupt Status */ | ||
| 2184 | |||
| 2185 | /* Bit masks for CAN0_GIF */ | ||
| 2186 | |||
| 2187 | #define EWTIF 0x1 /* Error Warning Transmit Interrupt Flag */ | ||
| 2188 | #define EWRIF 0x2 /* Error Warning Receive Interrupt Flag */ | ||
| 2189 | #define EPIF 0x4 /* Error Passive Interrupt Flag */ | ||
| 2190 | #define BOIF 0x8 /* Bus Off Interrupt Flag */ | ||
| 2191 | #define WUIF 0x10 /* Wakeup Interrupt Flag */ | ||
| 2192 | #define UIAIF 0x20 /* Unimplemented Address Interrupt Flag */ | ||
| 2193 | #define AAIF 0x40 /* Abort Acknowledge Interrupt Flag */ | ||
| 2194 | #define RMLIF 0x80 /* Receive Message Lost Interrupt Flag */ | ||
| 2195 | #define UCEIF 0x100 /* Universal Counter Exceeded Interrupt Flag */ | ||
| 2196 | #define ADIF 0x400 /* Access Denied Interrupt Flag */ | ||
| 2197 | |||
| 2198 | /* Bit masks for CAN0_MBTD */ | ||
| 2199 | |||
| 2200 | #define TDR 0x80 /* Temporary Disable Request */ | ||
| 2201 | #define TDA 0x40 /* Temporary Disable Acknowledge */ | ||
| 2202 | #define TDPTR 0x1f /* Temporary Disable Pointer */ | ||
| 2203 | |||
| 2204 | /* Bit masks for CAN0_UCCNF */ | ||
| 2205 | |||
| 2206 | #define UCCNF 0xf /* Universal Counter Configuration */ | ||
| 2207 | #define UCRC 0x20 /* Universal Counter Reload/Clear */ | ||
| 2208 | #define UCCT 0x40 /* Universal Counter CAN Trigger */ | ||
| 2209 | #define UCE 0x80 /* Universal Counter Enable */ | ||
| 2210 | |||
| 2211 | /* Bit masks for CAN0_CEC */ | ||
| 2212 | |||
| 2213 | #define RXECNT 0xff /* Receive Error Counter */ | ||
| 2214 | #define TXECNT 0xff00 /* Transmit Error Counter */ | ||
| 2215 | |||
| 2216 | /* Bit masks for CAN0_ESR */ | ||
| 2217 | |||
| 2218 | #define FER 0x80 /* Form Error */ | ||
| 2219 | #define BEF 0x40 /* Bit Error Flag */ | ||
| 2220 | #define SA0 0x20 /* Stuck At Dominant */ | ||
| 2221 | #define CRCE 0x10 /* CRC Error */ | ||
| 2222 | #define SER 0x8 /* Stuff Bit Error */ | ||
| 2223 | #define ACKE 0x4 /* Acknowledge Error */ | ||
| 2224 | |||
| 2225 | /* Bit masks for CAN0_EWR */ | ||
| 2226 | |||
| 2227 | #define EWLTEC 0xff00 /* Transmit Error Warning Limit */ | ||
| 2228 | #define EWLREC 0xff /* Receive Error Warning Limit */ | ||
| 2229 | |||
| 2230 | /* Bit masks for CAN0_AMxx_H */ | ||
| 2231 | |||
| 2232 | #define FDF 0x8000 /* Filter On Data Field */ | ||
| 2233 | #define FMD 0x4000 /* Full Mask Data */ | ||
| 2234 | #define AMIDE 0x2000 /* Acceptance Mask Identifier Extension */ | ||
| 2235 | #define BASEID 0x1ffc /* Base Identifier */ | ||
| 2236 | #define EXTID_HI 0x3 /* Extended Identifier High Bits */ | ||
| 2237 | |||
| 2238 | /* Bit masks for CAN0_AMxx_L */ | ||
| 2239 | |||
| 2240 | #define EXTID_LO 0xffff /* Extended Identifier Low Bits */ | ||
| 2241 | #define DFM 0xffff /* Data Field Mask */ | ||
| 2242 | |||
| 2243 | /* Bit masks for CAN0_MBxx_ID1 */ | ||
| 2244 | |||
| 2245 | #define AME 0x8000 /* Acceptance Mask Enable */ | ||
| 2246 | #define RTR 0x4000 /* Remote Transmission Request */ | ||
| 2247 | #define IDE 0x2000 /* Identifier Extension */ | ||
| 2248 | #define BASEID 0x1ffc /* Base Identifier */ | ||
| 2249 | #define EXTID_HI 0x3 /* Extended Identifier High Bits */ | ||
| 2250 | |||
| 2251 | /* Bit masks for CAN0_MBxx_ID0 */ | ||
| 2252 | |||
| 2253 | #define EXTID_LO 0xffff /* Extended Identifier Low Bits */ | ||
| 2254 | #define DFM 0xffff /* Data Field Mask */ | ||
| 2255 | |||
| 2256 | /* Bit masks for CAN0_MBxx_TIMESTAMP */ | ||
| 2257 | |||
| 2258 | #define TSV 0xffff /* Time Stamp Value */ | ||
| 2259 | |||
| 2260 | /* Bit masks for CAN0_MBxx_LENGTH */ | ||
| 2261 | |||
| 2262 | #define DLC 0xf /* Data Length Code */ | ||
| 2263 | |||
| 2264 | /* Bit masks for CAN0_MBxx_DATA3 */ | ||
| 2265 | |||
| 2266 | #define CAN_BYTE0 0xff00 /* Data Field Byte 0 */ | ||
| 2267 | #define CAN_BYTE1 0xff /* Data Field Byte 1 */ | ||
| 2268 | |||
| 2269 | /* Bit masks for CAN0_MBxx_DATA2 */ | ||
| 2270 | |||
| 2271 | #define CAN_BYTE2 0xff00 /* Data Field Byte 2 */ | ||
| 2272 | #define CAN_BYTE3 0xff /* Data Field Byte 3 */ | ||
| 2273 | |||
| 2274 | /* Bit masks for CAN0_MBxx_DATA1 */ | ||
| 2275 | |||
| 2276 | #define CAN_BYTE4 0xff00 /* Data Field Byte 4 */ | ||
| 2277 | #define CAN_BYTE5 0xff /* Data Field Byte 5 */ | ||
| 2278 | |||
| 2279 | /* Bit masks for CAN0_MBxx_DATA0 */ | ||
| 2280 | |||
| 2281 | #define CAN_BYTE6 0xff00 /* Data Field Byte 6 */ | ||
| 2282 | #define CAN_BYTE7 0xff /* Data Field Byte 7 */ | ||
| 2283 | |||
| 2284 | /* Bit masks for CAN0_MC1 */ | ||
| 2285 | |||
| 2286 | #define MC0 0x1 /* Mailbox 0 Enable */ | ||
| 2287 | #define MC1 0x2 /* Mailbox 1 Enable */ | ||
| 2288 | #define MC2 0x4 /* Mailbox 2 Enable */ | ||
| 2289 | #define MC3 0x8 /* Mailbox 3 Enable */ | ||
| 2290 | #define MC4 0x10 /* Mailbox 4 Enable */ | ||
| 2291 | #define MC5 0x20 /* Mailbox 5 Enable */ | ||
| 2292 | #define MC6 0x40 /* Mailbox 6 Enable */ | ||
| 2293 | #define MC7 0x80 /* Mailbox 7 Enable */ | ||
| 2294 | #define MC8 0x100 /* Mailbox 8 Enable */ | ||
| 2295 | #define MC9 0x200 /* Mailbox 9 Enable */ | ||
| 2296 | #define MC10 0x400 /* Mailbox 10 Enable */ | ||
| 2297 | #define MC11 0x800 /* Mailbox 11 Enable */ | ||
| 2298 | #define MC12 0x1000 /* Mailbox 12 Enable */ | ||
| 2299 | #define MC13 0x2000 /* Mailbox 13 Enable */ | ||
| 2300 | #define MC14 0x4000 /* Mailbox 14 Enable */ | ||
| 2301 | #define MC15 0x8000 /* Mailbox 15 Enable */ | ||
| 2302 | |||
| 2303 | /* Bit masks for CAN0_MC2 */ | ||
| 2304 | |||
| 2305 | #define MC16 0x1 /* Mailbox 16 Enable */ | ||
| 2306 | #define MC17 0x2 /* Mailbox 17 Enable */ | ||
| 2307 | #define MC18 0x4 /* Mailbox 18 Enable */ | ||
| 2308 | #define MC19 0x8 /* Mailbox 19 Enable */ | ||
| 2309 | #define MC20 0x10 /* Mailbox 20 Enable */ | ||
| 2310 | #define MC21 0x20 /* Mailbox 21 Enable */ | ||
| 2311 | #define MC22 0x40 /* Mailbox 22 Enable */ | ||
| 2312 | #define MC23 0x80 /* Mailbox 23 Enable */ | ||
| 2313 | #define MC24 0x100 /* Mailbox 24 Enable */ | ||
| 2314 | #define MC25 0x200 /* Mailbox 25 Enable */ | ||
| 2315 | #define MC26 0x400 /* Mailbox 26 Enable */ | ||
| 2316 | #define MC27 0x800 /* Mailbox 27 Enable */ | ||
| 2317 | #define MC28 0x1000 /* Mailbox 28 Enable */ | ||
| 2318 | #define MC29 0x2000 /* Mailbox 29 Enable */ | ||
| 2319 | #define MC30 0x4000 /* Mailbox 30 Enable */ | ||
| 2320 | #define MC31 0x8000 /* Mailbox 31 Enable */ | ||
| 2321 | |||
| 2322 | /* Bit masks for CAN0_MD1 */ | ||
| 2323 | |||
| 2324 | #define MD0 0x1 /* Mailbox 0 Receive Enable */ | ||
| 2325 | #define MD1 0x2 /* Mailbox 1 Receive Enable */ | ||
| 2326 | #define MD2 0x4 /* Mailbox 2 Receive Enable */ | ||
| 2327 | #define MD3 0x8 /* Mailbox 3 Receive Enable */ | ||
| 2328 | #define MD4 0x10 /* Mailbox 4 Receive Enable */ | ||
| 2329 | #define MD5 0x20 /* Mailbox 5 Receive Enable */ | ||
| 2330 | #define MD6 0x40 /* Mailbox 6 Receive Enable */ | ||
| 2331 | #define MD7 0x80 /* Mailbox 7 Receive Enable */ | ||
| 2332 | #define MD8 0x100 /* Mailbox 8 Receive Enable */ | ||
| 2333 | #define MD9 0x200 /* Mailbox 9 Receive Enable */ | ||
| 2334 | #define MD10 0x400 /* Mailbox 10 Receive Enable */ | ||
| 2335 | #define MD11 0x800 /* Mailbox 11 Receive Enable */ | ||
| 2336 | #define MD12 0x1000 /* Mailbox 12 Receive Enable */ | ||
| 2337 | #define MD13 0x2000 /* Mailbox 13 Receive Enable */ | ||
| 2338 | #define MD14 0x4000 /* Mailbox 14 Receive Enable */ | ||
| 2339 | #define MD15 0x8000 /* Mailbox 15 Receive Enable */ | ||
| 2340 | |||
| 2341 | /* Bit masks for CAN0_MD2 */ | ||
| 2342 | |||
| 2343 | #define MD16 0x1 /* Mailbox 16 Receive Enable */ | ||
| 2344 | #define MD17 0x2 /* Mailbox 17 Receive Enable */ | ||
| 2345 | #define MD18 0x4 /* Mailbox 18 Receive Enable */ | ||
| 2346 | #define MD19 0x8 /* Mailbox 19 Receive Enable */ | ||
| 2347 | #define MD20 0x10 /* Mailbox 20 Receive Enable */ | ||
| 2348 | #define MD21 0x20 /* Mailbox 21 Receive Enable */ | ||
| 2349 | #define MD22 0x40 /* Mailbox 22 Receive Enable */ | ||
| 2350 | #define MD23 0x80 /* Mailbox 23 Receive Enable */ | ||
| 2351 | #define MD24 0x100 /* Mailbox 24 Receive Enable */ | ||
| 2352 | #define MD25 0x200 /* Mailbox 25 Receive Enable */ | ||
| 2353 | #define MD26 0x400 /* Mailbox 26 Receive Enable */ | ||
| 2354 | #define MD27 0x800 /* Mailbox 27 Receive Enable */ | ||
| 2355 | #define MD28 0x1000 /* Mailbox 28 Receive Enable */ | ||
| 2356 | #define MD29 0x2000 /* Mailbox 29 Receive Enable */ | ||
| 2357 | #define MD30 0x4000 /* Mailbox 30 Receive Enable */ | ||
| 2358 | #define MD31 0x8000 /* Mailbox 31 Receive Enable */ | ||
| 2359 | |||
| 2360 | /* Bit masks for CAN0_RMP1 */ | ||
| 2361 | |||
| 2362 | #define RMP0 0x1 /* Mailbox 0 Receive Message Pending */ | ||
| 2363 | #define RMP1 0x2 /* Mailbox 1 Receive Message Pending */ | ||
| 2364 | #define RMP2 0x4 /* Mailbox 2 Receive Message Pending */ | ||
| 2365 | #define RMP3 0x8 /* Mailbox 3 Receive Message Pending */ | ||
| 2366 | #define RMP4 0x10 /* Mailbox 4 Receive Message Pending */ | ||
| 2367 | #define RMP5 0x20 /* Mailbox 5 Receive Message Pending */ | ||
| 2368 | #define RMP6 0x40 /* Mailbox 6 Receive Message Pending */ | ||
| 2369 | #define RMP7 0x80 /* Mailbox 7 Receive Message Pending */ | ||
| 2370 | #define RMP8 0x100 /* Mailbox 8 Receive Message Pending */ | ||
| 2371 | #define RMP9 0x200 /* Mailbox 9 Receive Message Pending */ | ||
| 2372 | #define RMP10 0x400 /* Mailbox 10 Receive Message Pending */ | ||
| 2373 | #define RMP11 0x800 /* Mailbox 11 Receive Message Pending */ | ||
| 2374 | #define RMP12 0x1000 /* Mailbox 12 Receive Message Pending */ | ||
| 2375 | #define RMP13 0x2000 /* Mailbox 13 Receive Message Pending */ | ||
| 2376 | #define RMP14 0x4000 /* Mailbox 14 Receive Message Pending */ | ||
| 2377 | #define RMP15 0x8000 /* Mailbox 15 Receive Message Pending */ | ||
| 2378 | |||
| 2379 | /* Bit masks for CAN0_RMP2 */ | ||
| 2380 | |||
| 2381 | #define RMP16 0x1 /* Mailbox 16 Receive Message Pending */ | ||
| 2382 | #define RMP17 0x2 /* Mailbox 17 Receive Message Pending */ | ||
| 2383 | #define RMP18 0x4 /* Mailbox 18 Receive Message Pending */ | ||
| 2384 | #define RMP19 0x8 /* Mailbox 19 Receive Message Pending */ | ||
| 2385 | #define RMP20 0x10 /* Mailbox 20 Receive Message Pending */ | ||
| 2386 | #define RMP21 0x20 /* Mailbox 21 Receive Message Pending */ | ||
| 2387 | #define RMP22 0x40 /* Mailbox 22 Receive Message Pending */ | ||
| 2388 | #define RMP23 0x80 /* Mailbox 23 Receive Message Pending */ | ||
| 2389 | #define RMP24 0x100 /* Mailbox 24 Receive Message Pending */ | ||
| 2390 | #define RMP25 0x200 /* Mailbox 25 Receive Message Pending */ | ||
| 2391 | #define RMP26 0x400 /* Mailbox 26 Receive Message Pending */ | ||
| 2392 | #define RMP27 0x800 /* Mailbox 27 Receive Message Pending */ | ||
| 2393 | #define RMP28 0x1000 /* Mailbox 28 Receive Message Pending */ | ||
| 2394 | #define RMP29 0x2000 /* Mailbox 29 Receive Message Pending */ | ||
| 2395 | #define RMP30 0x4000 /* Mailbox 30 Receive Message Pending */ | ||
| 2396 | #define RMP31 0x8000 /* Mailbox 31 Receive Message Pending */ | ||
| 2397 | |||
| 2398 | /* Bit masks for CAN0_RML1 */ | ||
| 2399 | |||
| 2400 | #define RML0 0x1 /* Mailbox 0 Receive Message Lost */ | ||
| 2401 | #define RML1 0x2 /* Mailbox 1 Receive Message Lost */ | ||
| 2402 | #define RML2 0x4 /* Mailbox 2 Receive Message Lost */ | ||
| 2403 | #define RML3 0x8 /* Mailbox 3 Receive Message Lost */ | ||
| 2404 | #define RML4 0x10 /* Mailbox 4 Receive Message Lost */ | ||
| 2405 | #define RML5 0x20 /* Mailbox 5 Receive Message Lost */ | ||
| 2406 | #define RML6 0x40 /* Mailbox 6 Receive Message Lost */ | ||
| 2407 | #define RML7 0x80 /* Mailbox 7 Receive Message Lost */ | ||
| 2408 | #define RML8 0x100 /* Mailbox 8 Receive Message Lost */ | ||
| 2409 | #define RML9 0x200 /* Mailbox 9 Receive Message Lost */ | ||
| 2410 | #define RML10 0x400 /* Mailbox 10 Receive Message Lost */ | ||
| 2411 | #define RML11 0x800 /* Mailbox 11 Receive Message Lost */ | ||
| 2412 | #define RML12 0x1000 /* Mailbox 12 Receive Message Lost */ | ||
| 2413 | #define RML13 0x2000 /* Mailbox 13 Receive Message Lost */ | ||
| 2414 | #define RML14 0x4000 /* Mailbox 14 Receive Message Lost */ | ||
| 2415 | #define RML15 0x8000 /* Mailbox 15 Receive Message Lost */ | ||
| 2416 | |||
| 2417 | /* Bit masks for CAN0_RML2 */ | ||
| 2418 | |||
| 2419 | #define RML16 0x1 /* Mailbox 16 Receive Message Lost */ | ||
| 2420 | #define RML17 0x2 /* Mailbox 17 Receive Message Lost */ | ||
| 2421 | #define RML18 0x4 /* Mailbox 18 Receive Message Lost */ | ||
| 2422 | #define RML19 0x8 /* Mailbox 19 Receive Message Lost */ | ||
| 2423 | #define RML20 0x10 /* Mailbox 20 Receive Message Lost */ | ||
| 2424 | #define RML21 0x20 /* Mailbox 21 Receive Message Lost */ | ||
| 2425 | #define RML22 0x40 /* Mailbox 22 Receive Message Lost */ | ||
| 2426 | #define RML23 0x80 /* Mailbox 23 Receive Message Lost */ | ||
| 2427 | #define RML24 0x100 /* Mailbox 24 Receive Message Lost */ | ||
| 2428 | #define RML25 0x200 /* Mailbox 25 Receive Message Lost */ | ||
| 2429 | #define RML26 0x400 /* Mailbox 26 Receive Message Lost */ | ||
| 2430 | #define RML27 0x800 /* Mailbox 27 Receive Message Lost */ | ||
| 2431 | #define RML28 0x1000 /* Mailbox 28 Receive Message Lost */ | ||
| 2432 | #define RML29 0x2000 /* Mailbox 29 Receive Message Lost */ | ||
| 2433 | #define RML30 0x4000 /* Mailbox 30 Receive Message Lost */ | ||
| 2434 | #define RML31 0x8000 /* Mailbox 31 Receive Message Lost */ | ||
| 2435 | |||
| 2436 | /* Bit masks for CAN0_OPSS1 */ | ||
| 2437 | |||
| 2438 | #define OPSS0 0x1 /* Mailbox 0 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2439 | #define OPSS1 0x2 /* Mailbox 1 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2440 | #define OPSS2 0x4 /* Mailbox 2 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2441 | #define OPSS3 0x8 /* Mailbox 3 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2442 | #define OPSS4 0x10 /* Mailbox 4 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2443 | #define OPSS5 0x20 /* Mailbox 5 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2444 | #define OPSS6 0x40 /* Mailbox 6 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2445 | #define OPSS7 0x80 /* Mailbox 7 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2446 | #define OPSS8 0x100 /* Mailbox 8 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2447 | #define OPSS9 0x200 /* Mailbox 9 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2448 | #define OPSS10 0x400 /* Mailbox 10 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2449 | #define OPSS11 0x800 /* Mailbox 11 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2450 | #define OPSS12 0x1000 /* Mailbox 12 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2451 | #define OPSS13 0x2000 /* Mailbox 13 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2452 | #define OPSS14 0x4000 /* Mailbox 14 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2453 | #define OPSS15 0x8000 /* Mailbox 15 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2454 | |||
| 2455 | /* Bit masks for CAN0_OPSS2 */ | ||
| 2456 | |||
| 2457 | #define OPSS16 0x1 /* Mailbox 16 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2458 | #define OPSS17 0x2 /* Mailbox 17 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2459 | #define OPSS18 0x4 /* Mailbox 18 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2460 | #define OPSS19 0x8 /* Mailbox 19 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2461 | #define OPSS20 0x10 /* Mailbox 20 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2462 | #define OPSS21 0x20 /* Mailbox 21 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2463 | #define OPSS22 0x40 /* Mailbox 22 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2464 | #define OPSS23 0x80 /* Mailbox 23 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2465 | #define OPSS24 0x100 /* Mailbox 24 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2466 | #define OPSS25 0x200 /* Mailbox 25 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2467 | #define OPSS26 0x400 /* Mailbox 26 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2468 | #define OPSS27 0x800 /* Mailbox 27 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2469 | #define OPSS28 0x1000 /* Mailbox 28 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2470 | #define OPSS29 0x2000 /* Mailbox 29 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2471 | #define OPSS30 0x4000 /* Mailbox 30 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2472 | #define OPSS31 0x8000 /* Mailbox 31 Overwrite Protection/Single-Shot Transmission Enable */ | ||
| 2473 | |||
| 2474 | /* Bit masks for CAN0_TRS1 */ | ||
| 2475 | |||
| 2476 | #define TRS0 0x1 /* Mailbox 0 Transmit Request Set */ | ||
| 2477 | #define TRS1 0x2 /* Mailbox 1 Transmit Request Set */ | ||
| 2478 | #define TRS2 0x4 /* Mailbox 2 Transmit Request Set */ | ||
| 2479 | #define TRS3 0x8 /* Mailbox 3 Transmit Request Set */ | ||
| 2480 | #define TRS4 0x10 /* Mailbox 4 Transmit Request Set */ | ||
| 2481 | #define TRS5 0x20 /* Mailbox 5 Transmit Request Set */ | ||
| 2482 | #define TRS6 0x40 /* Mailbox 6 Transmit Request Set */ | ||
| 2483 | #define TRS7 0x80 /* Mailbox 7 Transmit Request Set */ | ||
| 2484 | #define TRS8 0x100 /* Mailbox 8 Transmit Request Set */ | ||
| 2485 | #define TRS9 0x200 /* Mailbox 9 Transmit Request Set */ | ||
| 2486 | #define TRS10 0x400 /* Mailbox 10 Transmit Request Set */ | ||
| 2487 | #define TRS11 0x800 /* Mailbox 11 Transmit Request Set */ | ||
| 2488 | #define TRS12 0x1000 /* Mailbox 12 Transmit Request Set */ | ||
| 2489 | #define TRS13 0x2000 /* Mailbox 13 Transmit Request Set */ | ||
| 2490 | #define TRS14 0x4000 /* Mailbox 14 Transmit Request Set */ | ||
| 2491 | #define TRS15 0x8000 /* Mailbox 15 Transmit Request Set */ | ||
| 2492 | |||
| 2493 | /* Bit masks for CAN0_TRS2 */ | ||
| 2494 | |||
| 2495 | #define TRS16 0x1 /* Mailbox 16 Transmit Request Set */ | ||
| 2496 | #define TRS17 0x2 /* Mailbox 17 Transmit Request Set */ | ||
| 2497 | #define TRS18 0x4 /* Mailbox 18 Transmit Request Set */ | ||
| 2498 | #define TRS19 0x8 /* Mailbox 19 Transmit Request Set */ | ||
| 2499 | #define TRS20 0x10 /* Mailbox 20 Transmit Request Set */ | ||
| 2500 | #define TRS21 0x20 /* Mailbox 21 Transmit Request Set */ | ||
| 2501 | #define TRS22 0x40 /* Mailbox 22 Transmit Request Set */ | ||
| 2502 | #define TRS23 0x80 /* Mailbox 23 Transmit Request Set */ | ||
| 2503 | #define TRS24 0x100 /* Mailbox 24 Transmit Request Set */ | ||
| 2504 | #define TRS25 0x200 /* Mailbox 25 Transmit Request Set */ | ||
| 2505 | #define TRS26 0x400 /* Mailbox 26 Transmit Request Set */ | ||
| 2506 | #define TRS27 0x800 /* Mailbox 27 Transmit Request Set */ | ||
| 2507 | #define TRS28 0x1000 /* Mailbox 28 Transmit Request Set */ | ||
| 2508 | #define TRS29 0x2000 /* Mailbox 29 Transmit Request Set */ | ||
| 2509 | #define TRS30 0x4000 /* Mailbox 30 Transmit Request Set */ | ||
| 2510 | #define TRS31 0x8000 /* Mailbox 31 Transmit Request Set */ | ||
| 2511 | |||
| 2512 | /* Bit masks for CAN0_TRR1 */ | ||
| 2513 | |||
| 2514 | #define TRR0 0x1 /* Mailbox 0 Transmit Request Reset */ | ||
| 2515 | #define TRR1 0x2 /* Mailbox 1 Transmit Request Reset */ | ||
| 2516 | #define TRR2 0x4 /* Mailbox 2 Transmit Request Reset */ | ||
| 2517 | #define TRR3 0x8 /* Mailbox 3 Transmit Request Reset */ | ||
| 2518 | #define TRR4 0x10 /* Mailbox 4 Transmit Request Reset */ | ||
| 2519 | #define TRR5 0x20 /* Mailbox 5 Transmit Request Reset */ | ||
| 2520 | #define TRR6 0x40 /* Mailbox 6 Transmit Request Reset */ | ||
| 2521 | #define TRR7 0x80 /* Mailbox 7 Transmit Request Reset */ | ||
| 2522 | #define TRR8 0x100 /* Mailbox 8 Transmit Request Reset */ | ||
| 2523 | #define TRR9 0x200 /* Mailbox 9 Transmit Request Reset */ | ||
| 2524 | #define TRR10 0x400 /* Mailbox 10 Transmit Request Reset */ | ||
| 2525 | #define TRR11 0x800 /* Mailbox 11 Transmit Request Reset */ | ||
| 2526 | #define TRR12 0x1000 /* Mailbox 12 Transmit Request Reset */ | ||
| 2527 | #define TRR13 0x2000 /* Mailbox 13 Transmit Request Reset */ | ||
| 2528 | #define TRR14 0x4000 /* Mailbox 14 Transmit Request Reset */ | ||
| 2529 | #define TRR15 0x8000 /* Mailbox 15 Transmit Request Reset */ | ||
| 2530 | |||
| 2531 | /* Bit masks for CAN0_TRR2 */ | ||
| 2532 | |||
| 2533 | #define TRR16 0x1 /* Mailbox 16 Transmit Request Reset */ | ||
| 2534 | #define TRR17 0x2 /* Mailbox 17 Transmit Request Reset */ | ||
| 2535 | #define TRR18 0x4 /* Mailbox 18 Transmit Request Reset */ | ||
| 2536 | #define TRR19 0x8 /* Mailbox 19 Transmit Request Reset */ | ||
| 2537 | #define TRR20 0x10 /* Mailbox 20 Transmit Request Reset */ | ||
| 2538 | #define TRR21 0x20 /* Mailbox 21 Transmit Request Reset */ | ||
| 2539 | #define TRR22 0x40 /* Mailbox 22 Transmit Request Reset */ | ||
| 2540 | #define TRR23 0x80 /* Mailbox 23 Transmit Request Reset */ | ||
| 2541 | #define TRR24 0x100 /* Mailbox 24 Transmit Request Reset */ | ||
| 2542 | #define TRR25 0x200 /* Mailbox 25 Transmit Request Reset */ | ||
| 2543 | #define TRR26 0x400 /* Mailbox 26 Transmit Request Reset */ | ||
| 2544 | #define TRR27 0x800 /* Mailbox 27 Transmit Request Reset */ | ||
| 2545 | #define TRR28 0x1000 /* Mailbox 28 Transmit Request Reset */ | ||
| 2546 | #define TRR29 0x2000 /* Mailbox 29 Transmit Request Reset */ | ||
| 2547 | #define TRR30 0x4000 /* Mailbox 30 Transmit Request Reset */ | ||
| 2548 | #define TRR31 0x8000 /* Mailbox 31 Transmit Request Reset */ | ||
| 2549 | |||
| 2550 | /* Bit masks for CAN0_AA1 */ | ||
| 2551 | |||
| 2552 | #define AA0 0x1 /* Mailbox 0 Abort Acknowledge */ | ||
| 2553 | #define AA1 0x2 /* Mailbox 1 Abort Acknowledge */ | ||
| 2554 | #define AA2 0x4 /* Mailbox 2 Abort Acknowledge */ | ||
| 2555 | #define AA3 0x8 /* Mailbox 3 Abort Acknowledge */ | ||
| 2556 | #define AA4 0x10 /* Mailbox 4 Abort Acknowledge */ | ||
| 2557 | #define AA5 0x20 /* Mailbox 5 Abort Acknowledge */ | ||
| 2558 | #define AA6 0x40 /* Mailbox 6 Abort Acknowledge */ | ||
| 2559 | #define AA7 0x80 /* Mailbox 7 Abort Acknowledge */ | ||
| 2560 | #define AA8 0x100 /* Mailbox 8 Abort Acknowledge */ | ||
| 2561 | #define AA9 0x200 /* Mailbox 9 Abort Acknowledge */ | ||
| 2562 | #define AA10 0x400 /* Mailbox 10 Abort Acknowledge */ | ||
| 2563 | #define AA11 0x800 /* Mailbox 11 Abort Acknowledge */ | ||
| 2564 | #define AA12 0x1000 /* Mailbox 12 Abort Acknowledge */ | ||
| 2565 | #define AA13 0x2000 /* Mailbox 13 Abort Acknowledge */ | ||
| 2566 | #define AA14 0x4000 /* Mailbox 14 Abort Acknowledge */ | ||
| 2567 | #define AA15 0x8000 /* Mailbox 15 Abort Acknowledge */ | ||
| 2568 | |||
| 2569 | /* Bit masks for CAN0_AA2 */ | ||
| 2570 | |||
| 2571 | #define AA16 0x1 /* Mailbox 16 Abort Acknowledge */ | ||
| 2572 | #define AA17 0x2 /* Mailbox 17 Abort Acknowledge */ | ||
| 2573 | #define AA18 0x4 /* Mailbox 18 Abort Acknowledge */ | ||
| 2574 | #define AA19 0x8 /* Mailbox 19 Abort Acknowledge */ | ||
| 2575 | #define AA20 0x10 /* Mailbox 20 Abort Acknowledge */ | ||
| 2576 | #define AA21 0x20 /* Mailbox 21 Abort Acknowledge */ | ||
| 2577 | #define AA22 0x40 /* Mailbox 22 Abort Acknowledge */ | ||
| 2578 | #define AA23 0x80 /* Mailbox 23 Abort Acknowledge */ | ||
| 2579 | #define AA24 0x100 /* Mailbox 24 Abort Acknowledge */ | ||
| 2580 | #define AA25 0x200 /* Mailbox 25 Abort Acknowledge */ | ||
| 2581 | #define AA26 0x400 /* Mailbox 26 Abort Acknowledge */ | ||
| 2582 | #define AA27 0x800 /* Mailbox 27 Abort Acknowledge */ | ||
| 2583 | #define AA28 0x1000 /* Mailbox 28 Abort Acknowledge */ | ||
| 2584 | #define AA29 0x2000 /* Mailbox 29 Abort Acknowledge */ | ||
| 2585 | #define AA30 0x4000 /* Mailbox 30 Abort Acknowledge */ | ||
| 2586 | #define AA31 0x8000 /* Mailbox 31 Abort Acknowledge */ | ||
| 2587 | |||
| 2588 | /* Bit masks for CAN0_TA1 */ | ||
| 2589 | |||
| 2590 | #define TA0 0x1 /* Mailbox 0 Transmit Acknowledge */ | ||
| 2591 | #define TA1 0x2 /* Mailbox 1 Transmit Acknowledge */ | ||
| 2592 | #define TA2 0x4 /* Mailbox 2 Transmit Acknowledge */ | ||
| 2593 | #define TA3 0x8 /* Mailbox 3 Transmit Acknowledge */ | ||
| 2594 | #define TA4 0x10 /* Mailbox 4 Transmit Acknowledge */ | ||
| 2595 | #define TA5 0x20 /* Mailbox 5 Transmit Acknowledge */ | ||
| 2596 | #define TA6 0x40 /* Mailbox 6 Transmit Acknowledge */ | ||
| 2597 | #define TA7 0x80 /* Mailbox 7 Transmit Acknowledge */ | ||
| 2598 | #define TA8 0x100 /* Mailbox 8 Transmit Acknowledge */ | ||
| 2599 | #define TA9 0x200 /* Mailbox 9 Transmit Acknowledge */ | ||
| 2600 | #define TA10 0x400 /* Mailbox 10 Transmit Acknowledge */ | ||
| 2601 | #define TA11 0x800 /* Mailbox 11 Transmit Acknowledge */ | ||
| 2602 | #define TA12 0x1000 /* Mailbox 12 Transmit Acknowledge */ | ||
| 2603 | #define TA13 0x2000 /* Mailbox 13 Transmit Acknowledge */ | ||
| 2604 | #define TA14 0x4000 /* Mailbox 14 Transmit Acknowledge */ | ||
| 2605 | #define TA15 0x8000 /* Mailbox 15 Transmit Acknowledge */ | ||
| 2606 | |||
| 2607 | /* Bit masks for CAN0_TA2 */ | ||
| 2608 | |||
| 2609 | #define TA16 0x1 /* Mailbox 16 Transmit Acknowledge */ | ||
| 2610 | #define TA17 0x2 /* Mailbox 17 Transmit Acknowledge */ | ||
| 2611 | #define TA18 0x4 /* Mailbox 18 Transmit Acknowledge */ | ||
| 2612 | #define TA19 0x8 /* Mailbox 19 Transmit Acknowledge */ | ||
| 2613 | #define TA20 0x10 /* Mailbox 20 Transmit Acknowledge */ | ||
| 2614 | #define TA21 0x20 /* Mailbox 21 Transmit Acknowledge */ | ||
| 2615 | #define TA22 0x40 /* Mailbox 22 Transmit Acknowledge */ | ||
| 2616 | #define TA23 0x80 /* Mailbox 23 Transmit Acknowledge */ | ||
| 2617 | #define TA24 0x100 /* Mailbox 24 Transmit Acknowledge */ | ||
| 2618 | #define TA25 0x200 /* Mailbox 25 Transmit Acknowledge */ | ||
| 2619 | #define TA26 0x400 /* Mailbox 26 Transmit Acknowledge */ | ||
| 2620 | #define TA27 0x800 /* Mailbox 27 Transmit Acknowledge */ | ||
| 2621 | #define TA28 0x1000 /* Mailbox 28 Transmit Acknowledge */ | ||
| 2622 | #define TA29 0x2000 /* Mailbox 29 Transmit Acknowledge */ | ||
| 2623 | #define TA30 0x4000 /* Mailbox 30 Transmit Acknowledge */ | ||
| 2624 | #define TA31 0x8000 /* Mailbox 31 Transmit Acknowledge */ | ||
| 2625 | |||
| 2626 | /* Bit masks for CAN0_RFH1 */ | ||
| 2627 | |||
| 2628 | #define RFH0 0x1 /* Mailbox 0 Remote Frame Handling Enable */ | ||
| 2629 | #define RFH1 0x2 /* Mailbox 1 Remote Frame Handling Enable */ | ||
| 2630 | #define RFH2 0x4 /* Mailbox 2 Remote Frame Handling Enable */ | ||
| 2631 | #define RFH3 0x8 /* Mailbox 3 Remote Frame Handling Enable */ | ||
| 2632 | #define RFH4 0x10 /* Mailbox 4 Remote Frame Handling Enable */ | ||
| 2633 | #define RFH5 0x20 /* Mailbox 5 Remote Frame Handling Enable */ | ||
| 2634 | #define RFH6 0x40 /* Mailbox 6 Remote Frame Handling Enable */ | ||
| 2635 | #define RFH7 0x80 /* Mailbox 7 Remote Frame Handling Enable */ | ||
| 2636 | #define RFH8 0x100 /* Mailbox 8 Remote Frame Handling Enable */ | ||
| 2637 | #define RFH9 0x200 /* Mailbox 9 Remote Frame Handling Enable */ | ||
| 2638 | #define RFH10 0x400 /* Mailbox 10 Remote Frame Handling Enable */ | ||
| 2639 | #define RFH11 0x800 /* Mailbox 11 Remote Frame Handling Enable */ | ||
| 2640 | #define RFH12 0x1000 /* Mailbox 12 Remote Frame Handling Enable */ | ||
| 2641 | #define RFH13 0x2000 /* Mailbox 13 Remote Frame Handling Enable */ | ||
| 2642 | #define RFH14 0x4000 /* Mailbox 14 Remote Frame Handling Enable */ | ||
| 2643 | #define RFH15 0x8000 /* Mailbox 15 Remote Frame Handling Enable */ | ||
| 2644 | |||
| 2645 | /* Bit masks for CAN0_RFH2 */ | ||
| 2646 | |||
| 2647 | #define RFH16 0x1 /* Mailbox 16 Remote Frame Handling Enable */ | ||
| 2648 | #define RFH17 0x2 /* Mailbox 17 Remote Frame Handling Enable */ | ||
| 2649 | #define RFH18 0x4 /* Mailbox 18 Remote Frame Handling Enable */ | ||
| 2650 | #define RFH19 0x8 /* Mailbox 19 Remote Frame Handling Enable */ | ||
| 2651 | #define RFH20 0x10 /* Mailbox 20 Remote Frame Handling Enable */ | ||
| 2652 | #define RFH21 0x20 /* Mailbox 21 Remote Frame Handling Enable */ | ||
| 2653 | #define RFH22 0x40 /* Mailbox 22 Remote Frame Handling Enable */ | ||
| 2654 | #define RFH23 0x80 /* Mailbox 23 Remote Frame Handling Enable */ | ||
| 2655 | #define RFH24 0x100 /* Mailbox 24 Remote Frame Handling Enable */ | ||
| 2656 | #define RFH25 0x200 /* Mailbox 25 Remote Frame Handling Enable */ | ||
| 2657 | #define RFH26 0x400 /* Mailbox 26 Remote Frame Handling Enable */ | ||
| 2658 | #define RFH27 0x800 /* Mailbox 27 Remote Frame Handling Enable */ | ||
| 2659 | #define RFH28 0x1000 /* Mailbox 28 Remote Frame Handling Enable */ | ||
| 2660 | #define RFH29 0x2000 /* Mailbox 29 Remote Frame Handling Enable */ | ||
| 2661 | #define RFH30 0x4000 /* Mailbox 30 Remote Frame Handling Enable */ | ||
| 2662 | #define RFH31 0x8000 /* Mailbox 31 Remote Frame Handling Enable */ | ||
| 2663 | |||
| 2664 | /* Bit masks for CAN0_MBIM1 */ | ||
| 2665 | |||
| 2666 | #define MBIM0 0x1 /* Mailbox 0 Mailbox Interrupt Mask */ | ||
| 2667 | #define MBIM1 0x2 /* Mailbox 1 Mailbox Interrupt Mask */ | ||
| 2668 | #define MBIM2 0x4 /* Mailbox 2 Mailbox Interrupt Mask */ | ||
| 2669 | #define MBIM3 0x8 /* Mailbox 3 Mailbox Interrupt Mask */ | ||
| 2670 | #define MBIM4 0x10 /* Mailbox 4 Mailbox Interrupt Mask */ | ||
| 2671 | #define MBIM5 0x20 /* Mailbox 5 Mailbox Interrupt Mask */ | ||
| 2672 | #define MBIM6 0x40 /* Mailbox 6 Mailbox Interrupt Mask */ | ||
| 2673 | #define MBIM7 0x80 /* Mailbox 7 Mailbox Interrupt Mask */ | ||
| 2674 | #define MBIM8 0x100 /* Mailbox 8 Mailbox Interrupt Mask */ | ||
| 2675 | #define MBIM9 0x200 /* Mailbox 9 Mailbox Interrupt Mask */ | ||
| 2676 | #define MBIM10 0x400 /* Mailbox 10 Mailbox Interrupt Mask */ | ||
| 2677 | #define MBIM11 0x800 /* Mailbox 11 Mailbox Interrupt Mask */ | ||
| 2678 | #define MBIM12 0x1000 /* Mailbox 12 Mailbox Interrupt Mask */ | ||
| 2679 | #define MBIM13 0x2000 /* Mailbox 13 Mailbox Interrupt Mask */ | ||
| 2680 | #define MBIM14 0x4000 /* Mailbox 14 Mailbox Interrupt Mask */ | ||
| 2681 | #define MBIM15 0x8000 /* Mailbox 15 Mailbox Interrupt Mask */ | ||
| 2682 | |||
| 2683 | /* Bit masks for CAN0_MBIM2 */ | ||
| 2684 | |||
| 2685 | #define MBIM16 0x1 /* Mailbox 16 Mailbox Interrupt Mask */ | ||
| 2686 | #define MBIM17 0x2 /* Mailbox 17 Mailbox Interrupt Mask */ | ||
| 2687 | #define MBIM18 0x4 /* Mailbox 18 Mailbox Interrupt Mask */ | ||
| 2688 | #define MBIM19 0x8 /* Mailbox 19 Mailbox Interrupt Mask */ | ||
| 2689 | #define MBIM20 0x10 /* Mailbox 20 Mailbox Interrupt Mask */ | ||
| 2690 | #define MBIM21 0x20 /* Mailbox 21 Mailbox Interrupt Mask */ | ||
| 2691 | #define MBIM22 0x40 /* Mailbox 22 Mailbox Interrupt Mask */ | ||
| 2692 | #define MBIM23 0x80 /* Mailbox 23 Mailbox Interrupt Mask */ | ||
| 2693 | #define MBIM24 0x100 /* Mailbox 24 Mailbox Interrupt Mask */ | ||
| 2694 | #define MBIM25 0x200 /* Mailbox 25 Mailbox Interrupt Mask */ | ||
| 2695 | #define MBIM26 0x400 /* Mailbox 26 Mailbox Interrupt Mask */ | ||
| 2696 | #define MBIM27 0x800 /* Mailbox 27 Mailbox Interrupt Mask */ | ||
| 2697 | #define MBIM28 0x1000 /* Mailbox 28 Mailbox Interrupt Mask */ | ||
| 2698 | #define MBIM29 0x2000 /* Mailbox 29 Mailbox Interrupt Mask */ | ||
| 2699 | #define MBIM30 0x4000 /* Mailbox 30 Mailbox Interrupt Mask */ | ||
| 2700 | #define MBIM31 0x8000 /* Mailbox 31 Mailbox Interrupt Mask */ | ||
| 2701 | |||
| 2702 | /* Bit masks for CAN0_MBTIF1 */ | ||
| 2703 | |||
| 2704 | #define MBTIF0 0x1 /* Mailbox 0 Mailbox Transmit Interrupt Flag */ | ||
| 2705 | #define MBTIF1 0x2 /* Mailbox 1 Mailbox Transmit Interrupt Flag */ | ||
| 2706 | #define MBTIF2 0x4 /* Mailbox 2 Mailbox Transmit Interrupt Flag */ | ||
| 2707 | #define MBTIF3 0x8 /* Mailbox 3 Mailbox Transmit Interrupt Flag */ | ||
| 2708 | #define MBTIF4 0x10 /* Mailbox 4 Mailbox Transmit Interrupt Flag */ | ||
| 2709 | #define MBTIF5 0x20 /* Mailbox 5 Mailbox Transmit Interrupt Flag */ | ||
| 2710 | #define MBTIF6 0x40 /* Mailbox 6 Mailbox Transmit Interrupt Flag */ | ||
| 2711 | #define MBTIF7 0x80 /* Mailbox 7 Mailbox Transmit Interrupt Flag */ | ||
| 2712 | #define MBTIF8 0x100 /* Mailbox 8 Mailbox Transmit Interrupt Flag */ | ||
| 2713 | #define MBTIF9 0x200 /* Mailbox 9 Mailbox Transmit Interrupt Flag */ | ||
| 2714 | #define MBTIF10 0x400 /* Mailbox 10 Mailbox Transmit Interrupt Flag */ | ||
| 2715 | #define MBTIF11 0x800 /* Mailbox 11 Mailbox Transmit Interrupt Flag */ | ||
| 2716 | #define MBTIF12 0x1000 /* Mailbox 12 Mailbox Transmit Interrupt Flag */ | ||
| 2717 | #define MBTIF13 0x2000 /* Mailbox 13 Mailbox Transmit Interrupt Flag */ | ||
| 2718 | #define MBTIF14 0x4000 /* Mailbox 14 Mailbox Transmit Interrupt Flag */ | ||
| 2719 | #define MBTIF15 0x8000 /* Mailbox 15 Mailbox Transmit Interrupt Flag */ | ||
| 2720 | |||
| 2721 | /* Bit masks for CAN0_MBTIF2 */ | ||
| 2722 | |||
| 2723 | #define MBTIF16 0x1 /* Mailbox 16 Mailbox Transmit Interrupt Flag */ | ||
| 2724 | #define MBTIF17 0x2 /* Mailbox 17 Mailbox Transmit Interrupt Flag */ | ||
| 2725 | #define MBTIF18 0x4 /* Mailbox 18 Mailbox Transmit Interrupt Flag */ | ||
| 2726 | #define MBTIF19 0x8 /* Mailbox 19 Mailbox Transmit Interrupt Flag */ | ||
| 2727 | #define MBTIF20 0x10 /* Mailbox 20 Mailbox Transmit Interrupt Flag */ | ||
| 2728 | #define MBTIF21 0x20 /* Mailbox 21 Mailbox Transmit Interrupt Flag */ | ||
| 2729 | #define MBTIF22 0x40 /* Mailbox 22 Mailbox Transmit Interrupt Flag */ | ||
| 2730 | #define MBTIF23 0x80 /* Mailbox 23 Mailbox Transmit Interrupt Flag */ | ||
| 2731 | #define MBTIF24 0x100 /* Mailbox 24 Mailbox Transmit Interrupt Flag */ | ||
| 2732 | #define MBTIF25 0x200 /* Mailbox 25 Mailbox Transmit Interrupt Flag */ | ||
| 2733 | #define MBTIF26 0x400 /* Mailbox 26 Mailbox Transmit Interrupt Flag */ | ||
| 2734 | #define MBTIF27 0x800 /* Mailbox 27 Mailbox Transmit Interrupt Flag */ | ||
| 2735 | #define MBTIF28 0x1000 /* Mailbox 28 Mailbox Transmit Interrupt Flag */ | ||
| 2736 | #define MBTIF29 0x2000 /* Mailbox 29 Mailbox Transmit Interrupt Flag */ | ||
| 2737 | #define MBTIF30 0x4000 /* Mailbox 30 Mailbox Transmit Interrupt Flag */ | ||
| 2738 | #define MBTIF31 0x8000 /* Mailbox 31 Mailbox Transmit Interrupt Flag */ | ||
| 2739 | |||
| 2740 | /* Bit masks for CAN0_MBRIF1 */ | ||
| 2741 | |||
| 2742 | #define MBRIF0 0x1 /* Mailbox 0 Mailbox Receive Interrupt Flag */ | ||
| 2743 | #define MBRIF1 0x2 /* Mailbox 1 Mailbox Receive Interrupt Flag */ | ||
| 2744 | #define MBRIF2 0x4 /* Mailbox 2 Mailbox Receive Interrupt Flag */ | ||
| 2745 | #define MBRIF3 0x8 /* Mailbox 3 Mailbox Receive Interrupt Flag */ | ||
| 2746 | #define MBRIF4 0x10 /* Mailbox 4 Mailbox Receive Interrupt Flag */ | ||
| 2747 | #define MBRIF5 0x20 /* Mailbox 5 Mailbox Receive Interrupt Flag */ | ||
| 2748 | #define MBRIF6 0x40 /* Mailbox 6 Mailbox Receive Interrupt Flag */ | ||
| 2749 | #define MBRIF7 0x80 /* Mailbox 7 Mailbox Receive Interrupt Flag */ | ||
| 2750 | #define MBRIF8 0x100 /* Mailbox 8 Mailbox Receive Interrupt Flag */ | ||
| 2751 | #define MBRIF9 0x200 /* Mailbox 9 Mailbox Receive Interrupt Flag */ | ||
| 2752 | #define MBRIF10 0x400 /* Mailbox 10 Mailbox Receive Interrupt Flag */ | ||
| 2753 | #define MBRIF11 0x800 /* Mailbox 11 Mailbox Receive Interrupt Flag */ | ||
| 2754 | #define MBRIF12 0x1000 /* Mailbox 12 Mailbox Receive Interrupt Flag */ | ||
| 2755 | #define MBRIF13 0x2000 /* Mailbox 13 Mailbox Receive Interrupt Flag */ | ||
| 2756 | #define MBRIF14 0x4000 /* Mailbox 14 Mailbox Receive Interrupt Flag */ | ||
| 2757 | #define MBRIF15 0x8000 /* Mailbox 15 Mailbox Receive Interrupt Flag */ | ||
| 2758 | |||
| 2759 | /* Bit masks for CAN0_MBRIF2 */ | ||
| 2760 | |||
| 2761 | #define MBRIF16 0x1 /* Mailbox 16 Mailbox Receive Interrupt Flag */ | ||
| 2762 | #define MBRIF17 0x2 /* Mailbox 17 Mailbox Receive Interrupt Flag */ | ||
| 2763 | #define MBRIF18 0x4 /* Mailbox 18 Mailbox Receive Interrupt Flag */ | ||
| 2764 | #define MBRIF19 0x8 /* Mailbox 19 Mailbox Receive Interrupt Flag */ | ||
| 2765 | #define MBRIF20 0x10 /* Mailbox 20 Mailbox Receive Interrupt Flag */ | ||
| 2766 | #define MBRIF21 0x20 /* Mailbox 21 Mailbox Receive Interrupt Flag */ | ||
| 2767 | #define MBRIF22 0x40 /* Mailbox 22 Mailbox Receive Interrupt Flag */ | ||
| 2768 | #define MBRIF23 0x80 /* Mailbox 23 Mailbox Receive Interrupt Flag */ | ||
| 2769 | #define MBRIF24 0x100 /* Mailbox 24 Mailbox Receive Interrupt Flag */ | ||
| 2770 | #define MBRIF25 0x200 /* Mailbox 25 Mailbox Receive Interrupt Flag */ | ||
| 2771 | #define MBRIF26 0x400 /* Mailbox 26 Mailbox Receive Interrupt Flag */ | ||
| 2772 | #define MBRIF27 0x800 /* Mailbox 27 Mailbox Receive Interrupt Flag */ | ||
| 2773 | #define MBRIF28 0x1000 /* Mailbox 28 Mailbox Receive Interrupt Flag */ | ||
| 2774 | #define MBRIF29 0x2000 /* Mailbox 29 Mailbox Receive Interrupt Flag */ | ||
| 2775 | #define MBRIF30 0x4000 /* Mailbox 30 Mailbox Receive Interrupt Flag */ | ||
| 2776 | #define MBRIF31 0x8000 /* Mailbox 31 Mailbox Receive Interrupt Flag */ | ||
| 2777 | |||
| 2778 | /* Bit masks for EPPIx_STATUS */ | 2107 | /* Bit masks for EPPIx_STATUS */ |
| 2779 | 2108 | ||
| 2780 | #define CFIFO_ERR 0x1 /* Chroma FIFO Error */ | 2109 | #define CFIFO_ERR 0x1 /* Chroma FIFO Error */ |