diff options
-rw-r--r-- | drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 19 |
1 files changed, 12 insertions, 7 deletions
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index b5b865f4f92b..086e52af1bc7 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c | |||
@@ -289,17 +289,22 @@ static int tilcdc_crtc_mode_set(struct drm_crtc *crtc, | |||
289 | reg = tilcdc_read(dev, LCDC_RASTER_TIMING_2_REG) & ~0x000fff00; | 289 | reg = tilcdc_read(dev, LCDC_RASTER_TIMING_2_REG) & ~0x000fff00; |
290 | reg |= LCDC_AC_BIAS_FREQUENCY(info->ac_bias) | | 290 | reg |= LCDC_AC_BIAS_FREQUENCY(info->ac_bias) | |
291 | LCDC_AC_BIAS_TRANSITIONS_PER_INT(info->ac_bias_intrpt); | 291 | LCDC_AC_BIAS_TRANSITIONS_PER_INT(info->ac_bias_intrpt); |
292 | |||
293 | /* | ||
294 | * subtract one from hfp, hbp, hsw because the hardware uses | ||
295 | * a value of 0 as 1 | ||
296 | */ | ||
292 | if (priv->rev == 2) { | 297 | if (priv->rev == 2) { |
293 | reg |= (hfp & 0x300) >> 8; | 298 | reg |= ((hfp-1) & 0x300) >> 8; |
294 | reg |= (hbp & 0x300) >> 4; | 299 | reg |= ((hbp-1) & 0x300) >> 4; |
295 | reg |= (hsw & 0x3c0) << 21; | 300 | reg |= ((hsw-1) & 0x3c0) << 21; |
296 | } | 301 | } |
297 | tilcdc_write(dev, LCDC_RASTER_TIMING_2_REG, reg); | 302 | tilcdc_write(dev, LCDC_RASTER_TIMING_2_REG, reg); |
298 | 303 | ||
299 | reg = (((mode->hdisplay >> 4) - 1) << 4) | | 304 | reg = (((mode->hdisplay >> 4) - 1) << 4) | |
300 | ((hbp & 0xff) << 24) | | 305 | (((hbp-1) & 0xff) << 24) | |
301 | ((hfp & 0xff) << 16) | | 306 | (((hfp-1) & 0xff) << 16) | |
302 | ((hsw & 0x3f) << 10); | 307 | (((hsw-1) & 0x3f) << 10); |
303 | if (priv->rev == 2) | 308 | if (priv->rev == 2) |
304 | reg |= (((mode->hdisplay >> 4) - 1) & 0x40) >> 3; | 309 | reg |= (((mode->hdisplay >> 4) - 1) & 0x40) >> 3; |
305 | tilcdc_write(dev, LCDC_RASTER_TIMING_0_REG, reg); | 310 | tilcdc_write(dev, LCDC_RASTER_TIMING_0_REG, reg); |
@@ -307,7 +312,7 @@ static int tilcdc_crtc_mode_set(struct drm_crtc *crtc, | |||
307 | reg = ((mode->vdisplay - 1) & 0x3ff) | | 312 | reg = ((mode->vdisplay - 1) & 0x3ff) | |
308 | ((vbp & 0xff) << 24) | | 313 | ((vbp & 0xff) << 24) | |
309 | ((vfp & 0xff) << 16) | | 314 | ((vfp & 0xff) << 16) | |
310 | ((vsw & 0x3f) << 10); | 315 | (((vsw-1) & 0x3f) << 10); |
311 | tilcdc_write(dev, LCDC_RASTER_TIMING_1_REG, reg); | 316 | tilcdc_write(dev, LCDC_RASTER_TIMING_1_REG, reg); |
312 | 317 | ||
313 | /* | 318 | /* |