diff options
-rw-r--r-- | arch/arm/boot/dts/qcom-apq8084.dtsi | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index df2e308d06d3..7084010ee61b 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi | |||
@@ -22,6 +22,7 @@ | |||
22 | next-level-cache = <&L2>; | 22 | next-level-cache = <&L2>; |
23 | qcom,acc = <&acc0>; | 23 | qcom,acc = <&acc0>; |
24 | qcom,saw = <&saw0>; | 24 | qcom,saw = <&saw0>; |
25 | cpu-idle-states = <&CPU_SPC>; | ||
25 | }; | 26 | }; |
26 | 27 | ||
27 | cpu@1 { | 28 | cpu@1 { |
@@ -32,6 +33,7 @@ | |||
32 | next-level-cache = <&L2>; | 33 | next-level-cache = <&L2>; |
33 | qcom,acc = <&acc1>; | 34 | qcom,acc = <&acc1>; |
34 | qcom,saw = <&saw1>; | 35 | qcom,saw = <&saw1>; |
36 | cpu-idle-states = <&CPU_SPC>; | ||
35 | }; | 37 | }; |
36 | 38 | ||
37 | cpu@2 { | 39 | cpu@2 { |
@@ -42,6 +44,7 @@ | |||
42 | next-level-cache = <&L2>; | 44 | next-level-cache = <&L2>; |
43 | qcom,acc = <&acc2>; | 45 | qcom,acc = <&acc2>; |
44 | qcom,saw = <&saw2>; | 46 | qcom,saw = <&saw2>; |
47 | cpu-idle-states = <&CPU_SPC>; | ||
45 | }; | 48 | }; |
46 | 49 | ||
47 | cpu@3 { | 50 | cpu@3 { |
@@ -52,6 +55,7 @@ | |||
52 | next-level-cache = <&L2>; | 55 | next-level-cache = <&L2>; |
53 | qcom,acc = <&acc3>; | 56 | qcom,acc = <&acc3>; |
54 | qcom,saw = <&saw3>; | 57 | qcom,saw = <&saw3>; |
58 | cpu-idle-states = <&CPU_SPC>; | ||
55 | }; | 59 | }; |
56 | 60 | ||
57 | L2: l2-cache { | 61 | L2: l2-cache { |
@@ -59,6 +63,16 @@ | |||
59 | cache-level = <2>; | 63 | cache-level = <2>; |
60 | qcom,saw = <&saw_l2>; | 64 | qcom,saw = <&saw_l2>; |
61 | }; | 65 | }; |
66 | |||
67 | idle-states { | ||
68 | CPU_SPC: spc { | ||
69 | compatible = "qcom,idle-state-spc", | ||
70 | "arm,idle-state"; | ||
71 | entry-latency-us = <150>; | ||
72 | exit-latency-us = <200>; | ||
73 | min-residency-us = <2000>; | ||
74 | }; | ||
75 | }; | ||
62 | }; | 76 | }; |
63 | 77 | ||
64 | cpu-pmu { | 78 | cpu-pmu { |