diff options
| -rw-r--r-- | arch/m68k/include/asm/cacheflush_no.h | 7 | ||||
| -rw-r--r-- | arch/m68k/include/asm/m54xxacr.h | 38 | ||||
| -rw-r--r-- | arch/m68knommu/platform/coldfire/Makefile | 2 | ||||
| -rw-r--r-- | arch/m68knommu/platform/coldfire/cache.c | 48 |
4 files changed, 56 insertions, 39 deletions
diff --git a/arch/m68k/include/asm/cacheflush_no.h b/arch/m68k/include/asm/cacheflush_no.h index 8ada4ffc98e5..f931e1829835 100644 --- a/arch/m68k/include/asm/cacheflush_no.h +++ b/arch/m68k/include/asm/cacheflush_no.h | |||
| @@ -30,9 +30,13 @@ | |||
| 30 | #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ | 30 | #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ |
| 31 | memcpy(dst, src, len) | 31 | memcpy(dst, src, len) |
| 32 | 32 | ||
| 33 | #ifndef __flush_cache_all | 33 | void mcf_cache_push(void); |
| 34 | |||
| 34 | static inline void __flush_cache_all(void) | 35 | static inline void __flush_cache_all(void) |
| 35 | { | 36 | { |
| 37 | #ifdef CACHE_PUSH | ||
| 38 | mcf_cache_push(); | ||
| 39 | #endif | ||
| 36 | #ifdef CACHE_INVALIDATE | 40 | #ifdef CACHE_INVALIDATE |
| 37 | __asm__ __volatile__ ( | 41 | __asm__ __volatile__ ( |
| 38 | "movel %0, %%d0\n\t" | 42 | "movel %0, %%d0\n\t" |
| @@ -41,6 +45,5 @@ static inline void __flush_cache_all(void) | |||
| 41 | : : "i" (CACHE_INVALIDATE) : "d0" ); | 45 | : : "i" (CACHE_INVALIDATE) : "d0" ); |
| 42 | #endif | 46 | #endif |
| 43 | } | 47 | } |
| 44 | #endif /* __flush_cache_all */ | ||
| 45 | 48 | ||
| 46 | #endif /* _M68KNOMMU_CACHEFLUSH_H */ | 49 | #endif /* _M68KNOMMU_CACHEFLUSH_H */ |
diff --git a/arch/m68k/include/asm/m54xxacr.h b/arch/m68k/include/asm/m54xxacr.h index 3c81a7a34a8f..6bce82fdb9c3 100644 --- a/arch/m68k/include/asm/m54xxacr.h +++ b/arch/m68k/include/asm/m54xxacr.h | |||
| @@ -83,46 +83,12 @@ | |||
| 83 | #define ACR2_MODE (0x000f0000+INSN_CACHE_MODE) | 83 | #define ACR2_MODE (0x000f0000+INSN_CACHE_MODE) |
| 84 | #define ACR3_MODE 0 | 84 | #define ACR3_MODE 0 |
| 85 | 85 | ||
| 86 | #ifndef __ASSEMBLY__ | ||
| 87 | |||
| 88 | #if ((DATA_CACHE_MODE & ACR_CM) == ACR_CM_WT) | 86 | #if ((DATA_CACHE_MODE & ACR_CM) == ACR_CM_WT) |
| 89 | #define flush_dcache_range(a, l) do { asm("nop"); } while (0) | 87 | #define flush_dcache_range(a, l) do { asm("nop"); } while (0) |
| 90 | #endif | 88 | #endif |
| 91 | |||
| 92 | static inline void __m54xx_flush_cache_all(void) | ||
| 93 | { | ||
| 94 | __asm__ __volatile__ ( | ||
| 95 | #if ((DATA_CACHE_MODE & ACR_CM) == ACR_CM_CP) | 89 | #if ((DATA_CACHE_MODE & ACR_CM) == ACR_CM_CP) |
| 96 | /* | 90 | /* Copyback cache mode must push dirty cache lines first */ |
| 97 | * Use cpushl to push and invalidate all cache lines. | 91 | #define CACHE_PUSH |
| 98 | * Gas doesn't seem to know how to generate the ColdFire | ||
| 99 | * cpushl instruction... Oh well, bit stuff it for now. | ||
| 100 | */ | ||
| 101 | "clrl %%d0\n\t" | ||
| 102 | "1:\n\t" | ||
| 103 | "movel %%d0,%%a0\n\t" | ||
| 104 | "2:\n\t" | ||
| 105 | ".word 0xf468\n\t" | ||
| 106 | "addl %0,%%a0\n\t" | ||
| 107 | "cmpl %1,%%a0\n\t" | ||
| 108 | "blt 2b\n\t" | ||
| 109 | "addql #1,%%d0\n\t" | ||
| 110 | "cmpil %2,%%d0\n\t" | ||
| 111 | "bne 1b\n\t" | ||
| 112 | #endif | 92 | #endif |
| 113 | "movel %3,%%d0\n\t" | ||
| 114 | "movec %%d0,%%CACR\n\t" | ||
| 115 | "nop\n\t" /* forces flush of Store Buffer */ | ||
| 116 | : /* No output */ | ||
| 117 | : "i" (CACHE_LINE_SIZE), | ||
| 118 | "i" (DCACHE_SIZE / CACHE_WAYS), | ||
| 119 | "i" (CACHE_WAYS), | ||
| 120 | "i" (CACHE_INVALIDATE) | ||
| 121 | : "d0", "a0" ); | ||
| 122 | } | ||
| 123 | |||
| 124 | #define __flush_cache_all() __m54xx_flush_cache_all() | ||
| 125 | |||
| 126 | #endif /* __ASSEMBLY__ */ | ||
| 127 | 93 | ||
| 128 | #endif /* m54xxacr_h */ | 94 | #endif /* m54xxacr_h */ |
diff --git a/arch/m68knommu/platform/coldfire/Makefile b/arch/m68knommu/platform/coldfire/Makefile index 53a27e1a7904..a8967baabd72 100644 --- a/arch/m68knommu/platform/coldfire/Makefile +++ b/arch/m68knommu/platform/coldfire/Makefile | |||
| @@ -14,7 +14,7 @@ | |||
| 14 | 14 | ||
| 15 | asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1 | 15 | asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1 |
| 16 | 16 | ||
| 17 | obj-$(CONFIG_COLDFIRE) += clk.o dma.o entry.o vectors.o | 17 | obj-$(CONFIG_COLDFIRE) += cache.o clk.o dma.o entry.o vectors.o |
| 18 | obj-$(CONFIG_M5206) += timers.o intc.o | 18 | obj-$(CONFIG_M5206) += timers.o intc.o |
| 19 | obj-$(CONFIG_M5206e) += timers.o intc.o | 19 | obj-$(CONFIG_M5206e) += timers.o intc.o |
| 20 | obj-$(CONFIG_M520x) += pit.o intc-simr.o | 20 | obj-$(CONFIG_M520x) += pit.o intc-simr.o |
diff --git a/arch/m68knommu/platform/coldfire/cache.c b/arch/m68knommu/platform/coldfire/cache.c new file mode 100644 index 000000000000..235d3c4f4f0f --- /dev/null +++ b/arch/m68knommu/platform/coldfire/cache.c | |||
| @@ -0,0 +1,48 @@ | |||
| 1 | /***************************************************************************/ | ||
| 2 | |||
| 3 | /* | ||
| 4 | * cache.c -- general ColdFire Cache maintainence code | ||
| 5 | * | ||
| 6 | * Copyright (C) 2010, Greg Ungerer (gerg@snapgear.com) | ||
| 7 | */ | ||
| 8 | |||
| 9 | /***************************************************************************/ | ||
| 10 | |||
| 11 | #include <linux/kernel.h> | ||
| 12 | #include <asm/coldfire.h> | ||
| 13 | #include <asm/mcfsim.h> | ||
| 14 | |||
| 15 | /***************************************************************************/ | ||
| 16 | #ifdef CACHE_PUSH | ||
| 17 | /***************************************************************************/ | ||
| 18 | |||
| 19 | /* | ||
| 20 | * Use cpushl to push all dirty cache lines back to memory. | ||
| 21 | * Older versions of GAS don't seem to know how to generate the | ||
| 22 | * ColdFire cpushl instruction... Oh well, bit stuff it for now. | ||
| 23 | */ | ||
| 24 | |||
| 25 | void mcf_cache_push(void) | ||
| 26 | { | ||
| 27 | __asm__ __volatile__ ( | ||
| 28 | "clrl %%d0\n\t" | ||
| 29 | "1:\n\t" | ||
| 30 | "movel %%d0,%%a0\n\t" | ||
| 31 | "2:\n\t" | ||
| 32 | ".word 0xf468\n\t" | ||
| 33 | "addl %0,%%a0\n\t" | ||
| 34 | "cmpl %1,%%a0\n\t" | ||
| 35 | "blt 2b\n\t" | ||
| 36 | "addql #1,%%d0\n\t" | ||
| 37 | "cmpil %2,%%d0\n\t" | ||
| 38 | "bne 1b\n\t" | ||
| 39 | : /* No output */ | ||
| 40 | : "i" (CACHE_LINE_SIZE), | ||
| 41 | "i" (DCACHE_SIZE / CACHE_WAYS), | ||
| 42 | "i" (CACHE_WAYS) | ||
| 43 | : "d0", "a0" ); | ||
| 44 | } | ||
| 45 | |||
| 46 | /***************************************************************************/ | ||
| 47 | #endif /* CACHE_PUSH */ | ||
| 48 | /***************************************************************************/ | ||
