diff options
| -rw-r--r-- | arch/arm/boot/dts/sama5d3.dtsi | 379 | ||||
| -rw-r--r-- | arch/arm/boot/dts/sama5d3_can.dtsi | 20 | ||||
| -rw-r--r-- | arch/arm/boot/dts/sama5d3_emac.dtsi | 11 | ||||
| -rw-r--r-- | arch/arm/boot/dts/sama5d3_gmac.dtsi | 11 | ||||
| -rw-r--r-- | arch/arm/boot/dts/sama5d3_lcd.dtsi | 17 | ||||
| -rw-r--r-- | arch/arm/boot/dts/sama5d3_mci2.dtsi | 12 | ||||
| -rw-r--r-- | arch/arm/boot/dts/sama5d3_tcb1.dtsi | 12 | ||||
| -rw-r--r-- | arch/arm/boot/dts/sama5d3_uart.dtsi | 21 |
8 files changed, 482 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi index 5cdaba4cea86..de9feced9935 100644 --- a/arch/arm/boot/dts/sama5d3.dtsi +++ b/arch/arm/boot/dts/sama5d3.dtsi | |||
| @@ -13,6 +13,7 @@ | |||
| 13 | #include <dt-bindings/pinctrl/at91.h> | 13 | #include <dt-bindings/pinctrl/at91.h> |
| 14 | #include <dt-bindings/interrupt-controller/irq.h> | 14 | #include <dt-bindings/interrupt-controller/irq.h> |
| 15 | #include <dt-bindings/gpio/gpio.h> | 15 | #include <dt-bindings/gpio/gpio.h> |
| 16 | #include <dt-bindings/clk/at91.h> | ||
| 16 | 17 | ||
| 17 | / { | 18 | / { |
| 18 | model = "Atmel SAMA5D3 family SoC"; | 19 | model = "Atmel SAMA5D3 family SoC"; |
| @@ -56,6 +57,14 @@ | |||
| 56 | reg = <0x20000000 0x8000000>; | 57 | reg = <0x20000000 0x8000000>; |
| 57 | }; | 58 | }; |
| 58 | 59 | ||
| 60 | clocks { | ||
| 61 | adc_op_clk: adc_op_clk{ | ||
| 62 | compatible = "fixed-clock"; | ||
| 63 | #clock-cells = <0>; | ||
| 64 | clock-frequency = <20000000>; | ||
| 65 | }; | ||
| 66 | }; | ||
| 67 | |||
| 59 | ahb { | 68 | ahb { |
| 60 | compatible = "simple-bus"; | 69 | compatible = "simple-bus"; |
| 61 | #address-cells = <1>; | 70 | #address-cells = <1>; |
| @@ -79,6 +88,8 @@ | |||
| 79 | status = "disabled"; | 88 | status = "disabled"; |
| 80 | #address-cells = <1>; | 89 | #address-cells = <1>; |
| 81 | #size-cells = <0>; | 90 | #size-cells = <0>; |
| 91 | clocks = <&mci0_clk>; | ||
| 92 | clock-names = "mci_clk"; | ||
| 82 | }; | 93 | }; |
| 83 | 94 | ||
| 84 | spi0: spi@f0004000 { | 95 | spi0: spi@f0004000 { |
| @@ -92,6 +103,8 @@ | |||
| 92 | dma-names = "tx", "rx"; | 103 | dma-names = "tx", "rx"; |
| 93 | pinctrl-names = "default"; | 104 | pinctrl-names = "default"; |
| 94 | pinctrl-0 = <&pinctrl_spi0>; | 105 | pinctrl-0 = <&pinctrl_spi0>; |
| 106 | clocks = <&spi0_clk>; | ||
| 107 | clock-names = "spi_clk"; | ||
| 95 | status = "disabled"; | 108 | status = "disabled"; |
| 96 | }; | 109 | }; |
| 97 | 110 | ||
| @@ -101,6 +114,8 @@ | |||
| 101 | interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>; | 114 | interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>; |
| 102 | pinctrl-names = "default"; | 115 | pinctrl-names = "default"; |
| 103 | pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; | 116 | pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; |
| 117 | clocks = <&ssc0_clk>; | ||
| 118 | clock-names = "pclk"; | ||
| 104 | status = "disabled"; | 119 | status = "disabled"; |
| 105 | }; | 120 | }; |
| 106 | 121 | ||
| @@ -108,6 +123,8 @@ | |||
| 108 | compatible = "atmel,at91sam9x5-tcb"; | 123 | compatible = "atmel,at91sam9x5-tcb"; |
| 109 | reg = <0xf0010000 0x100>; | 124 | reg = <0xf0010000 0x100>; |
| 110 | interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; | 125 | interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>; |
| 126 | clocks = <&tcb0_clk>; | ||
| 127 | clock-names = "t0_clk"; | ||
| 111 | }; | 128 | }; |
| 112 | 129 | ||
| 113 | i2c0: i2c@f0014000 { | 130 | i2c0: i2c@f0014000 { |
| @@ -121,6 +138,7 @@ | |||
| 121 | pinctrl-0 = <&pinctrl_i2c0>; | 138 | pinctrl-0 = <&pinctrl_i2c0>; |
| 122 | #address-cells = <1>; | 139 | #address-cells = <1>; |
| 123 | #size-cells = <0>; | 140 | #size-cells = <0>; |
| 141 | clocks = <&twi0_clk>; | ||
| 124 | status = "disabled"; | 142 | status = "disabled"; |
| 125 | }; | 143 | }; |
| 126 | 144 | ||
| @@ -135,6 +153,7 @@ | |||
| 135 | pinctrl-0 = <&pinctrl_i2c1>; | 153 | pinctrl-0 = <&pinctrl_i2c1>; |
| 136 | #address-cells = <1>; | 154 | #address-cells = <1>; |
| 137 | #size-cells = <0>; | 155 | #size-cells = <0>; |
| 156 | clocks = <&twi1_clk>; | ||
| 138 | status = "disabled"; | 157 | status = "disabled"; |
| 139 | }; | 158 | }; |
| 140 | 159 | ||
| @@ -144,6 +163,8 @@ | |||
| 144 | interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>; | 163 | interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>; |
| 145 | pinctrl-names = "default"; | 164 | pinctrl-names = "default"; |
| 146 | pinctrl-0 = <&pinctrl_usart0>; | 165 | pinctrl-0 = <&pinctrl_usart0>; |
| 166 | clocks = <&usart0_clk>; | ||
| 167 | clock-names = "usart"; | ||
| 147 | status = "disabled"; | 168 | status = "disabled"; |
| 148 | }; | 169 | }; |
| 149 | 170 | ||
| @@ -153,6 +174,8 @@ | |||
| 153 | interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>; | 174 | interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>; |
| 154 | pinctrl-names = "default"; | 175 | pinctrl-names = "default"; |
| 155 | pinctrl-0 = <&pinctrl_usart1>; | 176 | pinctrl-0 = <&pinctrl_usart1>; |
| 177 | clocks = <&usart1_clk>; | ||
| 178 | clock-names = "usart"; | ||
| 156 | status = "disabled"; | 179 | status = "disabled"; |
| 157 | }; | 180 | }; |
| 158 | 181 | ||
| @@ -174,6 +197,8 @@ | |||
| 174 | status = "disabled"; | 197 | status = "disabled"; |
| 175 | #address-cells = <1>; | 198 | #address-cells = <1>; |
| 176 | #size-cells = <0>; | 199 | #size-cells = <0>; |
| 200 | clocks = <&mci1_clk>; | ||
| 201 | clock-names = "mci_clk"; | ||
| 177 | }; | 202 | }; |
| 178 | 203 | ||
| 179 | spi1: spi@f8008000 { | 204 | spi1: spi@f8008000 { |
| @@ -187,6 +212,8 @@ | |||
| 187 | dma-names = "tx", "rx"; | 212 | dma-names = "tx", "rx"; |
| 188 | pinctrl-names = "default"; | 213 | pinctrl-names = "default"; |
| 189 | pinctrl-0 = <&pinctrl_spi1>; | 214 | pinctrl-0 = <&pinctrl_spi1>; |
| 215 | clocks = <&spi1_clk>; | ||
| 216 | clock-names = "spi_clk"; | ||
| 190 | status = "disabled"; | 217 | status = "disabled"; |
| 191 | }; | 218 | }; |
| 192 | 219 | ||
| @@ -196,6 +223,8 @@ | |||
| 196 | interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>; | 223 | interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>; |
| 197 | pinctrl-names = "default"; | 224 | pinctrl-names = "default"; |
| 198 | pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; | 225 | pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; |
| 226 | clocks = <&ssc1_clk>; | ||
| 227 | clock-names = "pclk"; | ||
| 199 | status = "disabled"; | 228 | status = "disabled"; |
| 200 | }; | 229 | }; |
| 201 | 230 | ||
| @@ -219,6 +248,9 @@ | |||
| 219 | &pinctrl_adc0_ad10 | 248 | &pinctrl_adc0_ad10 |
| 220 | &pinctrl_adc0_ad11 | 249 | &pinctrl_adc0_ad11 |
| 221 | >; | 250 | >; |
| 251 | clocks = <&adc_clk>, | ||
| 252 | <&adc_op_clk>; | ||
| 253 | clock-names = "adc_clk", "adc_op_clk"; | ||
| 222 | atmel,adc-channel-base = <0x50>; | 254 | atmel,adc-channel-base = <0x50>; |
| 223 | atmel,adc-channels-used = <0xfff>; | 255 | atmel,adc-channels-used = <0xfff>; |
| 224 | atmel,adc-drdy-mask = <0x1000000>; | 256 | atmel,adc-drdy-mask = <0x1000000>; |
| @@ -274,6 +306,7 @@ | |||
| 274 | dma-names = "tx", "rx"; | 306 | dma-names = "tx", "rx"; |
| 275 | #address-cells = <1>; | 307 | #address-cells = <1>; |
| 276 | #size-cells = <0>; | 308 | #size-cells = <0>; |
| 309 | clocks = <&twi2_clk>; | ||
| 277 | status = "disabled"; | 310 | status = "disabled"; |
| 278 | }; | 311 | }; |
| 279 | 312 | ||
| @@ -283,6 +316,8 @@ | |||
| 283 | interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; | 316 | interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; |
| 284 | pinctrl-names = "default"; | 317 | pinctrl-names = "default"; |
| 285 | pinctrl-0 = <&pinctrl_usart2>; | 318 | pinctrl-0 = <&pinctrl_usart2>; |
| 319 | clocks = <&usart2_clk>; | ||
| 320 | clock-names = "usart"; | ||
| 286 | status = "disabled"; | 321 | status = "disabled"; |
| 287 | }; | 322 | }; |
| 288 | 323 | ||
| @@ -292,6 +327,8 @@ | |||
| 292 | interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; | 327 | interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; |
| 293 | pinctrl-names = "default"; | 328 | pinctrl-names = "default"; |
| 294 | pinctrl-0 = <&pinctrl_usart3>; | 329 | pinctrl-0 = <&pinctrl_usart3>; |
| 330 | clocks = <&usart3_clk>; | ||
| 331 | clock-names = "usart"; | ||
| 295 | status = "disabled"; | 332 | status = "disabled"; |
| 296 | }; | 333 | }; |
| 297 | 334 | ||
| @@ -318,6 +355,8 @@ | |||
| 318 | reg = <0xffffe600 0x200>; | 355 | reg = <0xffffe600 0x200>; |
| 319 | interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>; | 356 | interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>; |
| 320 | #dma-cells = <2>; | 357 | #dma-cells = <2>; |
| 358 | clocks = <&dma0_clk>; | ||
| 359 | clock-names = "dma_clk"; | ||
| 321 | }; | 360 | }; |
| 322 | 361 | ||
| 323 | dma1: dma-controller@ffffe800 { | 362 | dma1: dma-controller@ffffe800 { |
| @@ -325,6 +364,8 @@ | |||
| 325 | reg = <0xffffe800 0x200>; | 364 | reg = <0xffffe800 0x200>; |
| 326 | interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>; | 365 | interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>; |
| 327 | #dma-cells = <2>; | 366 | #dma-cells = <2>; |
| 367 | clocks = <&dma1_clk>; | ||
| 368 | clock-names = "dma_clk"; | ||
| 328 | }; | 369 | }; |
| 329 | 370 | ||
| 330 | ramc0: ramc@ffffea00 { | 371 | ramc0: ramc@ffffea00 { |
| @@ -338,6 +379,8 @@ | |||
| 338 | interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>; | 379 | interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>; |
| 339 | pinctrl-names = "default"; | 380 | pinctrl-names = "default"; |
| 340 | pinctrl-0 = <&pinctrl_dbgu>; | 381 | pinctrl-0 = <&pinctrl_dbgu>; |
| 382 | clocks = <&dbgu_clk>; | ||
| 383 | clock-names = "usart"; | ||
| 341 | status = "disabled"; | 384 | status = "disabled"; |
| 342 | }; | 385 | }; |
| 343 | 386 | ||
| @@ -626,6 +669,7 @@ | |||
| 626 | gpio-controller; | 669 | gpio-controller; |
| 627 | interrupt-controller; | 670 | interrupt-controller; |
| 628 | #interrupt-cells = <2>; | 671 | #interrupt-cells = <2>; |
| 672 | clocks = <&pioA_clk>; | ||
| 629 | }; | 673 | }; |
| 630 | 674 | ||
| 631 | pioB: gpio@fffff400 { | 675 | pioB: gpio@fffff400 { |
| @@ -636,6 +680,7 @@ | |||
| 636 | gpio-controller; | 680 | gpio-controller; |
| 637 | interrupt-controller; | 681 | interrupt-controller; |
| 638 | #interrupt-cells = <2>; | 682 | #interrupt-cells = <2>; |
| 683 | clocks = <&pioB_clk>; | ||
| 639 | }; | 684 | }; |
| 640 | 685 | ||
| 641 | pioC: gpio@fffff600 { | 686 | pioC: gpio@fffff600 { |
| @@ -646,6 +691,7 @@ | |||
| 646 | gpio-controller; | 691 | gpio-controller; |
| 647 | interrupt-controller; | 692 | interrupt-controller; |
| 648 | #interrupt-cells = <2>; | 693 | #interrupt-cells = <2>; |
| 694 | clocks = <&pioC_clk>; | ||
| 649 | }; | 695 | }; |
| 650 | 696 | ||
| 651 | pioD: gpio@fffff800 { | 697 | pioD: gpio@fffff800 { |
| @@ -656,6 +702,7 @@ | |||
| 656 | gpio-controller; | 702 | gpio-controller; |
| 657 | interrupt-controller; | 703 | interrupt-controller; |
| 658 | #interrupt-cells = <2>; | 704 | #interrupt-cells = <2>; |
| 705 | clocks = <&pioD_clk>; | ||
| 659 | }; | 706 | }; |
| 660 | 707 | ||
| 661 | pioE: gpio@fffffa00 { | 708 | pioE: gpio@fffffa00 { |
| @@ -666,12 +713,334 @@ | |||
| 666 | gpio-controller; | 713 | gpio-controller; |
| 667 | interrupt-controller; | 714 | interrupt-controller; |
| 668 | #interrupt-cells = <2>; | 715 | #interrupt-cells = <2>; |
| 716 | clocks = <&pioE_clk>; | ||
| 669 | }; | 717 | }; |
| 670 | }; | 718 | }; |
| 671 | 719 | ||
| 672 | pmc: pmc@fffffc00 { | 720 | pmc: pmc@fffffc00 { |
| 673 | compatible = "atmel,at91rm9200-pmc"; | 721 | compatible = "atmel,sama5d3-pmc"; |
| 674 | reg = <0xfffffc00 0x120>; | 722 | reg = <0xfffffc00 0x120>; |
| 723 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | ||
| 724 | interrupt-controller; | ||
| 725 | #address-cells = <1>; | ||
| 726 | #size-cells = <0>; | ||
| 727 | #interrupt-cells = <1>; | ||
| 728 | |||
| 729 | clk32k: slck { | ||
| 730 | compatible = "fixed-clock"; | ||
| 731 | #clock-cells = <0>; | ||
| 732 | clock-frequency = <32768>; | ||
| 733 | }; | ||
| 734 | |||
| 735 | main: mainck { | ||
| 736 | compatible = "atmel,at91rm9200-clk-main"; | ||
| 737 | #clock-cells = <0>; | ||
| 738 | interrupt-parent = <&pmc>; | ||
| 739 | interrupts = <AT91_PMC_MOSCS>; | ||
| 740 | clocks = <&clk32k>; | ||
| 741 | }; | ||
| 742 | |||
| 743 | plla: pllack { | ||
| 744 | compatible = "atmel,sama5d3-clk-pll"; | ||
| 745 | #clock-cells = <0>; | ||
| 746 | interrupt-parent = <&pmc>; | ||
| 747 | interrupts = <AT91_PMC_LOCKA>; | ||
| 748 | clocks = <&main>; | ||
| 749 | reg = <0>; | ||
| 750 | atmel,clk-input-range = <8000000 50000000>; | ||
| 751 | #atmel,pll-clk-output-range-cells = <4>; | ||
| 752 | atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>; | ||
| 753 | }; | ||
| 754 | |||
| 755 | plladiv: plladivck { | ||
| 756 | compatible = "atmel,at91sam9x5-clk-plldiv"; | ||
| 757 | #clock-cells = <0>; | ||
| 758 | clocks = <&plla>; | ||
| 759 | }; | ||
| 760 | |||
| 761 | utmi: utmick { | ||
| 762 | compatible = "atmel,at91sam9x5-clk-utmi"; | ||
| 763 | #clock-cells = <0>; | ||
| 764 | interrupt-parent = <&pmc>; | ||
| 765 | interrupts = <AT91_PMC_LOCKU>; | ||
| 766 | clocks = <&main>; | ||
| 767 | }; | ||
| 768 | |||
| 769 | mck: masterck { | ||
| 770 | compatible = "atmel,at91sam9x5-clk-master"; | ||
| 771 | #clock-cells = <0>; | ||
| 772 | interrupt-parent = <&pmc>; | ||
| 773 | interrupts = <AT91_PMC_MCKRDY>; | ||
| 774 | clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>; | ||
| 775 | atmel,clk-output-range = <0 166000000>; | ||
| 776 | atmel,clk-divisors = <1 2 4 3>; | ||
| 777 | }; | ||
| 778 | |||
| 779 | usb: usbck { | ||
| 780 | compatible = "atmel,at91sam9x5-clk-usb"; | ||
| 781 | #clock-cells = <0>; | ||
| 782 | clocks = <&plladiv>, <&utmi>; | ||
| 783 | }; | ||
| 784 | |||
| 785 | prog: progck { | ||
| 786 | compatible = "atmel,at91sam9x5-clk-programmable"; | ||
| 787 | #address-cells = <1>; | ||
| 788 | #size-cells = <0>; | ||
| 789 | interrupt-parent = <&pmc>; | ||
| 790 | clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>; | ||
| 791 | |||
| 792 | prog0: prog0 { | ||
| 793 | #clock-cells = <0>; | ||
| 794 | reg = <0>; | ||
| 795 | interrupts = <AT91_PMC_PCKRDY(0)>; | ||
| 796 | }; | ||
| 797 | |||
| 798 | prog1: prog1 { | ||
| 799 | #clock-cells = <0>; | ||
| 800 | reg = <1>; | ||
| 801 | interrupts = <AT91_PMC_PCKRDY(1)>; | ||
| 802 | }; | ||
| 803 | |||
| 804 | prog2: prog2 { | ||
| 805 | #clock-cells = <0>; | ||
| 806 | reg = <2>; | ||
| 807 | interrupts = <AT91_PMC_PCKRDY(2)>; | ||
| 808 | }; | ||
| 809 | }; | ||
| 810 | |||
| 811 | smd: smdclk { | ||
| 812 | compatible = "atmel,at91sam9x5-clk-smd"; | ||
| 813 | #clock-cells = <0>; | ||
| 814 | clocks = <&plladiv>, <&utmi>; | ||
| 815 | }; | ||
| 816 | |||
| 817 | systemck { | ||
| 818 | compatible = "atmel,at91rm9200-clk-system"; | ||
| 819 | #address-cells = <1>; | ||
| 820 | #size-cells = <0>; | ||
| 821 | |||
| 822 | ddrck: ddrck { | ||
| 823 | #clock-cells = <0>; | ||
| 824 | reg = <2>; | ||
| 825 | clocks = <&mck>; | ||
| 826 | }; | ||
| 827 | |||
| 828 | smdck: smdck { | ||
| 829 | #clock-cells = <0>; | ||
| 830 | reg = <4>; | ||
| 831 | clocks = <&smd>; | ||
| 832 | }; | ||
| 833 | |||
| 834 | uhpck: uhpck { | ||
| 835 | #clock-cells = <0>; | ||
| 836 | reg = <6>; | ||
| 837 | clocks = <&usb>; | ||
| 838 | }; | ||
| 839 | |||
| 840 | udpck: udpck { | ||
| 841 | #clock-cells = <0>; | ||
| 842 | reg = <7>; | ||
| 843 | clocks = <&usb>; | ||
| 844 | }; | ||
| 845 | |||
| 846 | pck0: pck0 { | ||
| 847 | #clock-cells = <0>; | ||
| 848 | reg = <8>; | ||
| 849 | clocks = <&prog0>; | ||
| 850 | }; | ||
| 851 | |||
| 852 | pck1: pck1 { | ||
| 853 | #clock-cells = <0>; | ||
| 854 | reg = <9>; | ||
| 855 | clocks = <&prog1>; | ||
| 856 | }; | ||
| 857 | |||
| 858 | pck2: pck2 { | ||
| 859 | #clock-cells = <0>; | ||
| 860 | reg = <10>; | ||
| 861 | clocks = <&prog2>; | ||
| 862 | }; | ||
| 863 | }; | ||
| 864 | |||
| 865 | periphck { | ||
| 866 | compatible = "atmel,at91sam9x5-clk-peripheral"; | ||
| 867 | #address-cells = <1>; | ||
| 868 | #size-cells = <0>; | ||
| 869 | clocks = <&mck>; | ||
| 870 | |||
| 871 | dbgu_clk: dbgu_clk { | ||
| 872 | #clock-cells = <0>; | ||
| 873 | reg = <2>; | ||
| 874 | }; | ||
| 875 | |||
| 876 | pioA_clk: pioA_clk { | ||
| 877 | #clock-cells = <0>; | ||
| 878 | reg = <6>; | ||
| 879 | }; | ||
| 880 | |||
| 881 | pioB_clk: pioB_clk { | ||
| 882 | #clock-cells = <0>; | ||
| 883 | reg = <7>; | ||
| 884 | }; | ||
| 885 | |||
| 886 | pioC_clk: pioC_clk { | ||
| 887 | #clock-cells = <0>; | ||
| 888 | reg = <8>; | ||
| 889 | }; | ||
| 890 | |||
| 891 | pioD_clk: pioD_clk { | ||
| 892 | #clock-cells = <0>; | ||
| 893 | reg = <9>; | ||
| 894 | }; | ||
| 895 | |||
| 896 | pioE_clk: pioE_clk { | ||
| 897 | #clock-cells = <0>; | ||
| 898 | reg = <10>; | ||
| 899 | }; | ||
| 900 | |||
| 901 | usart0_clk: usart0_clk { | ||
| 902 | #clock-cells = <0>; | ||
| 903 | reg = <12>; | ||
| 904 | atmel,clk-output-range = <0 66000000>; | ||
| 905 | }; | ||
| 906 | |||
| 907 | usart1_clk: usart1_clk { | ||
| 908 | #clock-cells = <0>; | ||
| 909 | reg = <13>; | ||
| 910 | atmel,clk-output-range = <0 66000000>; | ||
| 911 | }; | ||
| 912 | |||
| 913 | usart2_clk: usart2_clk { | ||
| 914 | #clock-cells = <0>; | ||
| 915 | reg = <14>; | ||
| 916 | atmel,clk-output-range = <0 66000000>; | ||
| 917 | }; | ||
| 918 | |||
| 919 | usart3_clk: usart3_clk { | ||
| 920 | #clock-cells = <0>; | ||
| 921 | reg = <15>; | ||
| 922 | atmel,clk-output-range = <0 66000000>; | ||
| 923 | }; | ||
| 924 | |||
| 925 | twi0_clk: twi0_clk { | ||
| 926 | reg = <18>; | ||
| 927 | #clock-cells = <0>; | ||
| 928 | atmel,clk-output-range = <0 16625000>; | ||
| 929 | }; | ||
| 930 | |||
| 931 | twi1_clk: twi1_clk { | ||
| 932 | #clock-cells = <0>; | ||
| 933 | reg = <19>; | ||
| 934 | atmel,clk-output-range = <0 16625000>; | ||
| 935 | }; | ||
| 936 | |||
| 937 | twi2_clk: twi2_clk { | ||
| 938 | #clock-cells = <0>; | ||
| 939 | reg = <20>; | ||
| 940 | atmel,clk-output-range = <0 16625000>; | ||
| 941 | }; | ||
| 942 | |||
| 943 | mci0_clk: mci0_clk { | ||
| 944 | #clock-cells = <0>; | ||
| 945 | reg = <21>; | ||
| 946 | }; | ||
| 947 | |||
| 948 | mci1_clk: mci1_clk { | ||
| 949 | #clock-cells = <0>; | ||
| 950 | reg = <22>; | ||
| 951 | }; | ||
| 952 | |||
| 953 | spi0_clk: spi0_clk { | ||
| 954 | #clock-cells = <0>; | ||
| 955 | reg = <24>; | ||
| 956 | atmel,clk-output-range = <0 133000000>; | ||
| 957 | }; | ||
| 958 | |||
| 959 | spi1_clk: spi1_clk { | ||
| 960 | #clock-cells = <0>; | ||
| 961 | reg = <25>; | ||
| 962 | atmel,clk-output-range = <0 133000000>; | ||
| 963 | }; | ||
| 964 | |||
| 965 | tcb0_clk: tcb0_clk { | ||
| 966 | #clock-cells = <0>; | ||
| 967 | reg = <26>; | ||
| 968 | atmel,clk-output-range = <0 133000000>; | ||
| 969 | }; | ||
| 970 | |||
| 971 | pwm_clk: pwm_clk { | ||
| 972 | #clock-cells = <0>; | ||
| 973 | reg = <28>; | ||
| 974 | }; | ||
| 975 | |||
| 976 | adc_clk: adc_clk { | ||
| 977 | #clock-cells = <0>; | ||
| 978 | reg = <29>; | ||
| 979 | atmel,clk-output-range = <0 66000000>; | ||
| 980 | }; | ||
| 981 | |||
| 982 | dma0_clk: dma0_clk { | ||
| 983 | #clock-cells = <0>; | ||
| 984 | reg = <30>; | ||
| 985 | }; | ||
| 986 | |||
| 987 | dma1_clk: dma1_clk { | ||
| 988 | #clock-cells = <0>; | ||
| 989 | reg = <31>; | ||
| 990 | }; | ||
| 991 | |||
| 992 | uhphs_clk: uhphs_clk { | ||
| 993 | #clock-cells = <0>; | ||
| 994 | reg = <32>; | ||
| 995 | }; | ||
| 996 | |||
| 997 | udphs_clk: udphs_clk { | ||
| 998 | #clock-cells = <0>; | ||
| 999 | reg = <33>; | ||
| 1000 | }; | ||
| 1001 | |||
| 1002 | isi_clk: isi_clk { | ||
| 1003 | #clock-cells = <0>; | ||
| 1004 | reg = <37>; | ||
| 1005 | }; | ||
| 1006 | |||
| 1007 | ssc0_clk: ssc0_clk { | ||
| 1008 | #clock-cells = <0>; | ||
| 1009 | reg = <38>; | ||
| 1010 | atmel,clk-output-range = <0 66000000>; | ||
| 1011 | }; | ||
| 1012 | |||
| 1013 | ssc1_clk: ssc1_clk { | ||
| 1014 | #clock-cells = <0>; | ||
| 1015 | reg = <39>; | ||
| 1016 | atmel,clk-output-range = <0 66000000>; | ||
| 1017 | }; | ||
| 1018 | |||
| 1019 | sha_clk: sha_clk { | ||
| 1020 | #clock-cells = <0>; | ||
| 1021 | reg = <42>; | ||
| 1022 | }; | ||
| 1023 | |||
| 1024 | aes_clk: aes_clk { | ||
| 1025 | #clock-cells = <0>; | ||
| 1026 | reg = <43>; | ||
| 1027 | }; | ||
| 1028 | |||
| 1029 | tdes_clk: tdes_clk { | ||
| 1030 | #clock-cells = <0>; | ||
| 1031 | reg = <44>; | ||
| 1032 | }; | ||
| 1033 | |||
| 1034 | trng_clk: trng_clk { | ||
| 1035 | #clock-cells = <0>; | ||
| 1036 | reg = <45>; | ||
| 1037 | }; | ||
| 1038 | |||
| 1039 | fuse_clk: fuse_clk { | ||
| 1040 | #clock-cells = <0>; | ||
| 1041 | reg = <48>; | ||
| 1042 | }; | ||
| 1043 | }; | ||
| 675 | }; | 1044 | }; |
| 676 | 1045 | ||
| 677 | rstc@fffffe00 { | 1046 | rstc@fffffe00 { |
| @@ -683,6 +1052,7 @@ | |||
| 683 | compatible = "atmel,at91sam9260-pit"; | 1052 | compatible = "atmel,at91sam9260-pit"; |
| 684 | reg = <0xfffffe30 0xf>; | 1053 | reg = <0xfffffe30 0xf>; |
| 685 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>; | 1054 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>; |
| 1055 | clocks = <&mck>; | ||
| 686 | }; | 1056 | }; |
| 687 | 1057 | ||
| 688 | watchdog@fffffe40 { | 1058 | watchdog@fffffe40 { |
| @@ -705,6 +1075,8 @@ | |||
| 705 | reg = <0x00500000 0x100000 | 1075 | reg = <0x00500000 0x100000 |
| 706 | 0xf8030000 0x4000>; | 1076 | 0xf8030000 0x4000>; |
| 707 | interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>; | 1077 | interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>; |
| 1078 | clocks = <&udphs_clk>, <&utmi>; | ||
| 1079 | clock-names = "pclk", "hclk"; | ||
| 708 | status = "disabled"; | 1080 | status = "disabled"; |
| 709 | 1081 | ||
| 710 | ep0 { | 1082 | ep0 { |
| @@ -817,6 +1189,9 @@ | |||
| 817 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; | 1189 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; |
| 818 | reg = <0x00600000 0x100000>; | 1190 | reg = <0x00600000 0x100000>; |
| 819 | interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; | 1191 | interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; |
| 1192 | clocks = <&usb>, <&uhphs_clk>, <&udphs_clk>, | ||
| 1193 | <&uhpck>; | ||
| 1194 | clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck"; | ||
| 820 | status = "disabled"; | 1195 | status = "disabled"; |
| 821 | }; | 1196 | }; |
| 822 | 1197 | ||
| @@ -824,6 +1199,8 @@ | |||
| 824 | compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; | 1199 | compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; |
| 825 | reg = <0x00700000 0x100000>; | 1200 | reg = <0x00700000 0x100000>; |
| 826 | interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; | 1201 | interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; |
| 1202 | clocks = <&usb>, <&uhphs_clk>, <&uhpck>; | ||
| 1203 | clock-names = "usb_clk", "ehci_clk", "uhpck"; | ||
| 827 | status = "disabled"; | 1204 | status = "disabled"; |
| 828 | }; | 1205 | }; |
| 829 | 1206 | ||
diff --git a/arch/arm/boot/dts/sama5d3_can.dtsi b/arch/arm/boot/dts/sama5d3_can.dtsi index 8ed3260cef66..a0775851cce5 100644 --- a/arch/arm/boot/dts/sama5d3_can.dtsi +++ b/arch/arm/boot/dts/sama5d3_can.dtsi | |||
| @@ -32,12 +32,30 @@ | |||
| 32 | 32 | ||
| 33 | }; | 33 | }; |
| 34 | 34 | ||
| 35 | pmc: pmc@fffffc00 { | ||
| 36 | periphck { | ||
| 37 | can0_clk: can0_clk { | ||
| 38 | #clock-cells = <0>; | ||
| 39 | reg = <40>; | ||
| 40 | atmel,clk-output-range = <0 66000000>; | ||
| 41 | }; | ||
| 42 | |||
| 43 | can1_clk: can0_clk { | ||
| 44 | #clock-cells = <0>; | ||
| 45 | reg = <41>; | ||
| 46 | atmel,clk-output-range = <0 66000000>; | ||
| 47 | }; | ||
| 48 | }; | ||
| 49 | }; | ||
| 50 | |||
| 35 | can0: can@f000c000 { | 51 | can0: can@f000c000 { |
| 36 | compatible = "atmel,at91sam9x5-can"; | 52 | compatible = "atmel,at91sam9x5-can"; |
| 37 | reg = <0xf000c000 0x300>; | 53 | reg = <0xf000c000 0x300>; |
| 38 | interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>; | 54 | interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>; |
| 39 | pinctrl-names = "default"; | 55 | pinctrl-names = "default"; |
| 40 | pinctrl-0 = <&pinctrl_can0_rx_tx>; | 56 | pinctrl-0 = <&pinctrl_can0_rx_tx>; |
| 57 | clocks = <&can0_clk>; | ||
| 58 | clock-names = "can_clk"; | ||
| 41 | status = "disabled"; | 59 | status = "disabled"; |
| 42 | }; | 60 | }; |
| 43 | 61 | ||
| @@ -47,6 +65,8 @@ | |||
| 47 | interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>; | 65 | interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>; |
| 48 | pinctrl-names = "default"; | 66 | pinctrl-names = "default"; |
| 49 | pinctrl-0 = <&pinctrl_can1_rx_tx>; | 67 | pinctrl-0 = <&pinctrl_can1_rx_tx>; |
| 68 | clocks = <&can1_clk>; | ||
| 69 | clock-names = "can_clk"; | ||
| 50 | status = "disabled"; | 70 | status = "disabled"; |
| 51 | }; | 71 | }; |
| 52 | }; | 72 | }; |
diff --git a/arch/arm/boot/dts/sama5d3_emac.dtsi b/arch/arm/boot/dts/sama5d3_emac.dtsi index 4d4f351f1f9f..fe2af9276312 100644 --- a/arch/arm/boot/dts/sama5d3_emac.dtsi +++ b/arch/arm/boot/dts/sama5d3_emac.dtsi | |||
| @@ -31,12 +31,23 @@ | |||
| 31 | }; | 31 | }; |
| 32 | }; | 32 | }; |
| 33 | 33 | ||
| 34 | pmc: pmc@fffffc00 { | ||
| 35 | periphck { | ||
| 36 | macb1_clk: macb1_clk { | ||
| 37 | #clock-cells = <0>; | ||
| 38 | reg = <35>; | ||
| 39 | }; | ||
| 40 | }; | ||
| 41 | }; | ||
| 42 | |||
| 34 | macb1: ethernet@f802c000 { | 43 | macb1: ethernet@f802c000 { |
| 35 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; | 44 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; |
| 36 | reg = <0xf802c000 0x100>; | 45 | reg = <0xf802c000 0x100>; |
| 37 | interrupts = <35 IRQ_TYPE_LEVEL_HIGH 3>; | 46 | interrupts = <35 IRQ_TYPE_LEVEL_HIGH 3>; |
| 38 | pinctrl-names = "default"; | 47 | pinctrl-names = "default"; |
| 39 | pinctrl-0 = <&pinctrl_macb1_rmii>; | 48 | pinctrl-0 = <&pinctrl_macb1_rmii>; |
| 49 | clocks = <&macb1_clk>, <&macb1_clk>; | ||
| 50 | clock-names = "hclk", "pclk"; | ||
| 40 | status = "disabled"; | 51 | status = "disabled"; |
| 41 | }; | 52 | }; |
| 42 | }; | 53 | }; |
diff --git a/arch/arm/boot/dts/sama5d3_gmac.dtsi b/arch/arm/boot/dts/sama5d3_gmac.dtsi index 0ba8be30ccd8..a6cb0508762f 100644 --- a/arch/arm/boot/dts/sama5d3_gmac.dtsi +++ b/arch/arm/boot/dts/sama5d3_gmac.dtsi | |||
| @@ -64,12 +64,23 @@ | |||
| 64 | }; | 64 | }; |
| 65 | }; | 65 | }; |
| 66 | 66 | ||
| 67 | pmc: pmc@fffffc00 { | ||
| 68 | periphck { | ||
| 69 | macb0_clk: macb0_clk { | ||
| 70 | #clock-cells = <0>; | ||
| 71 | reg = <34>; | ||
| 72 | }; | ||
| 73 | }; | ||
| 74 | }; | ||
| 75 | |||
| 67 | macb0: ethernet@f0028000 { | 76 | macb0: ethernet@f0028000 { |
| 68 | compatible = "cdns,pc302-gem", "cdns,gem"; | 77 | compatible = "cdns,pc302-gem", "cdns,gem"; |
| 69 | reg = <0xf0028000 0x100>; | 78 | reg = <0xf0028000 0x100>; |
| 70 | interrupts = <34 IRQ_TYPE_LEVEL_HIGH 3>; | 79 | interrupts = <34 IRQ_TYPE_LEVEL_HIGH 3>; |
| 71 | pinctrl-names = "default"; | 80 | pinctrl-names = "default"; |
| 72 | pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>; | 81 | pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>; |
| 82 | clocks = <&macb0_clk>, <&macb0_clk>; | ||
| 83 | clock-names = "hclk", "pclk"; | ||
| 73 | status = "disabled"; | 84 | status = "disabled"; |
| 74 | }; | 85 | }; |
| 75 | }; | 86 | }; |
diff --git a/arch/arm/boot/dts/sama5d3_lcd.dtsi b/arch/arm/boot/dts/sama5d3_lcd.dtsi index 01f52a79f8ba..85d302701565 100644 --- a/arch/arm/boot/dts/sama5d3_lcd.dtsi +++ b/arch/arm/boot/dts/sama5d3_lcd.dtsi | |||
| @@ -50,6 +50,23 @@ | |||
| 50 | }; | 50 | }; |
| 51 | }; | 51 | }; |
| 52 | }; | 52 | }; |
| 53 | |||
| 54 | pmc: pmc@fffffc00 { | ||
| 55 | periphck { | ||
| 56 | lcdc_clk: lcdc_clk { | ||
| 57 | #clock-cells = <0>; | ||
| 58 | reg = <36>; | ||
| 59 | }; | ||
| 60 | }; | ||
| 61 | |||
| 62 | systemck { | ||
| 63 | lcdck: lcdck { | ||
| 64 | #clock-cells = <0>; | ||
| 65 | reg = <3>; | ||
| 66 | clocks = <&mck>; | ||
| 67 | }; | ||
| 68 | }; | ||
| 69 | }; | ||
| 53 | }; | 70 | }; |
| 54 | }; | 71 | }; |
| 55 | }; | 72 | }; |
diff --git a/arch/arm/boot/dts/sama5d3_mci2.dtsi b/arch/arm/boot/dts/sama5d3_mci2.dtsi index 38e88e39e551..b029fe7ef17a 100644 --- a/arch/arm/boot/dts/sama5d3_mci2.dtsi +++ b/arch/arm/boot/dts/sama5d3_mci2.dtsi | |||
| @@ -9,6 +9,7 @@ | |||
| 9 | 9 | ||
| 10 | #include <dt-bindings/pinctrl/at91.h> | 10 | #include <dt-bindings/pinctrl/at91.h> |
| 11 | #include <dt-bindings/interrupt-controller/irq.h> | 11 | #include <dt-bindings/interrupt-controller/irq.h> |
| 12 | #include <dt-bindings/clk/at91.h> | ||
| 12 | 13 | ||
| 13 | / { | 14 | / { |
| 14 | ahb { | 15 | ahb { |
| @@ -30,6 +31,15 @@ | |||
| 30 | }; | 31 | }; |
| 31 | }; | 32 | }; |
| 32 | 33 | ||
| 34 | pmc: pmc@fffffc00 { | ||
| 35 | periphck { | ||
| 36 | mci2_clk: mci2_clk { | ||
| 37 | #clock-cells = <0>; | ||
| 38 | reg = <23>; | ||
| 39 | }; | ||
| 40 | }; | ||
| 41 | }; | ||
| 42 | |||
| 33 | mmc2: mmc@f8004000 { | 43 | mmc2: mmc@f8004000 { |
| 34 | compatible = "atmel,hsmci"; | 44 | compatible = "atmel,hsmci"; |
| 35 | reg = <0xf8004000 0x600>; | 45 | reg = <0xf8004000 0x600>; |
| @@ -38,6 +48,8 @@ | |||
| 38 | dma-names = "rxtx"; | 48 | dma-names = "rxtx"; |
| 39 | pinctrl-names = "default"; | 49 | pinctrl-names = "default"; |
| 40 | pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>; | 50 | pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>; |
| 51 | clocks = <&mci2_clk>; | ||
| 52 | clock-names = "mci_clk"; | ||
| 41 | status = "disabled"; | 53 | status = "disabled"; |
| 42 | #address-cells = <1>; | 54 | #address-cells = <1>; |
| 43 | #size-cells = <0>; | 55 | #size-cells = <0>; |
diff --git a/arch/arm/boot/dts/sama5d3_tcb1.dtsi b/arch/arm/boot/dts/sama5d3_tcb1.dtsi index 5264bb4a6998..382b04431f66 100644 --- a/arch/arm/boot/dts/sama5d3_tcb1.dtsi +++ b/arch/arm/boot/dts/sama5d3_tcb1.dtsi | |||
| @@ -9,6 +9,7 @@ | |||
| 9 | 9 | ||
| 10 | #include <dt-bindings/pinctrl/at91.h> | 10 | #include <dt-bindings/pinctrl/at91.h> |
| 11 | #include <dt-bindings/interrupt-controller/irq.h> | 11 | #include <dt-bindings/interrupt-controller/irq.h> |
| 12 | #include <dt-bindings/clk/at91.h> | ||
| 12 | 13 | ||
| 13 | / { | 14 | / { |
| 14 | aliases { | 15 | aliases { |
| @@ -17,10 +18,21 @@ | |||
| 17 | 18 | ||
| 18 | ahb { | 19 | ahb { |
| 19 | apb { | 20 | apb { |
| 21 | pmc: pmc@fffffc00 { | ||
| 22 | periphck { | ||
| 23 | tcb1_clk: tcb1_clk { | ||
| 24 | #clock-cells = <0>; | ||
| 25 | reg = <27>; | ||
| 26 | }; | ||
| 27 | }; | ||
| 28 | }; | ||
| 29 | |||
| 20 | tcb1: timer@f8014000 { | 30 | tcb1: timer@f8014000 { |
| 21 | compatible = "atmel,at91sam9x5-tcb"; | 31 | compatible = "atmel,at91sam9x5-tcb"; |
| 22 | reg = <0xf8014000 0x100>; | 32 | reg = <0xf8014000 0x100>; |
| 23 | interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>; | 33 | interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>; |
| 34 | clocks = <&tcb1_clk>; | ||
| 35 | clock-names = "t0_clk"; | ||
| 24 | }; | 36 | }; |
| 25 | }; | 37 | }; |
| 26 | }; | 38 | }; |
diff --git a/arch/arm/boot/dts/sama5d3_uart.dtsi b/arch/arm/boot/dts/sama5d3_uart.dtsi index 98fcb2d57446..49d4d76ca6f4 100644 --- a/arch/arm/boot/dts/sama5d3_uart.dtsi +++ b/arch/arm/boot/dts/sama5d3_uart.dtsi | |||
| @@ -9,6 +9,7 @@ | |||
| 9 | 9 | ||
| 10 | #include <dt-bindings/pinctrl/at91.h> | 10 | #include <dt-bindings/pinctrl/at91.h> |
| 11 | #include <dt-bindings/interrupt-controller/irq.h> | 11 | #include <dt-bindings/interrupt-controller/irq.h> |
| 12 | #include <dt-bindings/clk/at91.h> | ||
| 12 | 13 | ||
| 13 | / { | 14 | / { |
| 14 | ahb { | 15 | ahb { |
| @@ -31,12 +32,30 @@ | |||
| 31 | }; | 32 | }; |
| 32 | }; | 33 | }; |
| 33 | 34 | ||
| 35 | pmc: pmc@fffffc00 { | ||
| 36 | periphck { | ||
| 37 | uart0_clk: uart0_clk { | ||
| 38 | #clock-cells = <0>; | ||
| 39 | reg = <16>; | ||
| 40 | atmel,clk-output-range = <0 66000000>; | ||
| 41 | }; | ||
| 42 | |||
| 43 | uart1_clk: uart1_clk { | ||
| 44 | #clock-cells = <0>; | ||
| 45 | reg = <17>; | ||
| 46 | atmel,clk-output-range = <0 66000000>; | ||
| 47 | }; | ||
| 48 | }; | ||
| 49 | }; | ||
| 50 | |||
| 34 | uart0: serial@f0024000 { | 51 | uart0: serial@f0024000 { |
| 35 | compatible = "atmel,at91sam9260-usart"; | 52 | compatible = "atmel,at91sam9260-usart"; |
| 36 | reg = <0xf0024000 0x200>; | 53 | reg = <0xf0024000 0x200>; |
| 37 | interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; | 54 | interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; |
| 38 | pinctrl-names = "default"; | 55 | pinctrl-names = "default"; |
| 39 | pinctrl-0 = <&pinctrl_uart0>; | 56 | pinctrl-0 = <&pinctrl_uart0>; |
| 57 | clocks = <&uart0_clk>; | ||
| 58 | clock-names = "usart"; | ||
| 40 | status = "disabled"; | 59 | status = "disabled"; |
| 41 | }; | 60 | }; |
| 42 | 61 | ||
| @@ -46,6 +65,8 @@ | |||
| 46 | interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>; | 65 | interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>; |
| 47 | pinctrl-names = "default"; | 66 | pinctrl-names = "default"; |
| 48 | pinctrl-0 = <&pinctrl_uart1>; | 67 | pinctrl-0 = <&pinctrl_uart1>; |
| 68 | clocks = <&uart1_clk>; | ||
| 69 | clock-names = "usart"; | ||
| 49 | status = "disabled"; | 70 | status = "disabled"; |
| 50 | }; | 71 | }; |
| 51 | }; | 72 | }; |
